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1. 发明授权

US08730954B2 Methods and apparatus related to any-to-any connectivity within a data center 有权
标题翻译：与数据中心内的任何连接相关的方法和设备
公开(公告)号：US08730954B2
公开(公告)日：2014-05-20
申请号：US12495337
申请日：2009-06-30
申请人： Pradeep Sindhu , Gunes Aybay , Jean-Marc Frailong , Anjan Venkatramani , Quaizar Vohra
发明人： Pradeep Sindhu , Gunes Aybay , Jean-Marc Frailong , Anjan Venkatramani , Quaizar Vohra
IPC分类号： H04Q11/00 , H04Q3/68 , H04L12/56
CPC分类号： H04Q3/68 , H04L49/1515 , H04L49/1523 , H04L49/153 , H04L49/254 , H04L49/351 , H04L49/40 , H04L49/70
摘要： In one embodiment, an apparatus includes a switch core that defines a single logical entity and has a multi-stage switch fabric physically distributed across a plurality of chassis. The multi-stage switch fabric has a plurality of ingress ports and a plurality of egress ports. The switch core is configured to be coupled to a plurality of peripheral processing devices via the plurality of ingress ports and the plurality of egress ports. The switch core is also configured to provide non-blocking connectivity at line rate between a first peripheral processing device disposed with a first chassis and a second peripheral processing device disposed within a second chassis.
摘要翻译：在一个实施例中，设备包括交换机核心，其定义单个逻辑实体并且具有物理上分布在多个机箱上的多级交换机结构。多级交换结构具有多个入口和多个出口。交换机核心被配置为经由多个入口端口和多个出口端口耦合到多个外围处理设备。交换机核心还被配置为在布置在第一机架的第一外围处理设备与设置在第二机架内的第二外围处理设备之间的线路速率下提供非阻塞连接。

2. 发明申请

US20140003433A1 METHODS AND APPARATUS FOR PROVIDING SERVICES IN DISTRIBUTED SWITCH 审中-公开
标题翻译：在分布式交换机中提供服务的方法和装置
公开(公告)号：US20140003433A1
公开(公告)日：2014-01-02
申请号：US13538344
申请日：2012-06-29
申请人： Krishna Narayanaswamy , Jean-Marc Frailong , Anjan Venkatramani , Srinivasan Jagannadhan
发明人： Krishna Narayanaswamy , Jean-Marc Frailong , Anjan Venkatramani , Srinivasan Jagannadhan
IPC分类号： H04L12/56
CPC分类号： H04L49/355 , H04L67/327
摘要： In some embodiments, a non-transitory processor-readable medium stores code representing instructions to be executed by a processor. The code causes the processor to receive, from a source peripheral processing device, a portion of a data packet having a destination address associated with a destination peripheral processing device. The code causes the processor to identify, based on the destination address, a service to be performed on the portion of the data packet. The code causes the processor to select, based on the service, an identifier of a service module associated with the service. The code further causes the processor to send the portion of the data packet to the service module via a distributed switch fabric such that the service module performs the service on the portion of the data packet and sends the portion of the data packet to the destination peripheral processing device via the distributed switch fabric.
摘要翻译：在一些实施例中，非暂时处理器可读介质存储表示要由处理器执行的指令的代码。代码使得处理器从源外围处理设备接收具有与目的地外围设备处理设备相关联的目的地地址的数据分组的一部分。代码使得处理器基于目的地地址来识别要在数据分组的部分上执行的服务。代码使得处理器基于该服务来选择与服务相关联的服务模块的标识符。该代码还使得处理器经由分布式交换结构将数据分组的一部分发送到服务模块，使得服务模块在数据分组的一部分上执行服务，并将数据分组的一部分发送到目的地外设处理设备通过分布式交换结构。

3. 发明授权

US08335213B2 Methods and apparatus related to low latency within a data center 有权
标题翻译：与数据中心内的低延迟相关的方法和设备
公开(公告)号：US08335213B2
公开(公告)日：2012-12-18
申请号：US12495358
申请日：2009-06-30
申请人： Pradeep Sindhu , Gunes Aybay , Jean-Marc Frailong , Anjan Venkatramani , Quaizar Vohra
发明人： Pradeep Sindhu , Gunes Aybay , Jean-Marc Frailong , Anjan Venkatramani , Quaizar Vohra
IPC分类号： H04Q11/00
CPC分类号： H04L49/602 , H04L49/1515 , H04L49/351 , H04L49/357
摘要： In one embodiment, an apparatus includes a switch core that has a multi-stage switch fabric. The multi-stage switch fabric has a set of ingress ports and a set of egress ports. The switch core can be configured to be coupled to a set of edge devices via the set of ingress ports and the set of egress ports. The switch core can be configured to receive a packet from an ingress port from the set of ingress ports. The switch core can be configured to send a set of cells associated with the packet from the ingress port to an egress port from the set of egress ports without a store-and-forward delay associated with a zero-load latency for the switch core.
摘要翻译：在一个实施例中，一种装置包括具有多级交换结构的交换机核心。多级交换结构具有一组入口端口和一组出口端口。交换机核心可以被配置为经由一组入口端口和出口端口组来耦合到一组边缘设备。交换机核心可以配置为从入口端口的一组入口端口接收数据包。交换机核心可以被配置为将来自入口端口的与分组相关联的一组小区从出口端口发送到出口端口，而没有与交换机核心的零负载延迟相关联的存储转发延迟。

4. 发明申请

US20110254590A1 MAPPING ADDRESS BITS TO IMPROVE SPREAD OF BANKS 有权
标题翻译：映射地址，以改善银行的扩张
公开(公告)号：US20110254590A1
公开(公告)日：2011-10-20
申请号：US13174137
申请日：2011-06-30
申请人： Anjan VENKATRAMANI , Srinivas PERLA , John KEEN
发明人： Anjan VENKATRAMANI , Srinivas PERLA , John KEEN
IPC分类号： H03K19/21
CPC分类号： G06F13/1626 , G06F12/0607 , G06F12/0615 , G06F13/1642 , G06F13/1647 , G06F13/1652
摘要： A device may include a group of requestors issuing requests, a memory that includes a set of memory banks, and a control block. The control block may receive a request from one of the requestors, where the request includes a first address. The control block may perform a logic operation on a high order bit and a low order bit of the first address to form a second address, identify one of the memory banks based on the second address, and send the request to the identified memory bank.
摘要翻译：设备可以包括发出请求的一组请求者，包括一组存储器组的存储器和控制块。控制块可以从请求者之一接收请求，其中请求包括第一地址。控制块可以对第一地址的高位和低位执行逻辑运算以形成第二地址，基于第二地址识别存储体之一，并将该请求发送到所识别的存储体。

5. 发明申请

US20100043067A1 SCALABLE SECURITY SERVICES FOR MULTICAST IN A ROUTER HAVING INTEGRATED ZONE-BASED FIREWALL 有权
标题翻译：具有集成区域防火墙的路由器中的可扩展安全服务
公开(公告)号：US20100043067A1
公开(公告)日：2010-02-18
申请号：US12432366
申请日：2009-04-29
申请人： Kannan Varadhan , Jean-Marc Frailong , Anjan Venkatramani
发明人： Kannan Varadhan , Jean-Marc Frailong , Anjan Venkatramani
IPC分类号： G06F21/00 , H04L12/56
CPC分类号： H04L63/0227 , H04L12/18 , H04L45/00 , H04L45/16 , H04L45/30 , H04L63/0254 , H04L63/104
摘要： A multicast-capable firewall allows firewall security policies to be applied to multicast traffic. The multicast-capable firewall may be integrated within a routing device, thus allowing a single device to provide both routing functionality, including multicast support, as well as firewall services. The routing device provides a user interface by which a user specifies one or more zones to be recognized by the integrated firewall when applying stateful firewall services to multicast packets. The user interface supports a syntax that allows the user to define subsets of the plurality of interfaces associated with the zones, and define a single multicast policy to be applied to multicast sessions associated with a multicast group. The multicast policy identifies common services to be applied pre-replication, and exceptions specifying additional services to be applied post-replication to copies of the multicast packets for the one or more zones.
摘要翻译：具有组播功能的防火墙允许将防火墙安全策略应用于组播流量。可组播的防火墙可以集成在路由设备内，从而允许单个设备提供包括组播支持在内的路由功能以及防火墙服务。路由设备提供一个用户界面，用户通过该用户界面指定一个或多个区域，以便在向组播数据包应用状态防火墙服务时由集成防火墙识别。用户界面支持语法，允许用户定义与区域相关联的多个接口的子集，并且定义要应用于与多播组相关联的多播会话的单个组播策略。多播策略标识要应用预复制的常用服务，以及将要复制后应用的其他服务指定给一个或多个区域的多播数据包副本的异常。

6. 发明授权

US07397794B1 Systems and methods for implementing virtual switch planes in a physical switch fabric 有权
标题翻译：在物理交换结构中实现虚拟交换机平面的系统和方法
公开(公告)号：US07397794B1
公开(公告)日：2008-07-08
申请号：US10300639
申请日：2002-11-21
申请人： Philippe Lacroute , Matthew A. Tucker , John D. Weisbloom , Anjan Venkatramani , Jayabharat Boddu , Stefan Dyckerhoff
发明人： Philippe Lacroute , Matthew A. Tucker , John D. Weisbloom , Anjan Venkatramani , Jayabharat Boddu , Stefan Dyckerhoff
IPC分类号： H04L12/50
CPC分类号： H04L49/10 , H04L49/15 , H04L49/1507 , H04L49/30 , H04L49/3027
摘要： A switching device includes multiple interfaces and a switch fabric. The switch fabric includes switch integrated circuits arranged in a number of stages. Multiple virtual switch planes may be implemented in the switch fabric. Data traffic received at the interfaces is selectively assigned to different ones of the virtual switch planes.
摘要翻译：交换设备包括多个接口和交换结构。交换结构包括以多个级布置的开关集成电路。可以在交换结构中实现多个虚拟交换机平面。在接口处接收到的数据流量被选择性地分配给虚拟交换机的不同的平面。

7. 发明授权

US10129182B2 Methods and apparatus for providing services in distributed switch 有权
公开(公告)号：US10129182B2
公开(公告)日：2018-11-13
申请号：US13538328
申请日：2012-06-29
申请人： Krishna Narayanaswamy , Jean-Marc Frailong , Anjan Venkatramani , Srinivasan Jagannadhan
发明人： Krishna Narayanaswamy , Jean-Marc Frailong , Anjan Venkatramani , Srinivasan Jagannadhan
IPC分类号： G06F15/16 , H04L12/931 , H04L29/08 , H04L12/721 , H04L12/947 , H04L12/741
摘要： In some embodiments, a non-transitory processor-readable medium stores code representing instructions to be executed by a processor. The code causes the processor to receive, at an edge device, a first data unit having a characteristic. The code causes the processor to identify, at a first time, an identifier of a service module associated with the characteristic in response to each entry from a set of entries within a flow table not being associated with the characteristic. The code causes the processor to define an entry in the flow table associated with the characteristic and the identifier of the service module. The code causes the processor to send the first data unit to the service module. The code causes the processor to receive, at the edge device, a second data unit having the characteristic, and send the second data unit to the service module based on the entry.

8. 发明申请

US20140006549A1 METHODS AND APPARATUS FOR PROVIDING SERVICES IN DISTRIBUTED SWITCH 审中-公开
标题翻译：在分布式交换机中提供服务的方法和装置
公开(公告)号：US20140006549A1
公开(公告)日：2014-01-02
申请号：US13538328
申请日：2012-06-29
申请人： Krishna Narayanaswamy , Jean-Marc Frailong , Anjan Venkatramani , Srinivasan Jagannadhan
发明人： Krishna Narayanaswamy , Jean-Marc Frailong , Anjan Venkatramani , Srinivasan Jagannadhan
IPC分类号： G06F15/16
CPC分类号： H04L49/355 , H04L45/38 , H04L45/54 , H04L49/25 , H04L67/327
摘要： In some embodiments, a non-transitory processor-readable medium stores code representing instructions to be executed by a processor. The code causes the processor to receive, at an edge device, a first data unit having a characteristic. The code causes the processor to identify, at a first time, an identifier of a service module associated with the characteristic in response to each entry from a set of entries within a flow table not being associated with the characteristic. The code causes the processor to define an entry in the flow table associated with the characteristic and the identifier of the service module. The code causes the processor to send the first data unit to the service module. The code causes the processor to receive, at the edge device, a second data unit having the characteristic, and send the second data unit to the service module based on the entry.
摘要翻译：在一些实施例中，非暂时处理器可读介质存储表示要由处理器执行的指令的代码。代码使处理器在边缘设备处接收具有特征的第一数据单元。所述代码使所述处理器响应于来自不与所述特性相关联的流表中的一组条目的每个条目，在第一时间识别与所述特性相关联的服务模块的标识符。该代码使得处理器在流表中定义与特征和服务模块的标识符相关联的条目。代码使处理器将第一个数据单元发送到服务模块。代码使得处理器在边缘设备处接收具有该特征的第二数据单元，并且基于该条目将第二数据单元发送到服务模块。

9. 发明授权

US08442048B2 Methods and apparatus for configuring a virtual network switch 有权
公开(公告)号：US08442048B2
公开(公告)日：2013-05-14
申请号：US12612210
申请日：2009-11-04
申请人： Gunes Aybay , Pradeep Sindhu , Anjan Venkatramani
发明人： Gunes Aybay , Pradeep Sindhu , Anjan Venkatramani
IPC分类号： H04L12/28 , H04L12/56 , H04L12/26
CPC分类号： H04L41/0813 , H04L41/0806 , H04L43/0817 , H04L45/306 , H04L47/12 , H04L49/35 , H04L49/65 , H04L49/70 , H04L63/0263
摘要： In one embodiment, a method includes sending a configuration signal to a virtual network switch module within a control plane of a communications network. The configuration signal is configured to define a first network rule at the virtual network switch module. The method also includes configuring a packet forwarding module such that the packet forwarding module implements a second network rule, and receiving status information from the virtual network switch module and status information from the packet forwarding module. The status information is received via the control plane.

10. 发明授权

US08327057B1 Ordering write bursts to memory 有权
标题翻译：将写入脉冲排序到存储器
公开(公告)号：US08327057B1
公开(公告)日：2012-12-04
申请号：US11829634
申请日：2007-07-27
申请人： Anjan Venkatramani , Srinivas Perla , John Keen
发明人： Anjan Venkatramani , Srinivas Perla , John Keen
IPC分类号： G06F12/02
CPC分类号： G06F13/1626 , G06F12/0607 , G06F12/0615 , G06F13/1642 , G06F13/1647 , G06F13/1652
摘要： A device may receive requests intended for a memory that includes a number of banks, determine a number of the requests intended for each of the banks, determine an order for the requests based on the determined number of the requests intended for each of the banks, and send one of the requests to the memory based on the determined order.
摘要翻译：设备可以接收针对包括多个银行的存储器的请求，确定针对每个银行的请求的数量，基于确定的针对每个银行的请求的确定的数量来确定请求的顺序，并根据确定的顺序将一个请求发送到存储器。

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