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1. 发明授权

US09082808B2 Batch process for three-dimensional integration 有权
标题翻译：批量处理三维一体化
公开(公告)号：US09082808B2
公开(公告)日：2015-07-14
申请号：US13489401
申请日：2012-06-05
申请人： Hiren D. Thacker , Ashok V. Krishnamoorthy , John E. Cunningham
发明人： Hiren D. Thacker , Ashok V. Krishnamoorthy , John E. Cunningham
IPC分类号： H01L23/48 , H01L23/00 , H01L25/065 , H01L25/00
CPC分类号： H01L24/72 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/26 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/94 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L2224/13009 , H01L2224/131 , H01L2224/13116 , H01L2224/13147 , H01L2224/14181 , H01L2224/16145 , H01L2224/26145 , H01L2224/26175 , H01L2224/32145 , H01L2224/72 , H01L2224/73204 , H01L2224/81005 , H01L2224/81203 , H01L2224/81815 , H01L2224/83191 , H01L2224/92125 , H01L2224/94 , H01L2225/06513 , H01L2225/06531 , H01L2225/06534 , H01L2225/06541 , H01L2225/06562 , H01L2924/12042 , H01L2924/37001 , H01L2224/81 , H01L2224/11 , H01L2924/014 , H01L2924/00012 , H01L2224/90 , H01L2924/00
摘要： A chip package is described which includes a first chip having a first surface and first sides having a first side-wall angle, and a second chip having a second surface and second sides having a second side-wall angle, which faces and is mechanically coupled to the first chip. The chip package is fabricated using a batch process, and the chips in the chip package were singulated from their respective wafers after the chip package is assembled. This is accomplished by etching the first and second side-wall angles and thinning the wafer thicknesses prior to assembling the chip package. For example, the first and/or the second side walls can be fabricated using wet etching or dry etching. Therefore, the first and/or the second side-wall angles may be other than vertical or approximately vertical.
摘要翻译：描述了一种芯片封装，其包括具有第一表面和第一侧面具有第一侧壁角度的第一芯片和具有第二表面和第二侧面的第二侧面的第二芯片，所述第二表面和第二侧面具有第二侧壁角度，到第一个芯片。使用间歇工艺制造芯片封装，并且在芯片封装组装之后，芯片封装中的芯片从它们各自的晶片分离。这通过在组装芯片封装之前蚀刻第一和第二侧壁角度并使晶片厚度变薄来实现。例如，可以使用湿蚀刻或干蚀刻来制造第一和/或第二侧壁。因此，第一和/或第二侧壁角度可以不同于垂直或近似垂直。

2. 发明授权

US08659161B2 Chip package with reinforced positive alignment features 有权
标题翻译：芯片封装具有增强的正向对准功能
公开(公告)号：US08659161B2
公开(公告)日：2014-02-25
申请号：US13165599
申请日：2011-06-21
申请人： Ashok V. Krishnamoorthy , Craig A. Stephen , John E. Cunningham , James G. Mitchell
发明人： Ashok V. Krishnamoorthy , Craig A. Stephen , John E. Cunningham , James G. Mitchell
IPC分类号： H01L23/48
CPC分类号： H01L24/13 , H01L23/48 , H01L24/16 , H01L24/81 , H01L2224/10126 , H01L2224/131 , H01L2224/1319 , H01L2224/1357 , H01L2224/13609 , H01L2224/13611 , H01L2224/13655 , H01L2224/13671 , H01L2224/16105 , H01L2224/16145 , H01L2224/81097 , H01L2224/81141 , H01L2224/81193 , H01L2224/81194 , H01L2224/81815 , H01L2224/81855 , Y10T428/24479 , H01L2924/00014 , H01L2924/014 , H01L2924/00012 , H01L2924/01079 , H01L2924/01029 , H01L2924/01028 , H01L2924/01082 , H01L2924/0105
摘要： A chip package includes a substrate having a positive feature, which is defined on a surface of the substrate and which protrudes above a region on the surface proximate to the positive feature. Furthermore, the chip package includes a mechanical reinforcement mechanism defined on the substrate proximate to the positive feature that increases a lateral shear strength of the positive feature relative to the substrate. In this way, the chip package may facilitate increased reliability of a multi-chip module (MCM) that includes the chip package.
摘要翻译：芯片封装包括具有正特征的衬底，其被限定在衬底的表面上并且突出在接近正特征的表面上的区域上方。此外，芯片封装包括限定在靠近正特征的基板上的机械加强机构，其增加正特征相对于基板的横向剪切强度。以这种方式，芯片封装可以有助于增加包括芯片封装的多芯片模块（MCM）的可靠性。

3. 发明申请

US20130320567A1 BATCH PROCESS FOR THREE-DIMENSIONAL INTEGRATION 有权
标题翻译：三维整合的批处理过程
公开(公告)号：US20130320567A1
公开(公告)日：2013-12-05
申请号：US13489401
申请日：2012-06-05
申请人： Hiren D. Thacker , Ashok V. Krishnamoorthy , John E. Cunningham
发明人： Hiren D. Thacker , Ashok V. Krishnamoorthy , John E. Cunningham
IPC分类号： H01L23/488 , H01L21/78
CPC分类号： H01L24/72 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/26 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/94 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L2224/13009 , H01L2224/131 , H01L2224/13116 , H01L2224/13147 , H01L2224/14181 , H01L2224/16145 , H01L2224/26145 , H01L2224/26175 , H01L2224/32145 , H01L2224/72 , H01L2224/73204 , H01L2224/81005 , H01L2224/81203 , H01L2224/81815 , H01L2224/83191 , H01L2224/92125 , H01L2224/94 , H01L2225/06513 , H01L2225/06531 , H01L2225/06534 , H01L2225/06541 , H01L2225/06562 , H01L2924/12042 , H01L2924/37001 , H01L2224/81 , H01L2224/11 , H01L2924/014 , H01L2924/00012 , H01L2224/90 , H01L2924/00
摘要： A chip package is described which includes a first chip having a first surface and first sides having a first side-wall angle, and a second chip having a second surface and second sides having a second side-wall angle, which faces and is mechanically coupled to the first chip. The chip package is fabricated using a batch process, and the chips in the chip package were singulated from their respective wafers after the chip package is assembled. This is accomplished by etching the first and second side-wall angles and thinning the wafer thicknesses prior to assembling the chip package. For example, the first and/or the second side walls can be fabricated using wet etching or dry etching. Therefore, the first and/or the second side-wall angles may be other than vertical or approximately vertical.
摘要翻译：描述了一种芯片封装，其包括具有第一表面和第一侧面具有第一侧壁角度的第一芯片和具有第二表面和第二侧面的第二侧面的第二芯片，所述第二表面和第二侧面具有第二侧壁角度，到第一个芯片。使用间歇工艺制造芯片封装，并且在芯片封装组装之后，芯片封装中的芯片从它们各自的晶片分离。这通过在组装芯片封装之前蚀刻第一和第二侧壁角度并使晶片厚度变薄来实现。例如，可以使用湿蚀刻或干蚀刻来制造第一和/或第二侧壁。因此，第一和/或第二侧壁角度可以不同于垂直或近似垂直。

4. 发明授权

US08599468B2 Pulse-width-modulated thermal tuning of optical devices 有权
标题翻译：光器件的脉冲宽度调制热调谐
公开(公告)号：US08599468B2
公开(公告)日：2013-12-03
申请号：US13205749
申请日：2011-08-09
申请人： Frankie Y. Liu , Dinesh D. Patil , Ronald Ho , Ashok V. Krishnamoorthy
发明人： Frankie Y. Liu , Dinesh D. Patil , Ronald Ho , Ashok V. Krishnamoorthy
IPC分类号： G02F1/01
CPC分类号： G02F1/3132 , G02F1/0147 , G02F1/025
摘要： An optical device that includes a wavelength-sensitive optical component, which has an associated thermal time constant, is described. Note that an operating wavelength of the wavelength-sensitive optical component is a function of several physical parameters including temperature. Moreover, the optical device includes a heating mechanism that provides heat to the wavelength-sensitive optical component. Furthermore, the optical device includes a driver circuit that provides a pulse-width modulated signal to the heating mechanism. Note that an average pulse-width modulated heat provided by the heating mechanism, and which corresponds to the pulse-width modulated signal, thermally tunes the wavelength-sensitive optical component to a target operating wavelength. Additionally, note that the target operating wavelength corresponds to a target operating temperature of the wavelength-sensitive optical component.
摘要翻译：描述了包括具有相关联的热时间常数的波长敏感光学部件的光学装置。注意，波长敏感光学部件的工作波长是包括温度在内的若干物理参数的函数。此外，光学装置包括向波长敏感的光学部件提供热量的加热机构。此外，光学装置包括向加热机构提供脉宽调制信号的驱动电路。注意，由加热机构提供的并且对应于脉冲宽度调制信号的平均脉冲宽度调制热量将波长敏感光学部件热调谐到目标工作波长。此外，注意，目标工作波长对应于波长敏感光学部件的目标工作温度。

5. 发明申请

US20130315526A1 SINGLE-LAYER FULL-MESH, POINT-TO-POINT NETWORK 有权
标题翻译：单层全网，点对点网络
公开(公告)号：US20130315526A1
公开(公告)日：2013-11-28
申请号：US13479109
申请日：2012-05-23
申请人： Ashok V. Krishnamoorthy , Xuezhe Zheng
发明人： Ashok V. Krishnamoorthy , Xuezhe Zheng
IPC分类号： G02B6/26 , G02B6/34 , G02B6/12
CPC分类号： G02B6/12009 , G02B6/29326 , G02B6/29328 , G02B6/2938 , G02B6/43 , G02B2006/12107
摘要： An MCM may include a single optical routing layer that provides point-to-point connectivity among N chips in the MCM, such as all-to-all connectivity or full-mesh point-to-point connectivity. Moreover, the optical routing layer may include: N optical waveguides optically coupled to the N chips and a cyclic de-multiplexer, optically coupled to the N optical waveguides, that routes optical signals among the N optical waveguides without optical-waveguide crossing in the optical routing layer. For example, the cyclic de-multiplexer may include: an array-waveguide-grating (AWG) wavelength router and/or an echelle-grating wavelength router.
摘要翻译： MCM可以包括在MCM中的N个芯片之间提供点对点连接的单个光路由层，例如全对连接或全网点对点连接。此外，光路由层可以包括：光学耦合到N个芯片的N个光波导和光学耦合到N个光波导的循环去多路复用器，其在N个光波导中路由光信号，而在光学器件中没有光波导交叉路由层。例如，循环去多路复用器可以包括：阵列波导光栅（AWG）波长路由器和/或梯形光栅波长路由器。

6. 发明授权

US08532446B2 Scalable silicon photonic multiplexers and demultiplexers 有权
标题翻译：可扩展硅光复用器和解复用器
公开(公告)号：US08532446B2
公开(公告)日：2013-09-10
申请号：US13048250
申请日：2011-03-15
申请人： Xuezhe Zheng , Ashok V. Krishnamoorthy , Yeshaiahu Fainman
发明人： Xuezhe Zheng , Ashok V. Krishnamoorthy , Yeshaiahu Fainman
IPC分类号： G02B6/28 , H04J14/02
CPC分类号： G02B6/12007 , G02B6/29382 , G02B2006/12147 , H04J14/0201
摘要： An optical multiplexer/demultiplexer is described. In this optical multiplexer/demultiplexer, multiple coupled-waveguide grating devices are optically coupled to a bus optical waveguide. A given coupled-waveguide grating device has a band-pass filter characteristic that encompasses multiple optical channels, thereby providing coarse optical filtering. Moreover, the optical multiplexer/demultiplexer includes multiple add/drop filters (such as ring resonators) that optically couple to the coupled-waveguide grating devices. A given add/drop filter has a filter bandwidth corresponding to a given optical channel, thereby providing fine optical filtering. Furthermore, the band-pass filter characteristic of the given coupled-waveguide grating device is approximately equal to or less than a free spectral range (FSR) of the given add/drop filter.
摘要翻译：描述了光复用器/解复用器。在该光复用器/解复用器中，多个耦合波导光栅器件光耦合到总线光波导。给定的耦合波导光栅器件具有包含多个光通道的带通滤波器特性，由此提供粗略的光学滤波。此外，光复用器/解复用器包括光耦合到耦合波导光栅器件的多个加/减滤波器（例如环形谐振器）。给定的分插滤波器具有对应于给定光信道的滤波器带宽，从而提供精细的光学滤波。此外，给定耦合波导光栅装置的带通滤波器特性近似等于或小于给定加/减滤波器的自由光谱范围（FSR）。

7. 发明授权

US08531042B2 Technique for fabricating microsprings on non-planar surfaces 有权
标题翻译：在非平面表面上制造微球的技术
公开(公告)号：US08531042B2
公开(公告)日：2013-09-10
申请号：US12495057
申请日：2009-06-30
申请人： Robert J. Drost , John E. Cunningham , Ashok V. Krishnamoorthy
发明人： Robert J. Drost , John E. Cunningham , Ashok V. Krishnamoorthy
IPC分类号： H01L29/41
CPC分类号： B81C3/008 , B81C1/0019 , H01L21/4846 , H01L23/36 , H01L23/49811 , H01L24/72 , H01L24/73 , H01L24/81 , H01L24/90 , H01L25/0652 , H01L2224/81192 , H01L2924/14 , H01L2924/351 , Y10T29/49217 , Y10T29/49218 , H01L2924/00
摘要： A processing technique facilitating the fabrication of the integrated circuit with microsprings at different vertical positions relative to a surface of a substrate is described. During the fabrication technique, microsprings are lithographically defined on surfaces of a first substrate and a second substrate. Then, a hole is created through a first substrate. Moreover, the integrated circuit may be created by rigidly mechanically coupling the two substrates to each other such that the microsprings on the surface of the second substrate are within a region defined at least in part by an edge around the hole. Subsequently, photoresist that constrains the microsprings on the surfaces of the two substrates may be removed. In this way, microsprings at the different vertical positions can be fabricated.
摘要翻译：描述了一种有助于在相对于衬底的表面在不同垂直位置处形成具有微球的集成电路的处理技术。在制造技术期间，在第一基板和第二基板的表面上光刻地限定微弹簧。然后，通过第一基板产生孔。此外，集成电路可以通过将两个基板彼此刚性地机械耦合而形成，使得第二基板的表面上的微弹簧在至少部分地由孔周围的边缘限定的区域内。随后，可以除去限制两个基板表面上的微球的光致抗蚀剂。以这种方式，可以制造在不同垂直位置的微球。

8. 发明申请

US20130136389A1 OPTICAL DEVICE WITH ECHELLE GRATING AND WAVEFRONT TAILORING 有权
标题翻译：光学设备与电镀和WAVEFRONT TAILORING
公开(公告)号：US20130136389A1
公开(公告)日：2013-05-30
申请号：US13307298
申请日：2011-11-30
申请人： Ying L. Luo , Ashok V. Krishnamoorthy , Xuezhe Zheng , Guoliang Li
发明人： Ying L. Luo , Ashok V. Krishnamoorthy , Xuezhe Zheng , Guoliang Li
IPC分类号： G02B6/34 , G02B6/12
CPC分类号： G02B6/12007 , G02B6/124 , G02B6/126 , G02B6/2813 , G02B6/29326
摘要： An optical de-MUX includes a sub-wavelength grating that magnifies an input optical signal. In particular, along a direction perpendicular to a propagation direction of the optical signal, the sub-wavelength grating has a spatially varying effective index of refraction that is larger at a center of the sub-wavelength grating than at an edge of the sub-wavelength grating. Moreover, the optical de-MUX includes an optical device that images and diffracts the optical signal using a reflective geometry, and which provides different diffraction orders to output ports. For example, the optical device may include an echelle grating.
摘要翻译：光学去MUX包括放大输入光信号的子波长光栅。特别地，沿着与光信号的传播方向垂直的方向，亚波长光栅具有空间变化的有效折射率，其在亚波长光栅的中心处比在亚波长的边缘处更大光栅。此外，光学去MUX包括使用反射几何形状对光学信号进行成像和衍射并且向输出端口提供不同衍射级的光学装置。例如，光学装置可以包括一个梯形光栅。

9. 发明授权

US08428404B1 Optical device on inverted, substrateless chip 有权
标题翻译：光学器件倒置，无底片芯片
公开(公告)号：US08428404B1
公开(公告)日：2013-04-23
申请号：US13331767
申请日：2011-12-20
申请人： Ivan Shubin , John E. Cunningham , Ashok V. Krishnamoorthy
发明人： Ivan Shubin , John E. Cunningham , Ashok V. Krishnamoorthy
IPC分类号： G02B6/10 , G02B6/12
CPC分类号： G02B6/12004 , G02B6/29331 , G02B2006/12142
摘要： A hybrid integrated module includes a semiconductor die mechanically coupled face-to-face to an integrated device in which the substrate has been removed. For example, the integrated circuit may include an optical waveguide that conveys an optical signal, which is fabricated on a silicon-on-insulator (SOI) wafer in which the back-side silicon substrate or handler has been completely removed. Moreover, an optical device may be disposed on the bottom surface of an oxide layer (such as a buried-oxide layer) in the integrated device, and the geometry and materials in the integrated device may be selected and/or defined so that the optical signal is evanescently coupled between the optical waveguide and the optical device.
摘要翻译：混合集成模块包括面对面地与已经去除衬底的集成器件机械耦合的半导体管芯。例如，集成电路可以包括传送光信号的光波导，其被制造在绝缘体上硅（SOI）晶片上，其中背面硅衬底或处理器已被完全去除。此外，光学器件可以设置在集成器件中的氧化物层（例如掩埋氧化物层）的底表面上，并且集成器件中的几何形状和材料可以被选择和/或限定，使得光学器件信号在光波导和光学器件之间瞬间耦合。

10. 发明授权

US08401345B2 Optical modulator with three-dimensional waveguide tapers 有权
标题翻译：具有三维波导锥度的光调制器
公开(公告)号：US08401345B2
公开(公告)日：2013-03-19
申请号：US12816935
申请日：2010-06-16
申请人： Xuezhe Zheng , John E. Cunningham , Ashok V. Krishnamoorthy , Dazeng Feng , Mehdi Asghari
发明人： Xuezhe Zheng , John E. Cunningham , Ashok V. Krishnamoorthy , Dazeng Feng , Mehdi Asghari
IPC分类号： G02F1/035
CPC分类号： G02B6/1228 , G02F1/01708 , G02F2001/0157
摘要： An integrated circuit that includes an optical waveguide defined in a semiconductor layer is described. In this integrated circuit, light is coupled between the optical waveguide and an optical modulator, which is disposed on the optical waveguide, using 3-dimensional (3-D) taper structures that are proximate to the ends of the optical modulator. The cross-sectional areas of these 3-D taper structures transition, over a distance, from that of the optical waveguide (distal from the optical modulator) to that of optical modulator (proximate to the ends of the optical modulator). In this way, a spatial extent of an optical mode in the optical waveguide and a spatial extent of the optical mode in the optical modulator may be approximately matched to reduce the optical loss when the light is coupled to or from the optical modulator.
摘要翻译：描述了包括在半导体层中限定的光波导的集成电路。在该集成电路中，使用靠近光调制器的端部的3维（3-D）锥形结构将光耦合在光波导和设置在光波导上的光调制器之间。这些3-D锥形结构的横截面积在一段距离上与光波导（远离光调制器）的横截面面积转换到光调制器（近于光调制器的端部）的截面面积。以这种方式，光学波导中的光学模式的空间范围和光学调制器中的光学模式的空间范围可以近似匹配，以减少当光耦合到光学调制器时的光学损耗。

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