会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 4. 发明授权
    • Photo detecting apparatus
    • 照相检测装置
    • US07391004B2
    • 2008-06-24
    • US11692709
    • 2007-03-28
    • Hajime TakashimaKuniyuki Tani
    • Hajime TakashimaKuniyuki Tani
    • H01L27/00H04N5/335
    • H04N5/378H04N5/3745
    • A pixel circuit includes a first detector which amplifies a voltage obtained by charging and discharging a capacitance with a photocurrent flowing through a photo detecting element and then outputs it to a first data line, and a second detector which outputs an electric charge stored in the capacitance by the photocurrent, to a second data line. The pixel circuit operates in a first operation mode where the first detector is activated, a second operation mode where the second detector is activated and an initialization mode where the photo detecting element is initialized. With a first transistor turned on, the second detector outputs an electric charge stored in the capacitance in the second operation mode, and in the initialization mode a reset voltage set in the second data line is applied to the other end of the photo detecting element to initialize the photo detecting element.
    • 像素电路包括第一检测器,其放大通过流过光检测元件的光电流对电容进行充电和放电而获得的电压,然后将其输出到第一数据线;以及第二检测器,其输出存储在电容中的电荷 通过光电流传输到第二数据线。 像素电路在其中第一检测器被激活的第一操作模式中工作,第二检测器被激活的第二操作模式和初始化光检测元件的初始化模式。 在第一晶体管导通的情况下,第二检测器在第二操作模式下输出存储在电容中的电荷,并且在初始化模式中,将设置在第二数据线中的复位电压施加到光检测元件的另一端 初始化光电检测元件。
    • 10. 发明授权
    • Method for assigning job in parallel processing method and parallel processing method
    • 并行处理方法和并行处理方法分配作业的方法
    • US07370328B2
    • 2008-05-06
    • US10257913
    • 2002-04-25
    • Sou YamadaShinjiro InabataNobuaki MiyakawaHajime TakashimaKunihiro KitamuraUnpei Nagashima
    • Sou YamadaShinjiro InabataNobuaki MiyakawaHajime TakashimaKunihiro KitamuraUnpei Nagashima
    • G06F9/44G06F15/16G06F15/163
    • G06F9/5066G06F9/4881
    • When parallel processing is executed by parallel computers composed of a host computer and a plurality of processors connected to the host computer through a common bus, there is provided a method of assigning jobs to respective processors with high efficiency. A job in which a ratio between a communication time and a calculation time is larger than a predetermined value or larger than a fraction of processors and a job in which a ratio between a communication time and a calculation time is smaller than a predetermined value or smaller than a fraction of processors can be alternately assigned to respective processors. Alternatively, jobs are assigned to respective processors in such a manner that a plurality of processors and a plurality of jobs are divided into a plurality of groups in a one-to-one relation, jobs in which sizes comprising communication time and calculation time and ratios between the communication times and the calculation times approximate to each other may belong to different job groups and the order in which the jobs in which the sizes comprising the communication time and the calculation time and the ratios between the communication times and the calculation times approximate to each other are assigned within respective job groups may differ from each other among a plurality of job groups.
    • 当并行处理由主计算机和通过公共总线连接到主计算机的多个处理器组成的并行计算机执行时,提供了一种以高效率将作业分配给各个处理器的方法。 其中通信时间和计算时间之间的比率大于预定值或大于处理器的一部分的工作,以及通信时间和计算时间之间的比率小于预定值或更小的作业 可以将一小部分处理器交替分配给相应的处理器。 或者,将作业分配给各个处理器,使得多个处理器和多个作业以一对一的关系被分成多个组,其中包括通信时间和计算时间和比率的尺寸的作业 在通信时间和彼此近似的计算时间之间可以属于不同的作业组,并且其中包括通信时间和计算时间的尺寸以及通信时间与计算时间之间的比率近似于 彼此分配在各个作业组中可以在多个作业组中彼此不同。