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1. 发明授权

US09112139B2 Spin transistor and memory 有权
标题翻译：旋转晶体管和存储器
公开(公告)号：US09112139B2
公开(公告)日：2015-08-18
申请号：US13526007
申请日：2012-06-18
申请人： Tomoaki Inokuchi , Takao Marukame , Tetsufumi Tanamoto , Hideyuki Sugiyama , Mizue Ishikawa , Yoshiaki Saito
发明人： Tomoaki Inokuchi , Takao Marukame , Tetsufumi Tanamoto , Hideyuki Sugiyama , Mizue Ishikawa , Yoshiaki Saito
IPC分类号： H01L43/08 , H01L29/66
CPC分类号： H01L43/08 , H01L29/66984
摘要： A spin transistor according to an embodiment includes: a first magnetic layer formed above a substrate and serving as one of a source and a drain; an insulating film having a lower face facing to an upper face of the first magnetic layer, an upper face opposed to the lower face, and a side face different from the lower and upper faces, the insulating film being formed on the upper face of the first magnetic layer and serving as a channel; a second magnetic layer formed on the upper face of the insulating film and serving as the other one of the source and the drain; a gate electrode formed along the side face of the insulating film; and a gate insulating film located between the gate electrode and the side face of the insulating film.
摘要翻译：根据实施例的自旋晶体管包括：形成在衬底上并用作源极和漏极之一的第一磁性层; 绝缘膜，其具有面向第一磁性层的上表面的下表面，与下表面相对的上表面，以及不同于下表面和上表面的侧面，绝缘膜形成在第一磁性层的上表面上第一磁性层，作为通道; 第二磁性层，形成在绝缘膜的上表面上并用作源极和漏极中的另一个; 沿绝缘膜的侧面形成的栅电极; 以及位于绝缘膜的栅极和侧面之间的栅极绝缘膜。

2. 发明授权

US08779496B2 Spin FET, magnetoresistive element and spin memory 失效
标题翻译：旋转FET，磁阻元件和自旋存储器
公开(公告)号：US08779496B2
公开(公告)日：2014-07-15
申请号：US12029117
申请日：2008-02-11
申请人： Yoshiaki Saito , Hideyuki Sugiyama , Tomoaki Inokuchi
发明人： Yoshiaki Saito , Hideyuki Sugiyama , Tomoaki Inokuchi
IPC分类号： H01L29/76
CPC分类号： G01R33/093 , B82Y10/00 , B82Y25/00 , G11C11/16 , H01L27/228 , H01L29/66984 , H01L29/7881 , H01L43/08
摘要： A spin FET includes a first ferromagnetic film disposed on a first source/drain area, a direction of magnetization thereof being fixed in an upward direction or a downward direction perpendicular to a film surface, a second ferromagnetic film disposed on a second source/drain area, a direction of magnetization thereof being changed in the upward direction or the downward direction, an anti-ferromagnetic ferroelectric film disposed on the second ferromagnetic film, and a tunnel barrier film disposed at least between the first source/drain area and the first ferromagnetic film or between the second source/drain and the second ferromagnetic film. Resistance of the anti-ferromagnetic ferroelectric film is larger than ON resistance when the first and second source/drain areas conduct electricity through the channel area.
摘要翻译：自旋FET包括设置在第一源/漏区上的第一铁磁膜，其磁化方向沿垂直于膜表面的向上方向或向下方向固定，第二铁磁膜设置在第二源/漏区其磁化方向在向上方向或向下方向上变化，设置在第二铁磁性膜上的反铁磁性铁电体膜和至少设置在第一源极/漏极区域与第一铁磁性膜之间的隧道势垒膜或者在第二源极/漏极和第二铁磁膜之间。当第一和第二源极/漏极区域通过沟道区域导电时，反铁磁铁电体膜的电阻大于导通电阻。

3. 发明授权

US08373437B2 Look-up table circuits and field programmable gate array 有权
标题翻译：查找表电路和现场可编程门阵列
公开(公告)号：US08373437B2
公开(公告)日：2013-02-12
申请号：US13238020
申请日：2011-09-21
申请人： Hideyuki Sugiyama , Tetsufumi Tanamoto , Takao Marukame , Mizue Ishikawa , Tomoaki Inokuchi , Yoshiaki Saito
发明人： Hideyuki Sugiyama , Tetsufumi Tanamoto , Takao Marukame , Mizue Ishikawa , Tomoaki Inokuchi , Yoshiaki Saito
IPC分类号： G06F7/38 , H03K19/173
CPC分类号： H03K19/177
摘要： A look-up table circuit according to an embodiment includes: a variable resistance circuit including variable resistance devices and selecting a variable resistance device from the variable resistance devices based on an input signal; a reference circuit having a resistance value between the largest resistance value and the smallest resistance value of the variable resistance circuit; a first n-channel MOSFET including a source connected to a terminal of the variable resistance circuit and a gate connected to a drain; a second n-channel MOSFET including a source connected to a terminal of the reference circuit and a gate connected to the gate of the first n-channel MOSFET; a first current supply circuit to supply a current to the variable resistance circuit; a second current supply circuit to supply a current to the reference circuit; and a comparator comparing voltages at a first input terminal and a second input terminal.
摘要翻译：根据实施例的查找表电路包括：可变电阻电路，包括可变电阻器件，并且基于输入信号从可变电阻器件中选择可变电阻器件; 参考电路，其具有可变电阻电路的最大电阻值和最小电阻值之间的电阻值; 第一n沟道MOSFET，其包括连接到可变电阻电路的端子的源极和连接到漏极的栅极; 第二n沟道MOSFET，其包括连接到参考电路的端子的源极和连接到第一n沟道MOSFET的栅极的栅极; 用于向可变电阻电路提供电流的第一电流供应电路; 第二电流供应电路，用于向参考电路提供电流; 以及比较器，用于比较第一输入端和第二输入端的电压。

4. 发明授权

US08357962B2 Spin transistor and method of manufacturing the same 有权
标题翻译：旋转晶体管及其制造方法
公开(公告)号：US08357962B2
公开(公告)日：2013-01-22
申请号：US12700767
申请日：2010-02-05
申请人： Takao Marukame , Mizue Ishikawa , Tomoaki Inokuchi , Hideyuki Sugiyama , Yoshiaki Saito
发明人： Takao Marukame , Mizue Ishikawa , Tomoaki Inokuchi , Hideyuki Sugiyama , Yoshiaki Saito
IPC分类号： H01L21/336
CPC分类号： H01L29/66984 , B82Y25/00 , B82Y40/00 , H01F1/405 , H01F10/1936 , H01F10/3254 , H01F41/307 , H01L29/1608 , H01L29/20 , H01L29/22 , H01L29/47
摘要： A spin transistor includes a source electrode, a drain electrode, and a gate electrode on a semiconductor substrate. At least one of the source electrode and the drain electrode includes a semiconductor region and a magnetic layer. The semiconductor region is formed in the semiconductor substrate. The magnetic layer is formed on the semiconductor region, and contains a crystalline Heusler alloy containing at least one of cobalt (Co) and iron (Fe). The semiconductor region and the magnetic layer contain the same impurity element.
摘要翻译：自旋晶体管包括在半导体衬底上的源电极，漏电极和栅电极。源电极和漏电极中的至少一个包括半导体区域和磁性层。半导体区域形成在半导体衬底中。磁性层形成在半导体区域上，并含有包含钴（Co）和铁（Fe）中的至少一种的结晶Heusler合金。半导体区域和磁性层含有相同的杂质元素。

5. 发明申请

US20120250399A1 MEMORY CIRCUIT USING SPIN MOSFETS, PATH TRANSISTOR CIRCUIT WITH MEMORY FUNCTION, SWITCHING BOX CIRCUIT, SWITCHING BLOCK CIRCUIT, AND FIELD PROGRAMMABLE GATE ARRAY 有权
标题翻译：使用旋转MOSFET的存储器电路，具有存储器功能的路径晶体管电路，开关盒电路，开关块电路和现场可编程门阵列
公开(公告)号：US20120250399A1
公开(公告)日：2012-10-04
申请号：US13403308
申请日：2012-02-23
申请人： Hideyuki SUGIYAMA , Masato ODA , Shinobu FUJITA , Tetsufumi TANAMOTO , Mizue ISHIKAWA , Takao MARUKAME , Tomoaki INOKUCHI , Yoshiaki SAITO
发明人： Hideyuki SUGIYAMA , Masato ODA , Shinobu FUJITA , Tetsufumi TANAMOTO , Mizue ISHIKAWA , Takao MARUKAME , Tomoaki INOKUCHI , Yoshiaki SAITO
IPC分类号： G11C11/16 , H03K19/177
CPC分类号： G11C5/148 , G11C11/161 , G11C11/1673 , G11C11/1675
摘要： A memory circuit according to an embodiment includes: a first transistor including a first source/drain electrode, a second source/drain electrode, and a first gate electrode; a second transistor including a third source/drain electrode connected to the second source/drain electrode, a fourth source/drain electrode, and a second gate electrode; a third transistor and a fourth transistor forming an inverter circuit, the third transistor including a fifth source/drain electrode, a sixth source/drain electrode, and a third gate electrode connected to the second source/drain electrode, the fourth transistor including a seventh source/drain electrode connected to the sixth source/drain electrode, an eighth source/drain electrode, and a fourth gate electrode connected to the second source/drain electrode; and an output terminal connected to the sixth source/drain electrode. At least one of the third transistor and the fourth transistor is a spin MOSFET, and an output of the inverter circuit is sent from the output terminal.
摘要翻译：根据实施例的存储器电路包括：第一晶体管，包括第一源极/漏极，第二源极/漏极和第一栅电极; 第二晶体管，包括连接到第二源极/漏极的第三源极/漏极，第四源极/漏极和第二栅极; 第三晶体管和形成逆变器电路的第四晶体管，所述第三晶体管包括第五源极/漏极，第六源极/漏极和连接到所述第二源极/漏极的第三栅电极，所述第四晶体管包括第七连接到第六源极/漏极的源极/漏极电极，连接到第二源极/漏极的第八源极/漏极电极和第四栅极电极; 以及连接到第六源极/漏极的输出端子。第三晶体管和第四晶体管中的至少一个是自旋MOSFET，并且从输出端子发送反相器电路的输出。

6. 发明申请

US20120119274A1 NONVOLATILE MEMORY CIRCUIT USING SPIN MOS TRANSISTORS 有权
标题翻译：使用旋转MOS晶体管的非易失性存储器电路
公开(公告)号：US20120119274A1
公开(公告)日：2012-05-17
申请号：US13360904
申请日：2012-01-30
申请人： Hideyuki Sugiyama , Tetsufumi Tanamoto , Takao Marukame , Mizue Ishikawa , Tomoaki Inokuchi , Yoshiaki Saito
发明人： Hideyuki Sugiyama , Tetsufumi Tanamoto , Takao Marukame , Mizue Ishikawa , Tomoaki Inokuchi , Yoshiaki Saito
IPC分类号： H01L27/22
CPC分类号： G11C14/0081
摘要： Certain embodiments provide a nonvolatile memory circuit in which a first p-channel MOS transistor and a first n-channel spin MOS transistor are connected in series, a second p-channel MOS transistor and a second n-channel spin MOS transistor are connected in series, gates of the first p-channel MOS transistor and the first n-channel spin MOS transistor are connected, gates of the second p-channel MOS transistor and the second n-channel spin MOS transistor are connected, a first n-channel transistor includes a drain connected to a drain of the first p-channel transistor and the gate of the second p-channel transistor, a second n-channel transistor includes a drain connected to a drain of the second p-channel transistor and the gate of the first p-channel transistor, and gates of the first and second n-channel transistors are connected.
摘要翻译：某些实施例提供了其中第一p沟道MOS晶体管和第一n沟道自旋MOS晶体管串联连接的非易失性存储器电路，第二p沟道MOS晶体管和第二n沟道自旋MOS晶体管串联连接第一p沟道MOS晶体管和第一n沟道自旋MOS晶体管的栅极连接，第二p沟道MOS晶体管和第二n沟道自旋MOS晶体管的栅极连接，第一n沟道晶体管包括连接到第一p沟道晶体管的漏极和第二p沟道晶体管的栅极的漏极，第二n沟道晶体管包括连接到第二p沟道晶体管的漏极和第一p沟道晶体管的栅极的漏极 p沟道晶体管，第一和第二n沟道晶体管的栅极连接。

7. 发明申请

US20120019283A1 SPIN MOSFET AND RECONFIGURABLE LOGIC CIRCUIT 有权
标题翻译：旋转MOSFET和可重新配置的逻辑电路
公开(公告)号：US20120019283A1
公开(公告)日：2012-01-26
申请号：US13228852
申请日：2011-09-09
申请人： Yoshiaki SAITO , Hideyuki Sugiyama , Tomoaki Inokuchi , Takao Marukame , Mizue Ishikawa
发明人： Yoshiaki SAITO , Hideyuki Sugiyama , Tomoaki Inokuchi , Takao Marukame , Mizue Ishikawa
IPC分类号： H03K19/173 , H01L29/82
CPC分类号： H01L43/02 , B01D53/1493 , B01D53/62 , G11C11/16 , G11C11/161 , G11C11/1673 , G11C11/1675 , G11C11/1695 , H01L28/00 , H01L29/0843 , H01L29/0895 , H01L29/66984 , H01L43/10
摘要： A spin MOSFET includes: a first ferromagnetic layer provided on a semiconductor substrate, and having a fixed magnetization direction perpendicular to a film plane; a semiconductor layer provided on the first ferromagnetic layer, including a lower face opposed to the upper face of the first ferromagnetic layer, an upper face opposed to the lower face, and side faces different from the lower and upper faces; a second ferromagnetic layer provided on the upper face of the semiconductor layer, and having a variable magnetization direction perpendicular to a film plane; a first tunnel barrier provided on the second ferromagnetic layer; a third ferromagnetic layer provided on the first tunnel barrier; a gate insulating film provided on the side faces of the semiconductor layer; and a gate electrode provided on the side faces of the semiconductor layer with the gate insulating film being interposed therebetween.
摘要翻译：自旋MOSFET包括：设置在半导体衬底上并具有与膜平面垂直的固定磁化方向的第一铁磁层; 设置在所述第一铁磁层上的半导体层，包括与所述第一铁磁层的上表面相对的下表面，与所述下表面相对的上表面，以及与所述下表面和所述上表面不同的侧面; 第二铁磁层，设置在所述半导体层的上表面上，并且具有与膜平面垂直的可变磁化方向; 设置在第二铁磁层上的第一隧道势垒; 设置在第一隧道屏障上的第三铁磁层; 设置在所述半导体层的侧面上的栅极绝缘膜; 以及设置在半导体层的侧面上的栅电极，其间插入有栅极绝缘膜。

8. 发明授权

US07973351B2 Stack having Heusler alloy, magnetoresistive element and spin transistor using the stack, and method of manufacturing the same 有权
标题翻译：具有Heusler合金，磁阻元件和使用该堆叠的自旋晶体管的堆叠及其制造方法
公开(公告)号：US07973351B2
公开(公告)日：2011-07-05
申请号：US12565303
申请日：2009-09-23
申请人： Takao Marukame , Mizue Ishikawa , Tomoaki Inokuchi , Hideyuki Sugiyama , Yoshiaki Saito
发明人： Takao Marukame , Mizue Ishikawa , Tomoaki Inokuchi , Hideyuki Sugiyama , Yoshiaki Saito
IPC分类号： H01L21/02
CPC分类号： H01L29/66984 , H01F10/1936 , H01F10/265 , H01L27/228 , H01L43/10 , H01L43/12 , Y10T428/12611
摘要： A stack includes a crystalline MgO layer, crystalline Heusler alloy layer, and amorphous Heusler alloy layer. The crystalline Heusler alloy layer is provided on the MgO layer. The amorphous Heusler alloy layer is provided on the crystalline Heusler alloy layer.
摘要翻译：堆叠包括结晶MgO层，结晶Heusler合金层和非晶Heusler合金层。结晶Heusler合金层设置在MgO层上。非晶Heusler合金层设置在结晶Heusler合金层上。

9. 发明授权

US07750390B2 Spin fet and spin memory 失效
标题翻译：旋转胎儿和旋转记忆
公开(公告)号：US07750390B2
公开(公告)日：2010-07-06
申请号：US11610100
申请日：2006-12-13
申请人： Yoshiaki Saito , Hideyuki Sugiyama , Tomoaki Inokuchi
发明人： Yoshiaki Saito , Hideyuki Sugiyama , Tomoaki Inokuchi
IPC分类号： H01L29/76 , H01L29/94
CPC分类号： H01L29/66984 , G11C11/16 , H01L27/228 , H01L43/08 , H01L43/10
摘要： A spin FET according to an example of the present invention includes a magnetic pinned layer whose magnetization direction is fixed, a magnetic free layer whose magnetization direction is changed, a channel between the magnetic pinned layer and the magnetic free layer, a gate electrode provided on the channel via a gate insulation layer, and a multiferroric layer which is provided on the magnetic free layer, and whose magnetization direction is changed by an electric field.
摘要翻译：根据本发明的示例的自旋FET包括其磁化方向固定的磁性钉扎层，其磁化方向改变的磁性自由层，磁性被钉扎层和磁性自由层之间的通道，设置在通过栅极绝缘层的沟道，以及设置在磁性自由层上的磁化方向由电场改变的多层。

10. 发明授权

US07746601B2 Magneto-resistance effect element with a surface contacting with a side face of electrode having a magnetization direction 有权
标题翻译：具有与具有磁化方向的电极的侧面接触的表面的磁阻效应元件
公开(公告)号：US07746601B2
公开(公告)日：2010-06-29
申请号：US12177596
申请日：2008-07-22
申请人： Hideyuki Sugiyama , Yoshiaki Saito
发明人： Hideyuki Sugiyama , Yoshiaki Saito
IPC分类号： G11B5/39 , G11C11/00 , G11C11/14
CPC分类号： G11C11/161
摘要： An area of an element can be made small and fluctuation in area can be reduced. A magneto-resistance effect element is provided with a first electrode with an end face; a magneto-resistance effect film which is formed such that a surface thereof comes in contact with the end face of the first electrode; and a second electrode which is formed on another surface of the magneto-resistance effect element opposed from the surface coming in contact with the surface of the first electrode. The magneto-resistance effect film includes a magnetization pinned layer whose magnetization direction is pinned, a magnetization free layer whose magnetization direction is changeable, and a first non-magnetic layer which is provided between the magnetization pinned layer and the magnetization free layer.
摘要翻译：可以使元件的区域变小，并且可以减小面积的波动。磁阻效应元件设置有具有端面的第一电极; 形成为使得其表面与第一电极的端面接触的磁阻效应膜; 以及第二电极，其形成在与从第一电极的表面接触的表面相对的磁阻效应元件的另一个表面上。磁阻效应膜包括其磁化方向被钉扎的磁化钉扎层，其磁化方向可变的磁化自由层，以及设置在磁化钉扎层与磁化自由层之间的第一非磁性层。

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