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1. 发明授权

US07790605B2 Formation of interconnects through lift-off processing 失效
标题翻译：通过剥离处理形成互连
公开(公告)号：US07790605B2
公开(公告)日：2010-09-07
申请号：US11644834
申请日：2006-12-26
申请人： Jae-Won Han
发明人： Jae-Won Han
IPC分类号： H01L21/4763 , H01L21/44
CPC分类号： H01L21/0272 , H01L21/76852 , H01L21/76885 , H01L23/5222 , H01L23/5226 , H01L2924/0002 , Y10S438/951 , H01L2924/00
摘要： A semiconductor device is provided. The semiconductor device includes a semiconductor substrate including a conducting layer, a first insulating film formed on the semiconductor substrate and having a via hole formed therein, a lower barrier film formed on an inside wall of the via hole, a first metal wiring formed on the lower barrier film, a second insulating film formed on the first metal wiring and the first insulating film, the second insulating film being provided with a trench which has a width greater than a width of the via hole, an upper barrier film formed on a lower surface of the trench, a second metal wiring formed on the upper barrier film, and a sidewall barrier film formed on sidewalls of the upper barrier film and the second metal wiring. The sidewall barrier film has an L-shaped mirror-symmetrical structure.
摘要翻译：提供半导体器件。半导体器件包括：半导体衬底，包括导电层，形成在半导体衬底上并具有通孔的第一绝缘膜，形成在通孔内壁上的下阻挡膜，形成在通孔上的第一金属布线下阻挡膜，形成在第一金属布线和第一绝缘膜上的第二绝缘膜，第二绝缘膜设置有宽度大于通孔宽度的沟槽，上阻挡膜形成在下部阻挡膜上沟槽的表面，形成在上阻挡膜上的第二金属布线，以及形成在上阻挡膜和第二金属布线的侧壁上的侧壁阻挡膜。侧壁阻挡膜具有L形的镜面对称结构。

2. 发明授权

US07704814B2 Method for manufacturing MOS transistor of semiconductor device 失效
标题翻译：制造半导体器件的MOS晶体管的方法
公开(公告)号：US07704814B2
公开(公告)日：2010-04-27
申请号：US11498680
申请日：2006-08-02
申请人： Hyun Soo Shin , Jae Won Han
发明人： Hyun Soo Shin , Jae Won Han
IPC分类号： H01L21/336
CPC分类号： H01L21/823493 , H01L29/6659 , H01L29/7833
摘要： Disclosed is a method for manufacturing a semiconductor device including a low-voltage MOS transistor and a high-voltage MOS transistor. The present method includes a low-voltage well implantation process on a semiconductor substrate to form a first well in a first region of the substrate and a second well in a second region of the substrate; forming first and second gate oxide layers and first and second gate electrodes in the first and second regions, respectively; forming a first photoresist pattern to expose the first region; forming a first LDD region in the first region exposed by the first photoresist pattern and the first gate electrode; removing the first photoresist pattern; forming a second photoresist pattern to expose the second region; forming a second LDD region in the second region exposed by the second photoresist pattern and the second gate electrode; performing a compensational implantation on the second region to adjust a well concentration for the high-voltage MOS transistor; and removing the second photoresist pattern.
摘要翻译：公开了一种制造包括低电压MOS晶体管和高压MOS晶体管的半导体器件的方法。本方法包括在半导体衬底上的低电压阱注入工艺，以在衬底的第一区域中形成第一阱，在衬底的第二区域中形成第二阱; 分别在第一和第二区域中形成第一和第二栅极氧化物层和第一和第二栅电极; 形成第一光致抗蚀剂图案以暴露第一区域; 在由第一光致抗蚀剂图案和第一栅电极暴露的第一区域中形成第一LDD区; 去除第一光致抗蚀剂图案; 形成第二光致抗蚀剂图案以暴露所述第二区域; 在由所述第二光致抗蚀剂图案和所述第二栅电极暴露的所述第二区域中形成第二LDD区域; 在所述第二区域上执行补偿注入以调整所述高压MOS晶体管的阱浓度; 并且去除第二光致抗蚀剂图案。

3. 发明授权

US07598583B2 Image sensor 失效
标题翻译：图像传感器
公开(公告)号：US07598583B2
公开(公告)日：2009-10-06
申请号：US11782144
申请日：2007-07-24
申请人： Jae Won Han
发明人： Jae Won Han
IPC分类号： H01L31/02
CPC分类号： H01L27/14634 , H01L27/14621 , H01L27/14627 , H01L27/1469 , H01L2224/0554 , H01L2224/05573 , H01L2224/13025 , H01L2224/16145 , H01L2924/00014 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： An image sensor according to embodiments may include a first substrate having photodiode cells, a second substrate having a logic circuit, and connection electrodes that may electrically connect the photodiode cells with the logic circuit. In embodiments, more area may be available on the first substrate for photodiode cells and light loss may be reduced.
摘要翻译：根据实施例的图像传感器可以包括具有光电二极管单元的第一基板，具有逻辑电路的第二基板以及可以将光电二极管单元与逻辑电路电连接的连接电极。在实施例中，用于光电二极管单元的第一基板上可能有更多的区域可用，并且可以减少光损失。

4. 发明授权

US07541279B2 Method for manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07541279B2
公开(公告)日：2009-06-02
申请号：US11615105
申请日：2006-12-22
申请人： Sang Chul Kim , Jae Won Han
发明人： Sang Chul Kim , Jae Won Han
IPC分类号： H01L21/20
CPC分类号： H01L21/76874 , C25D3/38 , C25D3/58 , C25D5/022 , C25D7/123 , H01L21/2885 , H01L21/76877
摘要： A method for manufacturing a semiconductor device is provided. The method includes the steps of forming an interlayer insulating layer on a semiconductor substrate, selectively patterning the interlayer insulating layer to form a contact hole, depositing a first metal on an inner surface of the contact hole, submerging the semiconductor substrate on which the first metal is deposited into an electrochemical plating (ECP) solution bath in which a second metal is dissolved, dissolving the first metal in the ECP solution bath, plating the first and second metals dissolved in the ECP solution bath at the same time to gap-fill an alloy of the first and second metals in the contact hole, and removing the alloy using the interlayer insulating layer as an end point in a CMP process to form an alloy interconnection.
摘要翻译：提供一种制造半导体器件的方法。该方法包括以下步骤：在半导体衬底上形成层间绝缘层，选择性地图案化层间绝缘层以形成接触孔;在接触孔的内表面上沉积第一金属;浸没第一金属沉积到其中溶解有第二金属的电化学电镀（ECP）溶液浴中，将第一金属溶解在ECP溶液浴中，同时电镀溶解在ECP溶液浴中的第一和第二金属以间隙填充接触孔中的第一和第二金属的合金，并且在CMP工艺中使用层间绝缘层作为终点去除合金以形成合金互连。

5. 发明申请

US20080157133A1 Semiconductor Device and Fabricating Method Thereof 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080157133A1
公开(公告)日：2008-07-03
申请号：US11923440
申请日：2007-10-24
申请人： JAE WON HAN
发明人： JAE WON HAN
IPC分类号： H01L31/113 , H01L31/18
CPC分类号： H01L31/02005 , H01L31/02019 , H01L31/02162 , H01L31/18
摘要： A semiconductor device and a fabricating method thereof are provided. A first device having a photodiode cell can be disposed adjacent to a second device having a transistor, and a connection electrode can electrically connect the first device and the second device.
摘要翻译：提供了一种半导体器件及其制造方法。具有光电二极管单元的第一器件可以与具有晶体管的第二器件相邻设置，并且连接电极可以电连接第一器件和第二器件。

6. 发明申请

US20080150077A1 Semiconductor Device and Fabricating Method Thereof 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080150077A1
公开(公告)日：2008-06-26
申请号：US11863422
申请日：2007-09-28
申请人： JAE WON HAN
发明人： JAE WON HAN
IPC分类号： H01L29/00 , H01L21/02
CPC分类号： H01L28/60 , H01L23/481 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： Disclosed is a semiconductor device comprising a first substrate having a through-electrode and a capacitor cell, a second substrate having a circuit unit, and a connection electrode electrically connecting the capacitor cell with the circuit unit.
摘要翻译：公开了一种半导体器件，包括具有贯通电极和电容器单元的第一基板，具有电路单元的第二基板和将电容器单元与电路单元电连接的连接电极。

7. 发明申请

US20080048335A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20080048335A1
公开(公告)日：2008-02-28
申请号：US11834389
申请日：2007-08-06
申请人： Jae-Won Han
发明人： Jae-Won Han
IPC分类号： H01L23/52 , H01L21/00 , H01L23/48
CPC分类号： H01L25/0657 , H01L2224/16 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06589 , H01L2924/1461 , H01L2924/00
摘要： A semiconductor device according to embodiments may include an interposer, a plurality of devices stacked and formed on the interposer, through electrodes each formed in the plurality of devices and formed by penetrating through the respective devices, and connecting electrodes formed between the respective devices and connecting a through electrode formed in a upper device to a through electrode formed in a lower device.
摘要翻译：根据实施例的半导体器件可以包括插入器，多个器件，其通过在多个器件中形成并通过穿过各个器件形成的电极以及形成在各个器件之间的连接电极和连接器在上部器件中形成的通孔，形成在下部器件中的贯通电极。

8. 发明申请

US20080048325A1 Semiconductor device and fabricating method thereof 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080048325A1
公开(公告)日：2008-02-28
申请号：US11841102
申请日：2007-08-20
申请人： Jae-Won Han
发明人： Jae-Won Han
IPC分类号： H01L23/48 , H01L21/60
CPC分类号： H01L21/76838 , H01L23/481 , H01L25/0657 , H01L2224/0554 , H01L2224/05573 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05684 , H01L2224/13025 , H01L2224/16 , H01L2924/00014 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A method of effectively fabricating a semiconductor device involves separately fabricating a first substrate having a transistor layer and a second substrate having a metal wire layer, and stacking the first and second substrates. A transistor on the first substrate is electrically connected to a metal wire on the second substrate through a connection electrode.
摘要翻译：一种有效地制造半导体器件的方法包括分别制造具有晶体管层的第一衬底和具有金属线层的第二衬底，以及堆叠第一衬底和第二衬底。第一基板上的晶体管通过连接电极与第二基板上的金属线电连接。

9. 发明申请

US20080048290A1 SEMICONDUCTOR DEVICE AND FABRICATING METHOD 审中-公开
标题翻译：半导体器件和制造方法
公开(公告)号：US20080048290A1
公开(公告)日：2008-02-28
申请号：US11841082
申请日：2007-08-20
申请人： Jae-Won Han
发明人： Jae-Won Han
IPC分类号： H01L29/00 , H01L21/02
CPC分类号： H01L23/5223 , H01L28/60 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device and a relatively simple fabrication process which may maximize fabrication yield. A semiconductor device may include at least one of the following: A first substrate including a capacitor cell. A second substrate including a circuit unit having a transistor and a wire. A connection electrode which electrically connects the capacitor cell and the circuit unit.
摘要翻译：半导体器件和相对简单的制造工艺，其可以最大化制造产量。半导体器件可以包括以下中的至少一个：包括电容器单元的第一衬底。包括具有晶体管和导线的电路单元的第二基板。电连接电容器单元和电路单元的连接电极。

10. 发明申请

US20080048283A1 Image Sensor and Fabricating Method Thereof 审中-公开
标题翻译：图像传感器及其制作方法
公开(公告)号：US20080048283A1
公开(公告)日：2008-02-28
申请号：US11842639
申请日：2007-08-21
申请人： JAE WON HAN
发明人： JAE WON HAN
IPC分类号： H01L31/0232 , H01L31/18
CPC分类号： H01L31/103 , H01L27/14609 , H01L31/18
摘要： An image sensor is provided. The image sensor can include an isolation layer, a transistor region, and a photodiode region on a semiconductor substrate. A plurality of holes can be formed in the substrate of the photodiode region. The plurality of holes can be densely formed in the substrate. At least one hole can be formed in a minimum design rule size.
摘要翻译：提供图像传感器。图像传感器可以包括半导体衬底上的隔离层，晶体管区域和光电二极管区域。可以在光电二极管区域的基板中形成多个孔。多个孔可以密集地形成在基板中。可以以最小设计规则大小形成至少一个孔。

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