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1. 发明授权

US07541279B2 Method for manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07541279B2
公开(公告)日：2009-06-02
申请号：US11615105
申请日：2006-12-22
申请人： Sang Chul Kim , Jae Won Han
发明人： Sang Chul Kim , Jae Won Han
IPC分类号： H01L21/20
CPC分类号： H01L21/76874 , C25D3/38 , C25D3/58 , C25D5/022 , C25D7/123 , H01L21/2885 , H01L21/76877
摘要： A method for manufacturing a semiconductor device is provided. The method includes the steps of forming an interlayer insulating layer on a semiconductor substrate, selectively patterning the interlayer insulating layer to form a contact hole, depositing a first metal on an inner surface of the contact hole, submerging the semiconductor substrate on which the first metal is deposited into an electrochemical plating (ECP) solution bath in which a second metal is dissolved, dissolving the first metal in the ECP solution bath, plating the first and second metals dissolved in the ECP solution bath at the same time to gap-fill an alloy of the first and second metals in the contact hole, and removing the alloy using the interlayer insulating layer as an end point in a CMP process to form an alloy interconnection.
摘要翻译：提供一种制造半导体器件的方法。该方法包括以下步骤：在半导体衬底上形成层间绝缘层，选择性地图案化层间绝缘层以形成接触孔;在接触孔的内表面上沉积第一金属;浸没第一金属沉积到其中溶解有第二金属的电化学电镀（ECP）溶液浴中，将第一金属溶解在ECP溶液浴中，同时电镀溶解在ECP溶液浴中的第一和第二金属以间隙填充接触孔中的第一和第二金属的合金，并且在CMP工艺中使用层间绝缘层作为终点去除合金以形成合金互连。

2. 发明授权

US07767481B2 Image sensor and method for manufacturing the same 失效
标题翻译：图像传感器及其制造方法
公开(公告)号：US07767481B2
公开(公告)日：2010-08-03
申请号：US11646701
申请日：2006-12-27
申请人： Sang Chul Kim , Jae Won Han
发明人： Sang Chul Kim , Jae Won Han
IPC分类号： H01L21/00
CPC分类号： H01L27/14625 , H01L27/1462 , H01L27/14685
摘要： Disclosed are an image sensor and a method for manufacturing the same, capable of increasing a light absorbing coefficient by forming a rough surface on a photodiode. The image sensor includes a semiconductor substrate with a plurality of photodiodes thereon having rough upper surfaces, a dielectric layer on the semiconductor substrate, a color filter layer on the dielectric layer, a planarization layer on an entire surface of the semiconductor substrate including the color filter layer, and a plurality of micro-lenses formed on the planarization layer to correspond to the color filter layer.
摘要翻译：公开了一种能够通过在光电二极管上形成粗糙表面来增加吸光系数的图像传感器及其制造方法。图像传感器包括其上具有多个光电二极管的半导体衬底，具有粗糙的上表面，半导体衬底上的电介质层，介电层上的滤色器层，在包括滤色器的半导体衬底的整个表面上的平坦化层以及形成在平坦化层上以对应于滤色器层的多个微透镜。

3. 发明授权

US07682965B2 Method for manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07682965B2
公开(公告)日：2010-03-23
申请号：US11604921
申请日：2006-11-27
申请人： Sang Chul Kim , Han Choon Lee
发明人： Sang Chul Kim , Han Choon Lee
IPC分类号： H01L21/4763
CPC分类号： H01L21/76886 , H01L21/02074
摘要： Provided is a method for manufacturing a semiconductor device. An insulation layer is formed on a bottom structure of a semiconductor substrate. Then, a trench and a via hole are formed by selectively etching the insulation layer, and a copper layer is deposited to fill the via hole and the trench. Next, a copper line is formed by a CMP (chemical mechanical polishing) process to planarize the copper layer, and a plasma process is performed to form a plasma-treated surface layer of the semiconductor substrate. The plasma-treated surface layer is then removed.
摘要翻译：提供一种半导体器件的制造方法。绝缘层形成在半导体衬底的底部结构上。然后，通过选择性地蚀刻绝缘层形成沟槽和通孔，并且沉积铜层以填充通孔和沟槽。接下来，通过CMP（化学机械抛光）工艺形成铜线以使铜层平坦化，并且进行等离子体处理以形成半导体衬底的等离子体处理的表面层。然后除去等离子体处理的表面层。

4. 发明申请

US20070141833A1 Method for manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20070141833A1
公开(公告)日：2007-06-21
申请号：US11604921
申请日：2006-11-27
申请人： Sang Chul Kim , Han Choon Lee
发明人： Sang Chul Kim , Han Choon Lee
IPC分类号： H01L21/4763
CPC分类号： H01L21/76886 , H01L21/02074
摘要： Provided is a method for manufacturing a semiconductor device. An insulation layer is formed on a bottom structure of a semiconductor substrate. Then, a trench and a via hole are formed by selectively etching the insulation layer, and a copper layer is deposited to fill the via hole and the trench. Next, a copper line is formed by a CMP (chemical mechanical polishing) process to planarize the copper layer, and a plasma process is performed to form a plasma-treated surface layer of the semiconductor substrate. The plasma-treated surface layer is then removed.
摘要翻译：提供一种半导体器件的制造方法。绝缘层形成在半导体衬底的底部结构上。然后，通过选择性地蚀刻绝缘层形成沟槽和通孔，并且沉积铜层以填充通孔和沟槽。接下来，通过CMP（化学机械抛光）工艺形成铜线以使铜层平坦化，并且进行等离子体处理以形成半导体衬底的等离子体处理的表面层。然后除去等离子体处理的表面层。

5. 发明授权

US07846777B2 Semiconductor device package and fabricating method thereof 失效
标题翻译：半导体器件封装及其制造方法
公开(公告)号：US07846777B2
公开(公告)日：2010-12-07
申请号：US12176110
申请日：2008-07-18
申请人： Sang Chul Kim
发明人： Sang Chul Kim
IPC分类号： H01L21/768
CPC分类号： H01L25/0655 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L24/82 , H01L2224/24137 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/04941 , H01L2924/04953 , H01L2924/14 , H01L2924/15153
摘要： A semiconductor device package and fabricating method thereof are disclosed, by which heat-dissipation efficiency is enhanced in a system by interconnection (SBI) structure. An exemplary semiconductor device package may include a substrate, at least two chips mounted on the substrate to have a space between one or more of the chips and an edge of the substrate, an insulating layer covering the chips, the insulating layer having via holes exposing portions of the at least two chips and a trench between the via holes, the insulating layer having at least two hole patterns within the space, and a metal layer filling the via holes and the trench.
摘要翻译：公开了一种半导体器件封装及其制造方法，其中通过互连（SBI）结构在系统中提高了散热效率。示例性半导体器件封装可以包括衬底，安装在衬底上的至少两个芯片以在芯片中的一个或多个与衬底的边缘之间具有空间，覆盖芯片的绝缘层，具有通孔的绝缘层暴露所述至少两个芯片的部分和所述通孔之间的沟槽，所述绝缘层在所述空间内具有至少两个孔图案，以及填充所述通孔和所述沟槽的金属层。

6. 发明申请

US20080054471A1 Semiconductor Device and Fabricating Method Thereof 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080054471A1
公开(公告)日：2008-03-06
申请号：US11846689
申请日：2007-08-29
申请人： CHEON MAN SHIM , Sang Chul Kim
发明人： CHEON MAN SHIM , Sang Chul Kim
IPC分类号： H01L21/4763 , H01L23/48
CPC分类号： H01L23/5222 , H01L21/7682 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device according to an embodiment includes a first metal wiring formed on a semiconductor substrate; a first dielectric barrier layer formed on the first metal wiring; an inter-layer dielectric (ILD) layer formed on the first dielectric barrier layer; a plurality of second metal wirings formed on the ILD layer; and at least one hole formed in the ILD layer in regions between second metal wirings.
摘要翻译：根据实施例的半导体器件包括形成在半导体衬底上的第一金属布线; 形成在所述第一金属布线上的第一电介质阻挡层; 形成在所述第一介电阻挡层上的层间介电层（ILD）层; 形成在ILD层上的多个第二金属布线; 以及在第二金属布线之间的区域中形成在ILD层中的至少一个孔。

7. 发明授权

US08031772B2 Parallel processing architecture for video decompression 有权
标题翻译：视频解压缩并行处理架构
公开(公告)号：US08031772B2
公开(公告)日：2011-10-04
申请号：US11274289
申请日：2005-11-16
申请人： Sang Chul Kim
发明人： Sang Chul Kim
IPC分类号： H04N7/12 , G06K9/36
CPC分类号： H04N19/11 , H04N19/42 , H04N19/423 , H04N19/436 , H04N19/44 , H04N19/593 , H04N19/61
摘要： Disclosed herein is a video decoding system of a mobile broadcasting receiver. The video decoding system of a mobile broadcasting receiver for decoding a compression-coded video signal includes: at least one buffer memory for performing video decoding; a plurality of coprocessors including a data processing unit partitioned into one or more hardware blocks, wherein the data processing unit performs actual video decoding via data input/output from/to the buffer memory; and a DMA (Direct Memory Access) coprocessor for performing a direct access operation to an external memory, wherein, the at least one buffer memory, the plurality of coprocessors and the DMA coprocessor take the form of hardware, and operations thereof are controlled via software in a processor.
摘要翻译：本文公开了一种移动广播接收机的视频解码系统。用于解码压缩编码视频信号的移动广播接收机的视频解码系统包括：用于执行视频解码的至少一个缓冲存储器; 多个协处理器，包括划分成一个或多个硬件块的数据处理单元，其中所述数据处理单元经由从所述缓冲存储器输入/输出的数据进行实际的视频解码; 以及用于对外部存储器执行直接访问操作的DMA（直接存储器访问）协处理器，其中，所述至少一个缓冲存储器，所述多个协处理器和所述DMA协处理器采取硬件的形式，并且其操作通过软件在处理器中。

8. 发明授权

US08268387B2 Method for forming metal line of image sensor 失效
标题翻译：形成图像传感器金属线的方法
公开(公告)号：US08268387B2
公开(公告)日：2012-09-18
申请号：US12608262
申请日：2009-10-29
申请人： Sang Chul Kim
发明人： Sang Chul Kim
IPC分类号： B05D5/12
CPC分类号： H01L27/14687 , H01L27/14632
摘要： Disclosed is a method for forming a metal line. The method includes preparing a semiconductor substrate having a first metal line, performing an oxidation process with respect to the first metal line, performing an oxide removal process to remove an oxide generated in the oxidation process, forming an etch stop layer on the metal line, forming an interlayer dielectric layer on the first metal line, and forming a damascene pattern on the interlayer dielectric layer, and forming a second metal line, which is connected with the first metal line, in the damascene pattern. The oxidation process for the first metal line can include a hydrogen peroxide treatment process using a solution including oxygen. The oxide removal process can be performed by using an oxalic acid (HOOC—COOH) solution.
摘要翻译：公开了一种形成金属线的方法。该方法包括制备具有第一金属线的半导体衬底，对第一金属线执行氧化处理，执行氧化物去除工艺以去除在氧化工艺中产生的氧化物，在金属线上形成蚀刻停止层，在所述第一金属线上形成层间电介质层，在所述层间绝缘层上形成镶嵌图案，并且以所述镶嵌图案形成与所述第一金属线连接的第二金属线。第一金属线的氧化方法可以包括使用包含氧的溶液的过氧化氢处理方法。可以通过使用草酸（HOOC-COOH）溶液进行氧化物去除处理。

9. 发明申请

US20100135854A1 BIOSENSOR HAVING TRANSISTOR STRUCTURE AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：具有晶体管结构的生物传感器及其制造方法
公开(公告)号：US20100135854A1
公开(公告)日：2010-06-03
申请号：US12536021
申请日：2009-08-05
申请人： Yong Suk YANG , Seong Hyun Kim , Sang Chul Kim , Doo Hyeb Youn , Zin Sig Kim
发明人： Yong Suk YANG , Seong Hyun Kim , Sang Chul Kim , Doo Hyeb Youn , Zin Sig Kim
IPC分类号： G01N33/53 , B05D5/12
CPC分类号： G01N33/5438 , G01N27/4145 , G01N27/4146 , G01N33/54346
摘要： Provided are a biosensor and a method of fabricating the same. The biosensor has a transistor structure including a gate electrode formed on a substrate, a gate insulating layer formed on the gate electrode, source and drain electrodes formed on the gate insulating layer, and a channel region formed between the source and drain electrodes. Here, the channel region includes an active layer formed of an active polymer sensing an antigen-antibody reaction and a hydrophilic nano particle. The active layer is formed through direct printing, for example, inkjet printing. The biosensor having such a structure can be increased in reactivity between an antigen and an antibody and hydrophilicity to improve the sensor's characteristics, fabricated in a large-area process using direct printing, and further facilitates formation of devices on various substrates formed of, for example, plastic.
摘要翻译：提供了一种生物传感器及其制造方法。生物传感器具有晶体管结构，其包括形成在基板上的栅极电极，形成在栅电极上的栅极绝缘层，形成在栅极绝缘层上的源极和漏极，以及形成在源极和漏极之间的沟道区。这里，通道区域包括由感测抗原 - 抗体反应的活性聚合物形成的活性层和亲水性纳米颗粒。有源层通过直接印刷形成，例如喷墨印刷。具有这样的结构的生物传感器可以增加抗原和抗体之间的反应性和亲水性，以提高传感器的特性，这是在使用直接印刷的大面积工艺中制造的，并且进一步有助于在由例如，塑料。

10. 发明申请

US20070151859A1 METHOD OF FORMING COPPER INTERCONNECTIONS IN SEMICONDUCTOR DEVICES 审中-公开
标题翻译：在半导体器件中形成铜互连的方法
公开(公告)号：US20070151859A1
公开(公告)日：2007-07-05
申请号：US11614713
申请日：2006-12-21
申请人： Sang Chul Kim
发明人： Sang Chul Kim
IPC分类号： C25D5/02
CPC分类号： C25D5/022 , H01L21/2885 , H01L21/7684 , H01L21/76879
摘要： A method of forming a copper interconnection including at least one of: Forming an interlayer dielectric layer over a silicon substrate. Forming a plurality of via holes and trench patterns in an interlayer dielectric layer; forming a photoresist pattern over an interlayer dielectric layer between a plurality of via hole and trench patterns. Performing an electroplating process on a silicon substrate so that copper may be filled in a plurality of via holes and trench patterns. Planarizing a copper layer so that a photoresist pattern is removed.
摘要翻译：一种形成铜互连的方法，包括以下中的至少一个：在硅衬底上形成层间电介质层。在层间介质层中形成多个通孔和沟槽图案; 在多个通孔和沟槽图案之间的层间电介质层上形成光致抗蚀剂图案。在硅衬底上执行电镀工艺，以使铜可以填充在多个通孔和沟槽图案中。使铜层平坦化，以除去光刻胶图形。

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