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1. 发明授权

US08024142B1 Method and system for analyzing signal waveforms 有权
标题翻译：信号波形分析方法及系统
公开(公告)号：US08024142B1
公开(公告)日：2011-09-20
申请号：US11961543
申请日：2007-12-20
申请人： Mathieu Gagnon , Jurgen Hissen
发明人： Mathieu Gagnon , Jurgen Hissen
IPC分类号： G06F17/18
CPC分类号： G01R13/0272 , G01R19/2509
摘要： A method and system for analyzing a signal waveform that comprises digitally sampling a signal at a periodic sampling interval, and accumulating a count of samples of the signal at a given logic level relative to a threshold value over a given period. The threshold value is stepped through a series of values while the accumulating of samples is repeated at a series of different clock offsets. The accumulated counts permit a statistical distribution of the signal waveform to be determined. A signal density can also be calculated by determining the difference between the count of adjacent samples at successive threshold values.
摘要翻译：一种用于分析信号波形的方法和系统，该信号波形包括以周期性采样间隔对信号进行数字采样，并且在给定周期内相对于阈值在给定逻辑电平处累积信号的样本计数。阈值通过一系列数值进行阶跃化，同时以一系列不同的时钟偏移重复样本的累加。累积计数允许要确定的信号波形的统计分布。信号密度也可以通过确定相邻样本在连续阈值下的计数之间的差异来计算。

2. 发明授权

US07363563B1 Systems and methods for a built in test circuit for asynchronous testing of high-speed transceivers 有权
标题翻译：用于高速收发器异步测试的内置测试电路的系统和方法
公开(公告)号：US07363563B1
公开(公告)日：2008-04-22
申请号：US11005465
申请日：2004-12-06
申请人： Jurgen Hissen , Brett Clark , Stephen Hiroshi Dick , Chris Siu
发明人： Jurgen Hissen , Brett Clark , Stephen Hiroshi Dick , Chris Siu
IPC分类号： G01R31/28 , G06F11/00 , H03L7/00
CPC分类号： H04L1/243
摘要： Methods and apparatus provide a transceiver, such as a serializer/deserializer device (SerDes), with enhanced built-in self test (BIST). A built-in self test circuit is provided that decouples a clock signal used for receiving data from a clock signal used in transmitting data. This permits data tracking circuitry of a receiver to be efficiently tested with a relatively simple loop back test.
摘要翻译：方法和装置提供了一种收发器，例如串行器/解串器装置（SerDes），具有增强的内置自检（BIST）功能。提供内置自检电路，用于将用于接收数据的时钟信号与用于发送数据的时钟信号相分离。这样可以通过相对简单的环回测试来有效地测试接收器的数据跟踪电路。

3. 发明授权

US07876866B1 Data subset selection algorithm for reducing data-pattern autocorrelations 有权
标题翻译：用于减少数据模式自相关的数据子集选择算法
公开(公告)号：US07876866B1
公开(公告)日：2011-01-25
申请号：US11339554
申请日：2006-01-26
申请人： Matthew W. McAdam , Jurgen Hissen , Graeme Boyd
发明人： Matthew W. McAdam , Jurgen Hissen , Graeme Boyd
IPC分类号： H03D1/04
CPC分类号： H04L7/0083 , H03L7/0807 , H03L7/0814 , H03L7/091 , H04L7/0337 , H04L25/03 , H04L25/03057
摘要： A method and apparatus are provided for reducing, and preferably substantially eliminating, data-pattern autocorrelations found in digital communication systems. The method employed is referred to as Data Subset Selection (DSS) and is implemented in the form of DSS engine. Autocorrelations in the data-pattern can cause many digital adaptive systems to converge to an incorrect solution. For example, the LMS method, which is often used in adaptive filtering applications, can converge to an incorrect set of filter coefficients in the presence of data-pattern autocorrelations. Digital timing recovery methods are also susceptible. Other impairments that result from data-pattern autocorrelations include increased convergence time and increased steady-state chatter. DSS reduces, and preferably substantially eliminates, data-pattern autocorrelations by selecting a subset of the data stream that either demonstrates smaller autocorrelations or no autocorrelations, thus improving the performance of the aforementioned digital adaptive systems.
摘要翻译：提供了一种用于减少并优选地基本上消除在数字通信系统中发现的数据模式自相关的方法和装置。所采用的方法称为数据子集选择（DSS），并以DSS引擎的形式实现。数据模式中的自相关可能导致许多数字自适应系统收敛到不正确的解决方案。例如，在自适应滤波应用中经常使用的LMS方法可以在存在数据模式自相关的情况下收敛到不正确的滤波器系数集合。数字定时恢复方法也很容易。由数据模式自相关产生的其他损伤包括增加的收敛时间和增加的稳态抖动。 DSS通过选择显示较小的自相关或无自相关的数据流的子集来减少并且优选地基本上消除数据模式自相关，从而改善上述数字自适应系统的性能。

4. 发明授权

US07177352B1 Pre-cursor inter-symbol interference cancellation 有权
标题翻译：前标间符号干扰消除
公开(公告)号：US07177352B1
公开(公告)日：2007-02-13
申请号：US11146375
申请日：2005-05-31
申请人： John Plasterer , Jurgen Hissen , Mathew McAdam , Anthony Eugene Zortea , Ognjen Katic
发明人： John Plasterer , Jurgen Hissen , Mathew McAdam , Anthony Eugene Zortea , Ognjen Katic
IPC分类号： H03H7/30
CPC分类号： H04L25/0307 , H04L25/061 , H04L2025/03356 , H04L2025/03617
摘要： Methods and apparatus for canceling pre-cursor inter-symbol interference (ISI) are disclosed. In a digital communication system, a significant amount of noise can be attributed to the pre-cursor portion of the ISI. In a receiver, it can be relatively difficult to compensate for pre-cursor ISI in part because pre-cursor ISI is a result of one or more symbols that have yet to arrive at the receiver. One embodiment removes a portion of this ISI by using multiple detection thresholds in parallel. For example, data slicing (generation of a hard decision) can include three thresholds. These thresholds for slicing include a positive offset, a negative offset and no offset. The positive and negative offsets can correspond to the expected pre-cursor component of the data channel for which the data is transmitted or to a fraction thereof. The path with the correctly-compensated ISI is selected later.
摘要翻译：公开了用于消除前标符号间干扰（ISI）的方法和装置。在数字通信系统中，大量噪声可归因于ISI的前标部分。在接收机中，由于前置光标ISI是尚未到达接收机的一个或多个符号的结果，所以可以相对难以补偿前置ISI。一个实施例通过并行地使用多个检测阈值去除该ISI的一部分。例如，数据切片（硬判决的产生）可以包括三个阈值。这些切片阈值包括正偏移，负偏移和无偏移。正和负偏移量可以对应于数据传输的数据信道的预期前置分量或其分数。随后选择正确补偿ISI的路径。

5. 发明授权

US07508266B1 Method for enhancing linearity of a transistor amplifier using switched capacitive loads 有权
标题翻译：使用开关电容负载提高晶体管放大器线性度的方法
公开(公告)号：US07508266B1
公开(公告)日：2009-03-24
申请号：US11846959
申请日：2007-08-29
申请人： Jurgen Hissen , Matthew W. McAdam
发明人： Jurgen Hissen , Matthew W. McAdam
IPC分类号： H03G3/10
CPC分类号： H03F1/34 , H03F1/0211 , H03F1/301 , H03F1/308 , H03F1/3205 , H03F3/3022 , H03F2200/18 , H03F2200/249 , H03F2200/453 , H03F2200/78 , H03F2203/30015 , H03F2203/30069
摘要： A method and apparatus for linearizing the gain of a common-source field effect transistor (FET) amplifier. The method involves connecting a capacitive load in parallel with the gate of the FET through a switch, and opening and closing this switch depending on the voltage on the gate of the FET. The result is a FET amplifier circuit that has a substantially linear transcapacitance characteristic, making it a useful circuit for low-distortion high-power amplifiers such as xDSL line drivers.
摘要翻译：一种用于使公共源场效应晶体管（FET）放大器的增益线性化的方法和装置。该方法包括通过开关将FET的栅极并联连接容性负载，并根据FET栅极上的电压来打开和关闭该开关。结果是具有基本上线性的转换特性的FET放大器电路，使其成为诸如xDSL线驱动器的低失真大功率放大器的有用电路。

6. 发明授权

US07200170B1 High speed I-O loopback testing with low speed DC test capability 有权
标题翻译：具有低速直流测试能力的高速I-O环回测试
公开(公告)号：US07200170B1
公开(公告)日：2007-04-03
申请号：US10193131
申请日：2002-07-12
申请人： Lisa Ann Desandoli , Jurgen Hissen , Kenneth William Ferguson , Gershom Birk
发明人： Lisa Ann Desandoli , Jurgen Hissen , Kenneth William Ferguson , Gershom Birk
IPC分类号： H04B3/46
CPC分类号： H04B3/46
摘要： A loopback circuit for testing low and high frequency operation of integrated circuit transmitter and receiver components. First and second resistors forming a first branch of the circuit are series-connected between first and second circuit ports. Third and fourth resistors forming a second branch of the circuit are series-connected between third and fourth circuit ports. A DC isolator is connected between the first and second branches. At lower frequencies, the two branches are DC-isolated, enabling ATE-measurement of the transmitter's output drive level independently of the receiver, continuity testing of ESD protection structures, etc. At higher frequencies, the transmitter's output signal is split into three portions, each of which is attenuated by a selected amount. One of the attenuated signal portions is applied to the receiver to test the receiver's sensitivity, independently of possible excess resiliency in the transmitter's output drive level.
摘要翻译：用于测试集成电路发射器和接收器组件的低频和高频操作的回送电路。形成电路的第一分支的第一和第二电阻串联连接在第一和第二电路端口之间。形成电路的第二分支的第三和第四电阻串联连接在第三和第四电路端口之间。 DC隔离器连接在第一和第二分支之间。在较低的频率下，两个分支是直流隔离的，能够独立于接收机进行ATE测量发射机的输出驱动电平，ESD保护结构的连续性测试等。在较高频率下，发射机的输出信号分为三部分，其中的每一个被衰减一定量。衰减信号部分之一被施加到接收器以独立于发射机的输出驱动级别中的可能的超额弹性来测试接收机的灵敏度。

7. 发明授权

US06812733B1 High-efficiency mixed voltage/current mode output driver 失效
标题翻译：高效率混合电压/电流模式输出驱动器
公开(公告)号：US06812733B1
公开(公告)日：2004-11-02
申请号：US10210076
申请日：2002-08-02
申请人： John Philip Plasterer , Jurgen Hissen , Victor Lee
发明人： John Philip Plasterer , Jurgen Hissen , Victor Lee
IPC分类号： H03K1716
CPC分类号： H04L25/028 , H03K3/356104 , H03K3/356182 , H04L25/0276 , H04L25/0282
摘要： Circuits and devices for an efficient, mixed voltage/current mode output driver. An output driver circuit includes a series terminated voltage mode driver circuit parallel with a current mode driver circuit. The output driver allows for a highly efficient driver but with an easily controllable output. It can be used for driving single ended or doubly terminated transmission lines.
摘要翻译：用于高效，混合电压/电流模式输出驱动器的电路和器件。输出驱动器电路包括与电流模式驱动电路并联的串联端接电压模式驱动电路。输出驱动器允许高效驱动器，但具有易于控制的输出。它可用于驱动单端或双端传输线。

8. 发明授权

US06097253A High speed process-controlled transresistance amplifier 有权
标题翻译：高速过程控制跨阻放大器
公开(公告)号：US06097253A
公开(公告)日：2000-08-01
申请号：US248903
申请日：1999-02-12
申请人： Jurgen Hissen
发明人： Jurgen Hissen
IPC分类号： H03F3/30 , H03K19/00 , H03K19/017 , H03K19/0948 , H03F3/16
CPC分类号： H03K19/01707 , H03F3/3028 , H03K19/0013 , H03K19/09482 , H03F2203/45528
摘要： A high speed, low-power transresistance amplifier incorporating a threshold-biased, current-mode feedback inverter. Starvation transistors are connected between the inverter's power supply terminals and the supply. Capacitors are connected between the power supply and the nodes at which the starvation transistors are connected to the inverter to bypass the starvation transistors and decrease the AC impedance of the nodes, as seen by the inverter. A resistive network connected between the starvation transistors and a bias voltage supply decreases the effective DC impedance of the nodes.
摘要翻译：包含门限偏置电流模式反馈逆变器的高速，低功率跨阻放大器。饥饿晶体管连接在变频器的电源端子和电源之间。电容器连接在电源和节点之间，饥饿晶体管连接到逆变器以绕过饥饿晶体管并降低节点的AC阻抗，如逆变器所见。连接在饥饿晶体管和偏压电源之间的电阻网络降低了节点的有效直流阻抗。

9. 发明授权

US08315303B1 Phase pre-emphasis for a serial data transmitter 有权
标题翻译：串行数据发送器的相位预加重
公开(公告)号：US08315303B1
公开(公告)日：2012-11-20
申请号：US12110210
申请日：2008-04-25
申请人： Jatinder Chana , Jurgen Hissen , Hossein Hashemi
发明人： Jatinder Chana , Jurgen Hissen , Hossein Hashemi
IPC分类号： H03K7/08 , H03K9/08
CPC分类号： H04L25/03343 , H04L25/4902
摘要： Apparatus and methods apply pre-emphasis to the phase rather of a signal than to the amplitude of a single. This approach can provide superior pre-emphasis performance than the conventional amplitude pre-emphasis techniques in certain situations, such as when a non-linear slicer is present in the signal path. For example, electrical-to-optical (E/O) and optical-to-electrical (O/E) converters can effectively slice a signal.
摘要翻译：装置和方法将预加重应用于相位而不是单个振幅。在某些情况下，例如当信号路径中存在非线性限幅器时，该方法可以提供比常规的幅度预加重技术更好的预加重性能。例如，电 - 光（E / O）和光 - 电（O / E）转换器可以有效地切片信号。

10. 发明授权

US08249207B1 Clock and data recovery sampler calibration 有权
标题翻译：时钟和数据恢复采样器校准
公开(公告)号：US08249207B1
公开(公告)日：2012-08-21
申请号：US12040585
申请日：2008-02-29
申请人： Jurgen Hissen , Dragos Cartina
发明人： Jurgen Hissen , Dragos Cartina
IPC分类号： H04L7/02 , H03D3/02
CPC分类号： H03L7/091 , H03L7/0807 , H04L7/033
摘要： Methods and apparatus are disclosed, such as those involving clock and data recovery sampler calibration. One such method includes receiving an electronic data stream by a clock and data recovery (CDR) circuit comprising a data sampler and an edge sampler. The data stream includes data portions and transitioning portions. The method further includes conducting calibration of the CDR circuit. The calibration includes acquiring samples from the transitioning portions of the data stream using the data sampler; and calibrating the data sampler based at least partially on the samples acquired using the data sampler. The method allows one not only to improve performance, but also to improve yield and reduce testing and screening requirements without requiring any additional circuitry to detect the offsets and works with regular input signals.
摘要翻译：公开了诸如涉及时钟和数据恢复采样器校准的方法和装置。一种这样的方法包括通过包括数据采样器和边缘采样器的时钟和数据恢复（CDR）电路接收电子数据流。数据流包括数据部分和转换部分。该方法还包括进行CDR电路的校准。校准包括使用数据采样器从数据流的转换部分获取样本; 并且至少部分地基于使用数据采样器采集的样本校准数据采样器。该方法不仅可以提高性能，而且还可以提高产量并降低测试和筛选要求，而不需要任何附加电路来检测偏移量并使用常规输入信号。

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