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1. 发明授权

US10068998B2 Semiconductor device and method of producing the same 有权
公开(公告)号：US10068998B2
公开(公告)日：2018-09-04
申请号：US13299870
申请日：2011-11-18
申请人： Michio Nemoto , Haruo Nakazawa
发明人： Michio Nemoto , Haruo Nakazawa
IPC分类号： H01L21/26 , H01L21/42 , H01L29/739 , H01L29/32 , H01L29/66 , H01L29/36 , H01L21/263 , H01L29/10
摘要： A semiconductor device is provided in which a semiconductor substrate can be prevented from being broken while elements can be prevented from being destroyed by a snap-back phenomenon. After an MOS gate structure is formed in a front surface of an FZ wafer, a rear surface of the FZ wafer is ground. Then, the ground surface is irradiated with protons and irradiated with two kinds of laser beams different in wavelength simultaneously to thereby form an N+ first buffer layer and an N second buffer layer. Then, a P+ collector layer and a collector electrode are formed on the proton-irradiated surface. The distance from a position where the net doping concentration of the N+ first buffer layer is locally maximized to the interface between the P+ collector layer and the N second buffer layer is set to be in a range of 5 μm to 30 μm, both inclusively.

2. 发明申请

US20120267681A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：US20120267681A1
公开(公告)日：2012-10-25
申请号：US13505294
申请日：2010-11-02
申请人： Michio Nemoto , Takashi Yoshimura
发明人： Michio Nemoto , Takashi Yoshimura
IPC分类号： H01L29/739 , H01L21/20 , H01L21/22 , H01L29/02
CPC分类号： H01L29/0611 , H01L21/263 , H01L21/268 , H01L21/3221 , H01L29/06 , H01L29/0684 , H01L29/0804 , H01L29/0821 , H01L29/1004 , H01L29/1095 , H01L29/32 , H01L29/36 , H01L29/66348 , H01L29/7393 , H01L29/7397 , H01L29/861 , H01L29/868 , H01L29/885
摘要： A p anode layer (2) is formed on one main surface of an n− drift layer (1). An n+ cathode layer (3) having an impurity concentration more than that of the n− drift layer (1) is formed on the other main surface of the n− drift layer (1). An anode electrode (4) is formed on the surface of the p anode layer (2). A cathode electrode (5) is formed on the surface of the n+ cathode layer (3). An n-type broad buffer region (6) that has a net doping concentration more than the bulk impurity concentration of a wafer and less than that of the n+ cathode layer (3) and the p anode layer (2) is formed in the n− drift layer (1). The resistivity ρ0 of the n− drift layer (1) satisfies 0.12V0≦ρ0≦0.25V0 with respect to a rated voltage V0. The total amount of the net doping concentration of the broad buffer region (6) is equal to or more than 4.8×1011 atoms/cm2 and equal to or less than 1.0×1012 atoms/cm2.
摘要翻译： p阳极层（2）形成在n漂移层（1）的一个主表面上。在n漂移层（1）的另一个主表面上形成杂质浓度大于n漂移层（1）的n +阴极层（3）。在p阳极层（2）的表面上形成阳极电极（4）。在n +阴极层（3）的表面上形成有阴极电极（5）。 n型宽缓冲区（6）的净掺杂浓度大于晶片的体杂质浓度并且小于n +阴极层（3）和p阳极层（2）的净掺杂浓度漂移层（1）。相对于额定电压V0，n漂移层（1）的电阻率＆rgr0满足0.12V0＆lt; nlE;＆rgr; 0＆nlE; 0.25V0。宽缓冲区域（6）的净掺杂浓度的总量等于或大于4.8×10 11原子/ cm 2，等于或小于1.0×10 12原子/ cm 2。

3. 发明授权

US08076173B2 Semiconductor device and method of producing the same 有权
公开(公告)号：US08076173B2
公开(公告)日：2011-12-13
申请号：US13017726
申请日：2011-01-31
申请人： Michio Nemoto
发明人： Michio Nemoto
IPC分类号： H01L21/00
CPC分类号： H01L29/8611 , H01L21/2255 , H01L21/263 , H01L29/167 , H01L29/66128
摘要： A semiconductor substrate and a method of its manufacture has a semiconductor substrate having a carbon concentration in a range of 6.0×1015 to 2.0×1017 atoms/cm3, both inclusively. One principal surface of the substrate is irradiated with protons and then heat-treated to thereby form a broad buffer structure, namely a region in a first semiconductor layer where a net impurity doping concentration is locally maximized. Due to the broad buffer structure, lifetime values are substantially equalized in a region extending from an interface between the first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer to the region where the net impurity doping concentration is locally maximized. In addition, the local minimum of lifetime values of the first semiconductor layer becomes high. It is thus possible to provide a semiconductor device having soft recovery characteristics, in addition to high-speed and low-loss characteristics, while suppressing a kinked leakage current waveform.

4. 发明申请

US20110186965A1 REVERSE-CONDUCTING INSULATED GATE BIPOLAR TRANSISTOR 有权
标题翻译：反向绝缘栅双极晶体管
公开(公告)号：US20110186965A1
公开(公告)日：2011-08-04
申请号：US13015229
申请日：2011-01-27
申请人： Michio NEMOTO , Souichi YOSHIDA
发明人： Michio NEMOTO , Souichi YOSHIDA
IPC分类号： H01L29/739
CPC分类号： H01L29/739
摘要： Reverse-conducting insulated gate bipolar transistor in which IGBT region and FWD region are integrated into a single body in a semiconductor substrate with a common active region is disclosed. MOS gate structure is on a first major surface side. Rear surface side structure is in a second major surface side of the semiconductor substrate and includes a plurality of recessed parts vertical to the second major surface, which are repeated periodically along the second major surface. A plurality of protruding parts are interposed between the recessed parts. Rear surface side structure includes p type collector region on a bottom surface of the recessed part, n type first field stop region at a position deeper than the collector region, n type cathode region on the top surface of the protruding part, and n type second field stop region in the protruding part at a position deeper than the cathode region.
摘要翻译：公开了其中IGBT区域和FWD区域在具有公共有源区域的半导体衬底中集成到单个体中的反向导通绝缘栅双极晶体管。 MOS栅结构在第一主表面上。后表面侧结构位于半导体基板的第二主表面侧，并且包括与第二主表面垂直的多个凹部，其沿着第二主表面周期性重复。在凹部之间插入有多个突出部。后表面侧结构包括凹部的底面上的p型集电极区域，位于比集电极区域深的位置的n型第一场停止区域，突出部分的顶面上的n型阴极区域和n型第二区域位于比阴极区域更深的位置处的突出部中的场停止区域。

5. 发明授权

US07799662B2 Power semiconductor device with soft switching characteristic and manufacturing method for same 有权
标题翻译：具有软开关特性的功率半导体器件及其制造方法
公开(公告)号：US07799662B2
公开(公告)日：2010-09-21
申请号：US12120493
申请日：2008-05-14
申请人： Michio Nemoto
发明人： Michio Nemoto
IPC分类号： H01L21/322 , H01L29/861
CPC分类号： H01L29/8611 , H01L21/2255 , H01L21/263 , H01L29/32 , H01L29/36 , H01L29/7397 , H01L29/861
摘要： After introducing oxygen into an N− type FZ wafer serving as an N− type first semiconductor layer, a P type second semiconductor layer and an anode are formed on a surface of the FZ wafer. The FZ wafer is irradiated with protons from the side of the anode, introducing crystal defects into the FZ wafer. By performing heat treatment to recover the crystal defects in the FZ wafer, the net doping concentration of a portion within the first semiconductor layer is made higher than the initial net doping concentration of the FZ wafer, and a desired broad buffer structure is formed. Accordingly, a semiconductor device with fast operation and low losses, and having soft switching characteristics, can be manufactured inexpensively using FZ bulk wafers, with good controllability and yields.
摘要翻译：在将氧气引入用作N-型第一半导体层的N型FZ晶片之后，在FZ晶片的表面上形成P型第二半导体层和阳极。 FZ晶片从阳极侧面被质子照射，将晶体缺陷引入FZ晶片。通过进行热处理以回收FZ晶片中的晶体缺陷，使第一半导体层内的部分的净掺杂浓度高于FZ晶片的初始净掺杂浓度，形成期望的宽缓冲结构。因此，具有快速操作和低损耗并且具有软开关特性的半导体器件可以使用FZ块状晶片廉价地制造，具有良好的可控性和良率。

6. 发明授权

US07728409B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07728409B2
公开(公告)日：2010-06-01
申请号：US11594975
申请日：2006-11-09
申请人： Michio Nemoto
发明人： Michio Nemoto
IPC分类号： H01L30/00
CPC分类号： H01L29/861 , H01L29/36 , H01L29/66136 , H01L29/868
摘要： A semiconductor device formed by decreasing thickness of a substrate by grinding, and performing ion implantation. In a diode in which a P anode layer and an anode electrode are formed at a side of a right face of an N− drift layer, and an N+ cathode layer and a cathode electrode are formed at a side of a back face of the N− drift layer, an N cathode buffer layer is formed thick compared with the N+-type cathode layer between the N−-type drift layer and the N+ cathode layer, the buffer layer being high in concentration compared with the N− drift layer, and low compared with the N+ cathode layer. When a reverse bias voltage is applied, a depletion layer is stopped in the middle of the N cathode buffer layer, and thus prevented from reaching the N+ cathode layer, so that the leakage current is suppressed.
摘要翻译：通过研磨减少基板的厚度并进行离子注入而形成的半导体器件。在其中在N漂移层右侧形成有P阳极层和阳极电极的二极管中，在N的背面侧形成N +阴极层和阴极电极 - 漂移层，与N型漂移层和N +阴极层之间的N +型阴极层相比，形成较厚的N阴极缓冲层，与N漂移层相比，缓冲层的浓度高; 低于N +阴极层。当施加反向偏置电压时，耗尽层在N阴极缓冲层的中间停止，从而防止到达N +阴极层，从而抑制漏电流。

7. 发明申请

US20090224284A1 SEMICONDUCTOR DEVICE AND METHOD OF PRODUCING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090224284A1
公开(公告)日：2009-09-10
申请号：US12367540
申请日：2009-02-08
申请人： Michio NEMOTO
发明人： Michio NEMOTO
IPC分类号： H01L29/66 , H01L21/26 , H01L21/329
CPC分类号： H01L29/8611 , H01L21/2255 , H01L21/263 , H01L29/167 , H01L29/66128
摘要： A semiconductor substrate and a method of its manufacture has a semiconductor substrate having a carbon concentration in a range of 6.0×1015 to 2.0×1017 atoms/cm3, both inclusively. One principal surface of the substrate is irradiated with protons and then heat-treated to thereby form a broad buffer structure, namely a region in a first semiconductor layer where a net impurity doping concentration is locally maximized. Due to the broad buffer structure, lifetime values are substantially equalized in a region extending from an interface between the first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer to the region where the net impurity doping concentration is locally maximized. In addition, the local minimum of lifetime values of the first semiconductor layer becomes high. It is thus possible to provide a semiconductor device having soft recovery characteristics, in addition to high-speed and low-loss characteristics, while suppressing a kinked leakage current waveform.
摘要翻译：半导体衬底及其制造方法具有包含碳浓度在6.0×10 15至2.0×10 17原子/ cm 3范围内的半导体衬底。用质子照射衬底的一个主表面，然后进行热处理，从而形成宽的缓冲结构，即第一半导体层中的净杂质掺杂浓度局部最大化的区域。由于宽的缓冲结构，在从第一半导体层和形成在第一半导体层上的第二半导体层之间的界面延伸到局部最大化净杂质掺杂浓度的区域的区域中，寿命值基本相等。此外，第一半导体层的寿命值的局部最小值变高。因此，可以在抑制扭结的漏电流波形的同时，提供除了高速低损耗特性之外还具有软恢复特性的半导体器件。

8. 发明申请

US20070108558A1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070108558A1
公开(公告)日：2007-05-17
申请号：US11594975
申请日：2006-11-09
申请人： Michio Nemoto
发明人： Michio Nemoto
IPC分类号： H01L29/00 , H01L31/00
CPC分类号： H01L29/861 , H01L29/36 , H01L29/66136 , H01L29/868
摘要： A semiconductor device formed by decreasing thickness of a substrate by grinding, and performing ion implantation. In a diode in which a P anode layer and an anode electrode are formed at a side of a right face of an N− drift layer, and an N+ cathode layer and a cathode electrode are formed at a side of a back face of the N− drift layer, an N cathode buffer layer is formed thick compared with the N+-type cathode layer between the N−-type drift layer and the N+ cathode layer, the buffer layer being high in concentration compared with the N− drift layer, and low compared with the N+ cathode layer. When a reverse bias voltage is applied, a depletion layer is stopped in the middle of the N cathode buffer layer, and thus prevented from reaching the N+ cathode layer, so that the leakage current is suppressed.
摘要翻译：通过研磨减少衬底的厚度并进行离子注入而形成的半导体器件。在其中在N +漂移层的右面的一侧形成P阳极层和阳极电极的二极管和N + 在N +漂移层的背面的一侧形成阴极电极，与N + +型阴极层相比，形成较厚的N阴极缓冲层在N + - +型漂移层和N + +阴极层之间，缓冲层的浓度高于N +漂移层，与N + +阴极层相比较低。当施加反向偏置电压时，耗尽层在N阴极缓冲层的中间停止，从而防止到达N + +阴极层，从而抑制漏电流。

9. 发明授权

US07075163B2 Electromagnetic noise suppressor, semiconductor device using the same, and method of manufacturing the same 有权
标题翻译：电磁噪声抑制器，使用其的半导体器件及其制造方法
公开(公告)号：US07075163B2
公开(公告)日：2006-07-11
申请号：US09826383
申请日：2001-04-04
申请人： Shigeyoshi Yoshida , Hiroshi Ono , Yoshio Awakura , Michio Nemoto , Eiji Yamanaka , Masahiro Yamaguchi , Yutaka Shimada
发明人： Shigeyoshi Yoshida , Hiroshi Ono , Yoshio Awakura , Michio Nemoto , Eiji Yamanaka , Masahiro Yamaguchi , Yutaka Shimada
IPC分类号： H01L27/14 , H01L31/00 , H01L21/00
CPC分类号： H01L23/552 , H01L23/66 , H01L2223/6627 , H01L2224/274 , H01L2924/01019 , H01L2924/19032 , H01L2924/3011
摘要： In a semiconductor bare chip (57) on the front surface whereof is formed an integrated circuit, a magnetic loss film 55 is formed on the back surface of that semiconductor bare chip.
摘要翻译：在其表面上形成集成电路的半导体裸芯片（57）中，在该半导体裸芯片的背面上形成磁损耗膜55。

10. 发明申请

US20060138607A1 Power semiconductor rectifier having broad buffer structure and method of manufacturing thereof 有权
标题翻译：具有宽缓冲结构的功率半导体整流器及其制造方法
公开(公告)号：US20060138607A1
公开(公告)日：2006-06-29
申请号：US11339900
申请日：2006-01-26
申请人： Michio Nemoto
发明人： Michio Nemoto
IPC分类号： H01L31/105
CPC分类号： H01L29/7802 , H01L21/263 , H01L29/0878 , H01L29/167 , H01L29/32 , H01L29/36 , H01L29/7395 , H01L29/7416 , H01L29/744 , H01L29/7813 , H01L29/861 , H01L29/868 , H01L29/872
摘要： Impurity concentration (Nd(X)) in an n-drift layer in a diode is at a maximum at a position at a distance Xp from an anode electrode in a direction from the anode electrode to a cathode electrode, and gradually decreases from the position toward each of the anode electrode and the cathode electrode. A ratio of the peak impurity concentration Np to an averaged impurity concentration Ndm in the n-drift layer is in the range of 1 to 5. This provides a diode and a manufacturing method thereof by which oscillations in voltage and current at reverse recovery are inhibited to achieve enhancement both in high speed and low-loss characteristics and in soft recovery characteristics.
摘要翻译：在二极管的n漂移层中的杂质浓度（N sub（X））在从阳极到阳极的方向与阳极的距离Xp处的位置处最大并且从朝向每个阳极电极和阴极电极的位置逐渐减小。 n漂移层中的杂质浓度N P p P N与平均杂质浓度N dm的比值在1至5的范围内。这提供二极管和抑制反向恢复的电压和电流的振荡的制造方法能够实现高速度，低损耗特性和软恢复特性的提高。

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