会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明申请
    • AUTOMATIC FREQUENCY CALIBRATION CIRCUIT AND AUTOMATIC FREQUENCY CALIBRATION METHOD
    • 自动频率校准电路和自动校准方法
    • US20110221489A1
    • 2011-09-15
    • US12767813
    • 2010-04-27
    • Shih-Hao TarngJia-Hung PengMing-Ching Kuo
    • Shih-Hao TarngJia-Hung PengMing-Ching Kuo
    • H03L7/08
    • H03L7/1976H03L7/087H03L7/099
    • An automatic frequency calibration circuit and an automatic frequency calibration method for a fractional-N frequency synthesizer are provided. In a calibration mode, a state machine adjusts a fractional part and an integer part of a division ratio of a frequency divider unit according to a required precision. A first and a second frequency detecting units detect a reference frequency and an output frequency of the frequency divider unit, respectively. A judging interval unit defines at least one judging period in a total comparison time. A comparator compares the outputs of the first and the second frequency detecting units and outputs a comparison result at the judging period. Wherein, the state machine changes the capacitor configuration of a voltage-controlled oscillator when the comparison result shows that the reference frequency does not match the output frequency of the frequency divider unit.
    • 提供了一种用于分数N频率合成器的自动频率校准电路和自动频率校准方法。 在校准模式中,状态机根据所需的精度来调整分频器单元的分数部分和整数部分的分频比。 第一和第二频率检测单元分别检测分频器单元的参考频率和输出频率。 判断间隔单元定义总比较时间中的至少一个判断周期。 比较器比较第一和第二频率检测单元的输出,并在判断周期输出比较结果。 其中,当比较结果表明参考频率与分频器单元的输出频率不匹配时,状态机改变压控振荡器的电容器配置。
    • 2. 发明授权
    • Circuit and method for dynamic current compensation
    • 动态电流补偿电路及方法
    • US07741911B2
    • 2010-06-22
    • US12170866
    • 2008-07-10
    • Shiau-Wen KaoMing-Ching KuoChih-Hung Chen
    • Shiau-Wen KaoMing-Ching KuoChih-Hung Chen
    • H03F3/45
    • H03F3/45475H03F3/45183H03F3/45659H03F2200/411H03F2200/456H03F2203/45526H03F2203/45528
    • An operational amplifier includes a first stage and a second stage, the first stage for receiving two input signals and the second stage being coupled to the first stage, wherein the second stage includes a first part with a first output of the operational amplifier, and a second part with a second output of the operational amplifier. A method includes providing a first current to the first part of the second stage, and providing a second current to the second part of the second stage. The method further includes adjusting the first current based on a current consumption of the first part of the second stage, and adjusting the second current based on a current consumption of the second part of the second stage, wherein the sum of the first current and the second current is substantially constant.
    • 运算放大器包括第一级和第二级,第一级用于接收两个输入信号,第二级耦合到第一级,其中第二级包括具有运算放大器的第一输出的第一部分和 第二部分是运算放大器的第二个输出。 一种方法包括向第二级的第一部分提供第一电流,并向第二级的第二部分提供第二电流。 该方法还包括基于第二级的第一部分的电流消耗来调整第一电流,并且基于第二级的第二部分的电流消耗来调整第二电流,其中第一电流和 第二电流基本上是恒定的。
    • 3. 发明申请
    • DC OFFSET CALIBRATION APPARATUS, DC OFFSET CALIBRATION SYSTEM, AND METHOD THEREOF
    • DC偏移校准装置,DC偏移校准系统及其方法
    • US20120044006A1
    • 2012-02-23
    • US12886550
    • 2010-09-20
    • Shiau-Wen KaoJia-Hung PengMing-Ching Kuo
    • Shiau-Wen KaoJia-Hung PengMing-Ching Kuo
    • H03L5/00
    • H03F3/45475H03F3/45928H03F2203/45048H03F2203/45591
    • A DC offset calibration apparatus including a signal processing unit, a comparison unit, a first resistor array, a second resistor array, and a resistor array control unit is provided. The signal processing unit receives an input differential signal and generates an output differential signal. The comparison unit detects and determines a first DC output voltage and a second DC output voltage of the output differential signal and generates a DC offset signal. First ends of the first resistor array and the second resistor array are respectively coupled to a first input terminal and a second input terminal of the signal processing unit. The resistor array control unit adjusts resistances of the first and the second resistor array according to the DC offset signal and a bit code sequence until the DC offset signal enters a transient state, so as to calibrate a DC offset voltage in the output differential signal.
    • 提供了包括信号处理单元,比较单元,第一电阻器阵列,第二电阻器阵列和电阻器阵列控制单元的DC偏移校准装置。 信号处理单元接收输入差分信号并产生输出差分信号。 比较单元检测并确定输出差分信号的第一直流输出电压和第二直流输出电压,并产生直流偏移信号。 第一电阻器阵列和第二电阻器阵列的第一端分别耦合到信号处理单元的第一输入端子和第二输入端子。 电阻器阵列控制单元根据直流偏移信号和位码序列调整第一和第二电阻器阵列的电阻,直到直流偏移信号进入过渡状态,以校准输出差分信号中的直流偏移电压。
    • 6. 发明申请
    • LOW NOISE AMPLIFIER
    • 低噪音放大器
    • US20090108943A1
    • 2009-04-30
    • US12188280
    • 2008-08-08
    • MING-CHING KUOSHIAU-WEN KAOCHIH-HUNG CHEN
    • MING-CHING KUOSHIAU-WEN KAOCHIH-HUNG CHEN
    • H03F3/45
    • H03F3/45179H03F3/19H03F2200/294H03F2203/45306H03F2203/45318
    • A low-noise amplifier circuit to convert a single-ended input into a dual-ended output includes an input transconductance stage circuit, including a first MOS transistor coupled in parallel with a second MOS transistor; a current buffer circuit, including a third MOS transistor coupled in parallel with a fourth MOS transistor; each of the first, second, third, and fourth transistors having a body, gate, source, and drain; the input transconductance stage circuit and the current buffer circuit being cascode coupled, forming a cascode amplifier configuration; the single-ended input being at the source of one of the first and second transistors in the input transconductance stage circuit; the dual-ended output being a differential output across the drain of the third transistor and the drain of the fourth transistor; the first and second transistors of the input transconductance stage circuit being cross-coupled, wherein the body of the first transistor is coupled to the source of the second transistor, and the body of the second transistor is coupled to the source of the first transistor; and the third and fourth transistors of the current buffer circuit being cross-coupled, wherein a first capacitance is coupled between the gate of the third transistor and the source of the fourth transistor, and a second capacitance is coupled between the gate of the fourth transistor and the source of the third transistor.
    • 将单端输入转换为双端输出的低噪声放大器电路包括输入跨导级电路,包括与第二MOS晶体管并联耦合的第一MOS晶体管; 电流缓冲电路,包括与第四MOS晶体管并联耦合的第三MOS晶体管; 第一,第二,第三和第四晶体管中的每一个具有主体,栅极,源极和漏极; 输入跨导级电路和当前缓冲电路被共源共栅耦合,形成共源共栅放大器配置; 单端输入在输入跨导级电路中位于第一和第二晶体管之一的源极处; 所述双端输出是跨越所述第三晶体管的漏极和所述第四晶体管的漏极的差分输出; 输入跨导级电路的第一和第二晶体管交叉耦合,其中第一晶体管的主体耦合到第二晶体管的源极,并且第二晶体管的主体耦合到第一晶体管的源极; 并且当前缓冲电路的第三和第四晶体管是交叉耦合的,其中第一电容耦合在第三晶体管的栅极和第四晶体管的源极之间,第二电容耦合在第四晶体管的栅极之间 和第三晶体管的源极。