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1. 发明申请

US20130207693A1 Resistance-Capacitance Calibration Circuit without Current Mismatch and Method thereof 有权
标题翻译：无电流不匹配的电阻电容校准电路及其方法
公开(公告)号：US20130207693A1
公开(公告)日：2013-08-15
申请号：US13439877
申请日：2012-04-05
申请人： Shiau-Wen Kao
发明人： Shiau-Wen Kao
IPC分类号： H03K5/00
CPC分类号： H03K19/00369
摘要： A resistor-capacitor (RC) calibration circuit includes: a current source, providing a current to a first node; a first switch, coupled between the first node and a second node; a second switch, coupled between the first node and a third node; a resistor, coupled between a reference terminal and the second node; a variable capacitor, coupled between the reference terminal and the third node; a third switch, coupled between the third node and the reference terminal; a comparator, comprising a first input coupled to the second node and a second input coupled to the third node; and a logic controller, coupled between an output of the comparator and the variable capacitor for outputting an adjusting signal according to an output signal of the comparator to adjust a capacitance of the variable capacitor.
摘要翻译：电阻 - 电容（RC）校准电路包括：电流源，向第一节点提供电流; 耦合在第一节点和第二节点之间的第一开关; 耦合在所述第一节点和第三节点之间的第二开关; 耦合在参考端和第二节点之间的电阻器; 耦合在参考端和第三节点之间的可变电容器; 耦合在第三节点和参考终端之间的第三开关; 比较器，包括耦合到第二节点的第一输入端和耦合到第三节点的第二输入端; 以及逻辑控制器，其耦合在所述比较器的输出端和所述可变电容器之间，用于根据所述比较器的输出信号输出调整信号，以调整所述可变电容器的电容。

2. 发明授权

US08044721B2 Low noise amplifier 有权
标题翻译：低噪声放大器
公开(公告)号：US08044721B2
公开(公告)日：2011-10-25
申请号：US12535699
申请日：2009-08-05
申请人： Ming-Ching Kuo , Chien-Nan Kuo , Shiau-Wen Kao
发明人： Ming-Ching Kuo , Chien-Nan Kuo , Shiau-Wen Kao
IPC分类号： H03F3/04
CPC分类号： H03F3/45179 , H03F2200/294 , H03F2200/534 , H03F2203/45306 , H03F2203/45311 , H03F2203/45562 , H03F2203/45621 , H03F2203/45644
摘要： A low noise amplifier including an amplifier kernel circuit and a DC bias unit is provided. The amplifier kernel circuit is used for receiving a single input signal or a differential input signal so as to output a differential output signal. The DC bias unit is coupled to the amplifier kernel circuit, and is used for processing a signal source to generate the single input signal or the differential input signal according to its circuit configuration.
摘要翻译：提供了包括放大器内核电路和直流偏置单元的低噪声放大器。放大器内核电路用于接收单个输入信号或差分输入信号，以输出差分输出信号。 DC偏置单元耦合到放大器核心电路，并用于根据其电路配置处理信号源以产生单个输入信号或差分输入信号。

3. 发明授权

US07839219B2 Low-noise amplifier circuit including band-stop filter 有权
标题翻译：低噪声放大电路包括带阻滤波器
公开(公告)号：US07839219B2
公开(公告)日：2010-11-23
申请号：US12188276
申请日：2008-08-08
申请人： Ming-Ching Kuo , Shiau-Wen Kao , Chih-Hung Chen
发明人： Ming-Ching Kuo , Shiau-Wen Kao , Chih-Hung Chen
IPC分类号： H03F3/04
CPC分类号： H03F3/193 , H03F1/56 , H03F2200/168 , H03F2200/294 , H03F2200/451 , H03H7/0115 , H03H7/1766 , H03H2007/013
摘要： A low-noise amplifier circuit includes a MOS transistor in a common gate amplifier configuration. A single-ended input is at a source of the MOS transistor. A resonant cavity filter circuit is coupled to a gate of the MOS transistor.
摘要翻译：低噪声放大器电路包括公共栅极放大器配置中的MOS晶体管。单端输入是MOS晶体管的源极。谐振腔滤波器电路耦合到MOS晶体管的栅极。

4. 发明授权

US07671686B2 Low noise amplifier 有权
标题翻译：低噪声放大器
公开(公告)号：US07671686B2
公开(公告)日：2010-03-02
申请号：US12188280
申请日：2008-08-08
申请人： Ming-Ching Kuo , Shiau-Wen Kao , Chih-Hung Chen
发明人： Ming-Ching Kuo , Shiau-Wen Kao , Chih-Hung Chen
IPC分类号： H03F3/04
CPC分类号： H03F3/45179 , H03F3/19 , H03F2200/294 , H03F2203/45306 , H03F2203/45318
摘要： A low-noise amplifier circuit to convert a single-ended input into a dual-ended output includes an input transconductance stage circuit, including a first MOS transistor coupled in parallel with a second MOS transistor; a current buffer circuit, including a third MOS transistor coupled in parallel with a fourth MOS transistor; each of the first, second, third, and fourth transistors having a body, gate, source, and drain; the input transconductance stage circuit and the current buffer circuit being cascode coupled, forming a cascode amplifier configuration; the single-ended input being at the source of one of the first and second transistors in the input transconductance stage circuit; the dual-ended output being a differential output across the drain of the third transistor and the drain of the fourth transistor; the first and second transistors of the input transconductance stage circuit being cross-coupled, wherein the body of the first transistor is coupled to the source of the second transistor, and the body of the second transistor is coupled to the source of the first transistor; and the third and fourth transistors of the current buffer circuit being cross-coupled, wherein a first capacitance is coupled between the gate of the third transistor and the source of the fourth transistor, and a second capacitance is coupled between the gate of the fourth transistor and the source of the third transistor.
摘要翻译：将单端输入转换为双端输出的低噪声放大器电路包括输入跨导级电路，包括与第二MOS晶体管并联耦合的第一MOS晶体管; 电流缓冲电路，包括与第四MOS晶体管并联耦合的第三MOS晶体管; 第一，第二，第三和第四晶体管中的每一个具有主体，栅极，源极和漏极; 输入跨导级电路和当前缓冲电路被共源共栅耦合，形成共源共栅放大器配置; 单端输入在输入跨导级电路中位于第一和第二晶体管之一的源极处; 所述双端输出是跨越所述第三晶体管的漏极和所述第四晶体管的漏极的差分输出; 输入跨导级电路的第一和第二晶体管交叉耦合，其中第一晶体管的主体耦合到第二晶体管的源极，并且第二晶体管的主体耦合到第一晶体管的源极; 并且当前缓冲电路的第三和第四晶体管是交叉耦合的，其中第一电容耦合在第三晶体管的栅极和第四晶体管的源极之间，第二电容耦合在第四晶体管的栅极之间和第三晶体管的源极。

5. 发明申请

US20090108938A1 CIRCUIT AND METHOD FOR DYNAMIC CURRENT COMPENSATION 有权
标题翻译：用于动态电流补偿的电路和方法
公开(公告)号：US20090108938A1
公开(公告)日：2009-04-30
申请号：US12170866
申请日：2008-07-10
申请人： SHIAU-WEN KAO , MING-CHING KUO , CHIH-HUNG CHEN
发明人： SHIAU-WEN KAO , MING-CHING KUO , CHIH-HUNG CHEN
IPC分类号： H03F1/30 , H03F3/45
CPC分类号： H03F3/45475 , H03F3/45183 , H03F3/45659 , H03F2200/411 , H03F2200/456 , H03F2203/45526 , H03F2203/45528
摘要： An operational amplifier includes a first stage and a second stage, the first stage for receiving two input signals and the second stage being coupled to the first stage, wherein the second stage includes a first part with a first output of the operational amplifier, and a second part with a second output of the operational amplifier. A method includes providing a first current to the first part of the second stage, and providing a second current to the second part of the second stage. The method further includes adjusting the first current based on a current consumption of the first part of the second stage, and adjusting the second current based on a current consumption of the second part of the second stage, wherein the sum of the first current and the second current is substantially constant.
摘要翻译：运算放大器包括第一级和第二级，第一级用于接收两个输入信号，第二级耦合到第一级，其中第二级包括具有运算放大器的第一输出的第一部分和第二部分是运算放大器的第二个输出。一种方法包括向第二级的第一部分提供第一电流，并向第二级的第二部分提供第二电流。该方法还包括基于第二级的第一部分的电流消耗来调整第一电流，并且基于第二级的第二部分的电流消耗来调整第二电流，其中第一电流和第二电流基本上是恒定的。

6. 发明授权

US07733136B2 Frequency synthesizer 有权
标题翻译：频率合成器
公开(公告)号：US07733136B2
公开(公告)日：2010-06-08
申请号：US12108843
申请日：2008-04-24
申请人： Chih-Hung Chen , Ming-Ching Kuo , Shiau-Wen Kao
发明人： Chih-Hung Chen , Ming-Ching Kuo , Shiau-Wen Kao
IPC分类号： H03L7/06
CPC分类号： H03L7/18 , H03L7/0895 , H03L7/095
摘要： A frequency synthesizer includes: a fractional-N synthesizer configured to provide, in a locked condition, an output signal with an output frequency based on an input signal with a reference frequency, the fractional-N synthesizer including a charge pump outputting a current to be calibrated; a lock detector coupled to the fractional-N synthesizer to detect the locked condition, the lock detector being configured to send a first signal indicating the detection; a calibration component coupled to the lock detector and the fractional-N synthesizer, the calibration component being configured to provide a second signal to calibrate the current after receiving the first signal, based on a voltage sampled from the fractional-N synthesizer; and a current source array coupled to the calibration component and the fractional N synthesizer, the current source array being configured to calibrate the current based on the second signal.
摘要翻译：频率合成器包括：分数N合成器，被配置为在锁定状态下提供具有基于具有参考频率的输入信号的输出频率的输出信号，分数N合成器包括输出电流的电荷泵校准; 锁定检测器，其耦合到所述分数N合成器以检测所述锁定状态，所述锁定检测器被配置为发送指示所述检测的第一信号; 耦合到所述锁定检测器和所述分数N合成器的校准部件，所述校准部件被配置为基于从所述分数N合成器采样的电压来提供第二信号以在接收到所述第一信号之后校准所述电流; 以及耦合到所述校准组件和所述分数N个合成器的电流源阵列，所述电流源阵列被配置为基于所述第二信号校准所述电流。

7. 发明申请

US20090108892A1 FREQUENCY SYNTHESIZER 有权
标题翻译：频率合成器
公开(公告)号：US20090108892A1
公开(公告)日：2009-04-30
申请号：US12108843
申请日：2008-04-24
申请人： Chih-Hung CHEN , Ming-Ching Kuo , Shiau-Wen Kao
发明人： Chih-Hung CHEN , Ming-Ching Kuo , Shiau-Wen Kao
IPC分类号： H03B21/02
CPC分类号： H03L7/18 , H03L7/0895 , H03L7/095
摘要： A frequency synthesizer includes: a fractional-N synthesizer configured to provide, in a locked condition, an output signal with an output frequency based on an input signal with a reference frequency, the fractional-N synthesizer including a charge pump outputting a current to be calibrated; a lock detector coupled to the fractional-N synthesizer to detect the locked condition, the lock detector being configured to send a first signal indicating the detection; a calibration component coupled to the lock detector and the fractional-N synthesizer, the calibration component being configured to provide a second signal to calibrate the current after receiving the first signal, based on a voltage sampled from the fractional-N synthesizer; and a current source array coupled to the calibration component and the fractional N synthesizer, the current source array being configured to calibrate the current based on the second signal.
摘要翻译：频率合成器包括：分数N合成器，被配置为在锁定状态下提供具有基于具有参考频率的输入信号的输出频率的输出信号，分数N合成器包括输出电流的电荷泵校准; 锁定检测器，其耦合到所述分数N合成器以检测所述锁定状态，所述锁定检测器被配置为发送指示所述检测的第一信号; 耦合到所述锁定检测器和所述分数N合成器的校准部件，所述校准部件被配置为基于从所述分数N合成器采样的电压来提供第二信号以在接收到所述第一信号之后校准所述电流; 以及耦合到所述校准组件和所述分数N个合成器的电流源阵列，所述电流源阵列被配置为基于所述第二信号校准所述电流。

8. 发明授权

US07411446B2 DC offset cancellation circuit 有权
标题翻译： DC偏移消除电路
公开(公告)号：US07411446B2
公开(公告)日：2008-08-12
申请号：US11594889
申请日：2006-11-09
申请人： Shiau-Wen Kao
发明人： Shiau-Wen Kao
IPC分类号： H03F1/02
CPC分类号： H03F3/45475 , H03F3/45973 , H03F2203/45134 , H03F2203/45138 , H03F2203/45212 , H03F2203/45441 , H03F2203/45521
摘要： A DC offset cancellation block is provided for canceling a DC offset in a signal path. The signal path may include an input and an output. The DC offset cancellation block may include an active integrator coupled between the input and the output to provide a negative feedback to the signal path. The active integrator may include an operational-amplifier (op-amp), a capacitive component with a capacitance C, and a resistive component with a resistance R, and the capacitive component may be coupled to the op-amp via a closed feedback loop. The DC offset cancellation block may also include a first amplifier with a gain of GA coupled with the capacitive component in the closed feedback loop such that a RC time constant of the active integrator is changed from RC to RCGA.
摘要翻译：提供DC偏移消除块以消除信号路径中的DC偏移。信号路径可以包括输入和输出。 DC偏移消除块可以包括耦合在输入和输出之间的有源积分器，以向信号路径提供负反馈。有源积分器可以包括运算放大器（op-amp），具有电容C的电容分量和具有电阻R的电阻分量，并且电容分量可以经由闭合反馈回路耦合到运算放大器。 DC偏移消除块还可以包括具有与闭环反馈回路中的电容分量耦合的G A增益的第一放大器，使得有源积分器的RC时间常数从RC变为RCG 。

9. 发明授权

US08773171B2 Voltage buffer 有权
标题翻译：电压缓冲器
公开(公告)号：US08773171B2
公开(公告)日：2014-07-08
申请号：US13584771
申请日：2012-08-13
申请人： Shiau-Wen Kao
发明人： Shiau-Wen Kao
IPC分类号： H03K3/00
CPC分类号： H03F3/505 , H03F2203/5015
摘要： A voltage buffer having a fist transistor, a second transistor, a third transistor and a voltage detector is provided. A first terminal of the first transistor is coupled to a first reference voltage. A first terminal of the second transistor is coupled to a second terminal of the first transistor, a control terminal of the second transistor is coupled to an input voltage, and a second terminal of the second transistor is coupled to an output voltage. A first terminal of the third transistor is coupled to a second terminal of the second transistor. A second terminal of the third transistor is coupled to a second reference voltage. The voltage detector detects a voltage of the second terminal of the first transistor to generate a detection result and outputs the detection result to a bulk terminal of the second transistor.
摘要翻译：提供具有第一晶体管，第二晶体管，第三晶体管和电压检测器的电压缓冲器。第一晶体管的第一端子耦合到第一参考电压。第二晶体管的第一端子耦合到第一晶体管的第二端子，第二晶体管的控制端耦合到输入电压，第二晶体管的第二端耦合到输出电压。第三晶体管的第一端子耦合到第二晶体管的第二端子。第三晶体管的第二端子耦合到第二参考电压。电压检测器检测第一晶体管的第二端子的电压以产生检测结果，并将检测结果输出到第二晶体管的体积端子。

10. 发明申请

US20100308914A1 LOW NOISE AMPLIFIER 有权
标题翻译：低噪音放大器
公开(公告)号：US20100308914A1
公开(公告)日：2010-12-09
申请号：US12535699
申请日：2009-08-05
申请人： Ming-Ching Kuo , Chien-Nan Kuo , Shiau-Wen Kao
发明人： Ming-Ching Kuo , Chien-Nan Kuo , Shiau-Wen Kao
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F2200/294 , H03F2200/534 , H03F2203/45306 , H03F2203/45311 , H03F2203/45562 , H03F2203/45621 , H03F2203/45644
摘要： A low noise amplifier including an amplifier kernel circuit and a DC bias unit is provided. The amplifier kernel circuit is used for receiving a single input signal or a differential input signal so as to output a differential output signal. The DC bias unit is coupled to the amplifier kernel circuit, and is used for processing a signal source to generate the single input signal or the differential input signal according to its circuit configuration.
摘要翻译：提供了包括放大器内核电路和直流偏置单元的低噪声放大器。放大器内核电路用于接收单个输入信号或差分输入信号，以输出差分输出信号。 DC偏置单元耦合到放大器核心电路，并用于根据其电路配置处理信号源以产生单个输入信号或差分输入信号。

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