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1. 发明授权

US08124521B2 Electrical through contact 有权
标题翻译：电气通过接触
公开(公告)号：US08124521B2
公开(公告)日：2012-02-28
申请号：US11745145
申请日：2007-05-07
申请人： Harry Hedler , Roland Irsigler , Volker Lehmann , Judith Lehmann, legal representative , Thorsten Meyer , Octavio Trovarelli
发明人： Harry Hedler , Roland Irsigler , Volker Lehmann , Thorsten Meyer , Octavio Trovarelli
IPC分类号： H01L21/4763
CPC分类号： H01L21/76898 , H01L24/05 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/13009 , H01L2224/13025 , H01L2224/83894 , H01L2224/9202 , H01L2225/06513 , H01L2225/06541 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/05042 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2224/05552 , H01L2924/00
摘要： A method of fabricating an electrical contact through a through hole in a substrate, wherein the through hole is at least in part filled with a liquid conductive material and the solidified liquid conductive material provides an electrical contact through the through hole.
摘要翻译：一种通过衬底中的通孔制造电接触的方法，其中所述通孔至少部分地填充有液体导电材料，并且所述固化的液体导电材料通过所述通孔提供电接触。

2. 发明授权

US08072084B2 Integrated circuit, circuit system, and method of manufacturing 有权
标题翻译：集成电路，电路系统及制造方法
公开(公告)号：US08072084B2
公开(公告)日：2011-12-06
申请号：US11855734
申请日：2007-09-14
申请人： Roland Irsigler , Harry Hedler , Stephan Dobritz
发明人： Roland Irsigler , Harry Hedler , Stephan Dobritz
IPC分类号： H01L23/482
CPC分类号： H01L24/11 , H01L23/3128 , H01L23/5387 , H01L23/5389 , H01L24/05 , H01L24/13 , H01L2224/0401 , H01L2224/12105 , H01L2224/13099 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/16 , H01L2924/0001 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/01049 , H01L2924/01072 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/3011 , H01L2924/00014
摘要： An integrated circuit, a circuit system and method of manufacturing such is disclosed. One embodiment provides a circuit chip including a first contact field on a chip surface; and an insulating layer on the chip surface. The insulating layer includes a flexible material. A contact pillar is coupled to the first contact field and extends from the chip surface through the insulating layer. The contact pillar includes a conductive material.
摘要翻译：公开了一种集成电路，电路系统及其制造方法。一个实施例提供一种包括芯片表面上的第一接触场的电路芯片; 以及芯片表面上的绝缘层。绝缘层包括柔性材料。接触柱耦合到第一接触场，并从芯片表面延伸穿过绝缘层。接触柱包括导电材料。

3. 发明授权

US08048479B2 Method for placing material onto a target board by means of a transfer board 有权
标题翻译：通过转印板将材料放置在目标板上的方法
公开(公告)号：US08048479B2
公开(公告)日：2011-11-01
申请号：US11496724
申请日：2006-08-01
申请人： Harry Hedler , Roland Irsigler , Volker Lehmann , Judith Lehmann, legal representative
发明人： Harry Hedler , Roland Irsigler , Volker Lehmann
IPC分类号： B05D5/12 , B05D1/18 , B23K31/00 , H01L23/48
CPC分类号： H05K3/3468 , H01L21/6835 , H01L24/11 , H01L51/0003 , H01L2224/0554 , H01L2224/05568 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/11003 , H01L2224/11334 , H01L2224/13099 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01033 , H01L2924/01075 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H01L2924/351 , H01R43/0235 , H05K3/207 , H05K3/3478 , H05K2203/0113 , H05K2203/0338 , H05K2203/043 , Y10T29/49155 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A method for placing material onto a target board by means of a transfer board comprising a plurality of blind holes, the method comprising the steps of immersing the transfer board in a material bath, wherein a first pressure acts on the material bath and a second pressure acts in the blind holes, and wherein the first pressure and the second pressure are substantially equal; generating a pressure difference between the first pressure and the second pressure, so that the blind holes of the transfer board are filled at least partially with the liquid material; extracting the transfer board from the material bath; and positioning the transfer board opposite to the target board, the material being expelled from the blind holes, such that the material touches the target board.
摘要翻译：一种通过包括多个盲孔的转印板将材料放置在目标板上的方法，所述方法包括以下步骤：将转印板浸入材料浴中，其中第一压力作用在材料槽上，第二压力作用在盲孔中，并且其中第一压力和第二压力基本相等; 产生第一压力和第二压力之间的压力差，使得转印板的盲孔至少部分地用液体材料填充; 从材料浴中提取转移板; 并且将转印板定位在与目标板相对的位置，材料从盲孔排出，使得材料接触目标板。

4. 发明授权

US07847415B2 Method for manufacturing a multichip module assembly 有权
标题翻译：制造多芯片组件的方法
公开(公告)号：US07847415B2
公开(公告)日：2010-12-07
申请号：US12175726
申请日：2008-07-18
申请人： Harry Hedler , Roland Irsigler
发明人： Harry Hedler , Roland Irsigler
IPC分类号： H01L23/52 , H01L23/48 , H01L29/40
CPC分类号： H01L21/561 , H01L21/568 , H01L23/3128 , H01L23/5389 , H01L23/552 , H01L24/19 , H01L24/82 , H01L24/96 , H01L25/0652 , H01L25/0655 , H01L25/0657 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/16 , H01L2224/20 , H01L2224/211 , H01L2224/24137 , H01L2224/32145 , H01L2224/32225 , H01L2224/73267 , H01L2224/8203 , H01L2225/06527 , H01L2225/06541 , H01L2225/06562 , H01L2924/01029 , H01L2924/01033 , H01L2924/1433 , H01L2924/15311 , H01L2924/19103 , H01L2924/3025 , H01L2924/3511 , H01L2924/00
摘要： A multichip module assembly includes a chipset of at least two chips. The chips have active sides, rear sides and chip contacts on their active sides adjacent each other and are embedded in a polymer matrix in a symmetrical manner relating to the top and the bottom surface of the chipset. Chip contacts are electrically connected by through polymer connectors that each extend from a chip contact to a surface of the polymer matrix. A film wiring line is arranged on a side of the polymer matrix for electrical connection of two through polymer connectors of two chips or a through polymer connector with an interconnect element arranged on a side of the polymer matrix.
摘要翻译：多芯片模块组件包括至少两个芯片的芯片组。这些芯片在其相互相邻的主动侧具有主动侧面，后侧和芯片触点，并且以与芯片组的顶表面和底表面相对称的对称方式嵌入聚合物基体中。芯片触点通过聚合物连接器电连接，每个聚合物连接器从芯片接触延伸到聚合物基体的表面。在聚合物基体的一侧设置膜布线，用于将两个芯片的两个通过聚合物连接器或通过聚合物连接器与布置在聚合物基体侧面的互连元件电连接。

5. 发明授权

US07638869B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07638869B2
公开(公告)日：2009-12-29
申请号：US11692637
申请日：2007-03-28
申请人： Roland Irsigler , Steve Wood , Hermann Ruckerbauer , Richard Johannes Luyken , Carsten Niepelt
发明人： Roland Irsigler , Steve Wood , Hermann Ruckerbauer , Richard Johannes Luyken , Carsten Niepelt
IPC分类号： H01L23/48
CPC分类号： H01L25/0657 , H01L23/481 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/85 , H01L2224/05001 , H01L2224/05022 , H01L2224/05553 , H01L2224/0557 , H01L2224/05571 , H01L2224/13144 , H01L2224/13147 , H01L2224/16145 , H01L2224/16225 , H01L2224/16235 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48471 , H01L2224/73204 , H01L2224/73257 , H01L2224/73265 , H01L2224/81801 , H01L2224/85 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06541 , H01L2225/06555 , H01L2225/06562 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/1433 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/05099 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： A semiconductor device having a stacked arrangement of a substrate and a first chip and a second chip is disclosed. In one embodiment, the first chip is arranged with a lower face on an upper face of the substrate; the second chip with a lower face on an upper face of the first chip, whereby a partial area of the upper face of the first chip that is adjacent to an edge of the first chip is uncovered by the second chip; a fifth wire contact pad is arranged on the uncovered area of the upper face of the first chip; a first bonding wire is arranged that is connected with a first wire contact pad of the substrate and the fifth wire contact pad of the first chip.
摘要翻译：公开了具有基板和第一芯片和第二芯片的堆叠布置的半导体器件。在一个实施例中，第一芯片布置成在基板的上表面上具有下表面; 所述第二芯片在所述第一芯片的上表面上具有下表面，由此所述第一芯片的与所述第一芯片的边缘相邻的部分区域被所述第二芯片覆盖; 第五线接触垫布置在第一芯片的上表面的未覆盖区域上; 布置第一接合线，其与基板的第一线接触焊盘和第一芯片的第五线接触焊盘连接。

6. 发明申请

US20090218690A1 Reduced-Stress Through-Chip Feature and Method of Making the Same 有权
标题翻译：降低应力芯片的特点及其制作方法
公开(公告)号：US20090218690A1
公开(公告)日：2009-09-03
申请号：US12039232
申请日：2008-02-28
申请人： Harry Hedler , Roland Irsigler , Rolf Weis , Detlef Weber
发明人： Harry Hedler , Roland Irsigler , Rolf Weis , Detlef Weber
IPC分类号： H01L23/52 , H05K1/00 , H01L21/4763
CPC分类号： H01L23/564 , H01L23/481 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A feature is inscribed in a major surface of a microelectronic workpiece having a material property expressed as a reference coefficient value. The feature includes a first material having a first coefficient value for the material property and a second material having a second coefficient value for the material property. The first coefficient value is different from the reference coefficient value different from the first coefficient value and the second coefficient value is different from the first coefficient value. The first and second materials behave as an aggregate having an aggregate coefficient value for the material property between the first coefficient value and the reference coefficient value.
摘要翻译：特征是刻在具有表示为参考系数值的材料性质的微电子工件的主表面上。该特征包括具有用于材料性质的第一系数值的第一材料和具有用于材料性质的第二系数值的第二材料。第一系数值不同于与第一系数值不同的参考系数值，第二系数值与第一系数值不同。第一和第二材料表现为具有第一系数值和参考系数值之间的材料特性的聚集系数值的聚集体。

7. 发明授权

US07087512B2 Method for fabricating connection regions of an integrated circuit, and integrated circuit having connection regions 有权
公开(公告)号：US07087512B2
公开(公告)日：2006-08-08
申请号：US10642092
申请日：2003-08-15
申请人： Harry Hedler , Roland Irsigler , Thorsten Meyer , Barbara Vasquez
发明人： Harry Hedler , Roland Irsigler , Thorsten Meyer , Barbara Vasquez
IPC分类号： H01L21/44
CPC分类号： H01L24/13 , H01L24/11 , H01L2224/05001 , H01L2224/05008 , H01L2224/05024 , H01L2224/05026 , H01L2224/05568 , H01L2224/05569 , H01L2224/13099 , H01L2224/131 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2224/05541 , H01L2224/05005 , H01L2224/05644 , H01L2924/00014 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166
摘要： A method for fabricating an integrated circuit connection region includes application of a dielectric to an integrated circuit with a connection region, application of a corrodible metalization layer to the dielectric, application of a protection device to the metalization layer, and removal of the protection device in a region around the connection region.

8. 发明授权

US07080988B2 Flexible contact-connection device 失效
标题翻译：灵活的接触连接装置
公开(公告)号：US07080988B2
公开(公告)日：2006-07-25
申请号：US11137061
申请日：2005-05-25
申请人： Harry Hedler , Roland Irsigler , Thorsten Meyer , Andreas Wolter
发明人： Harry Hedler , Roland Irsigler , Thorsten Meyer , Andreas Wolter
IPC分类号： H01R12/00 , H05K1/00
CPC分类号： H05K3/4007 , G01R1/06711 , G01R1/07357 , H05K3/326 , H05K2201/0133 , H05K2201/0367
摘要： The present invention relates to an elastic contact-connecting device. An elastic elevation 3 is applied to a carrier area 2 of a carrier 1. The elastic elevation 3 has a first oblique area 4, a second ramp 5 and a roof area 6. The first oblique area 4 has a lesser inclination (30) with regard to the carrier area 2 than the second oblique area 5. A contact region 20 is applied to the roof area 6 of the elastic elevation. The contact region 20 is connected to other structures 12 on the carrier 1 via a conductor track 10. For this purpose, the conductor track 10 is guided over the first oblique area 4. If a mating contact is pressed onto the contact region 20, the elastic elevation yields, but presses against the mating contact on account of its elastic property and thus enables a reliable contact. In this case, essentially only the second oblique area 5 is deformed; the first oblique area 4 and the conductor track 10 applied thereto are not subjected to any mechanical stress.
摘要翻译：本发明涉及弹性接触连接装置。弹性高度3被施加到载体1的载体区域2。弹性高度3具有第一倾斜区域4，第二斜坡5和屋顶区域6。第一倾斜区域4相对于载体区域2具有比第二倾斜区域5更小的倾斜度（30）。接触区域20被施加到弹性高度的屋顶区域6。接触区域20经由导体轨道10连接到载体1上的其它结构12。为此，导体轨道10被引导在第一倾斜区域4上。如果配合接触件被按压到接触区域20上，则由于其弹性而使弹性高度屈服，而是压靠配合接触，因此能够进行可靠的接触。在这种情况下，基本上仅第二倾斜区域5变形; 施加到其上的第一倾斜区域4和导体轨道10不会受到任何机械应力。

9. 发明授权

US07074649B2 Method for producing an integrated circuit with a rewiring device and corresponding integrated circuit 失效
标题翻译：一种具有重新布线装置和相应集成电路的集成电路的制造方法
公开(公告)号：US07074649B2
公开(公告)日：2006-07-11
申请号：US10721745
申请日：2003-11-26
申请人： Harry Hedler , Roland Irsigler , Thorsten Meyer
发明人： Harry Hedler , Roland Irsigler , Thorsten Meyer
IPC分类号： H01L21/60 , H01L23/12
CPC分类号： H01L24/19 , H01L23/3114 , H01L24/97 , H01L2224/04105 , H01L2224/20 , H01L2224/97 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01082 , H01L2924/12041 , H01L2924/14 , H01L2924/15311 , H01L2924/19043 , H01L2224/82
摘要： The present invention provides a method for producing an integrated circuit with a rewiring device. In the method, there is provision of a carrier device with defined cutouts, application of at least one integrated circuit upside down to the carrier device such that the defined cutouts of the carrier device are located above at least one connection device of the integrated circuit application of an insulation device to that side of the carrier device which is not covered by the integrated circuit, omitting the at least one connection device in the cutout); application of the patterned rewiring device to the insulation device; application of a patterned solder resist device to the patterned rewiring device; and patterned application of solder balls on sections of the rewiring device which are not covered by the patterned solder resist device. The present invention likewise provides such an apparatus.
摘要翻译：本发明提供一种利用重新布线装置制造集成电路的方法。在该方法中，提供具有限定切口的载体装置，将至少一个集成电路应用到载体装置上，使得载体装置的限定切口位于集成电路应用的至少一个连接装置上方绝缘装置到所述载体装置的未被所述集成电路覆盖的一侧，省略所述切口中的所述至少一个连接装置）; 将图案化重新布线装置应用于绝缘装置; 将图案化阻焊装置应用于图案化的重新布线装置; 以及在未被图案化阻焊装置覆盖的重新布线装置的部分上的焊球的图案化应用。本发明同样提供了这种装置。

10. 发明申请

US20050077632A1 Method for producing a multichip module and multichip module 有权
标题翻译：多芯片模块和多芯片模块的制造方法
公开(公告)号：US20050077632A1
公开(公告)日：2005-04-14
申请号：US10952383
申请日：2004-09-29
申请人： Harry Hedler , Roland Irsigler
发明人： Harry Hedler , Roland Irsigler
IPC分类号： H01L25/18 , H01L21/60 , H01L21/98 , H01L23/538 , H01L25/065 , H01L25/07 , H01L21/48 , H01L29/40
CPC分类号： H01L25/50 , H01L23/5389 , H01L24/18 , H01L24/48 , H01L24/82 , H01L25/0657 , H01L2224/16145 , H01L2224/18 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73207 , H01L2224/73265 , H01L2225/0651 , H01L2225/06513 , H01L2225/06575 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/12041 , H01L2924/15311 , H01L2924/181 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A method for producing a multi-chip module having application of at least one contact elevation onto a substrate, application and patterning of a rewiring device onto the substrate and the at least one contact elevation with provision of a contact device on the at least one contact elevation, application of a semiconductor chip onto the substrate with electrical contact-connection of the rewiring device; application of an encapsulating device that is not electrically conductive onto the semiconductor chip, the substrate, the rewiring device and the at least one contact elevation, the contact device on the at least one contact elevation at least touching a first surface of the encapsulating device; and repetition at least once of at least the first two steps, the first surface of the encapsulating device serving as a substrate and the correspondingly produced rewiring device making electrical contact with the contact device of the at least one contact elevation of the underlying plane.
摘要翻译：一种制造多芯片模块的方法，该多芯片模块具有将至少一个接触高度应用到基板上，将重新布线装置应用到图案和基板上，以及至少一个接触高度，在该至少一个触点上设置接触装置升高，将重新布线装置的电接点连接到半导体芯片上; 施加不导电到该半导体芯片，该基板，重新布线装置和该至少一个接触高度的封装装置，该至少一个接触高度上的该接触装置至少接触该封装装置的第一表面; 并且至少在前两个步骤中至少重复一次，封装装置的第一表面用作基板，并且相应地产生的重新布线装置与底层平面的至少一个接触高度与接触装置电接触。

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