专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20110279170A1 EMBEDDED SAR BASED ACTIVE GAIN CAPACITANCE MEASUREMENT SYSTEM AND METHOD 有权
标题翻译：基于嵌入式SAR的主动增益电容测量系统和方法
公开(公告)号：US20110279170A1
公开(公告)日：2011-11-17
申请号：US13194605
申请日：2011-07-29
申请人： Ronald F. Cormier, JR.
发明人： Ronald F. Cormier, JR.
IPC分类号： H03K17/96
CPC分类号： G01R27/2605 , G01D1/00 , G01D15/00 , G01D21/00 , G06F3/044 , G06F2203/0336
摘要： A system for measuring a capacitor (CSENj) precharges a CDAC (23) in a SAR converter (17) to a reference voltage (VAZ) and also precharges a first terminal (3-j) of the capacitor to another reference voltage (GND). During a measurement phase, the CDAC is coupled between an output and an input of an amplifier (31) and the capacitor also is coupled to the input of the amplifier, so as to redistribute charge between the capacitor and the CDAC. The amplifier generates an output voltage (VAMP) representing the capacitance being measured. The output voltage is stored in the CDAC. The SAR converter converts the output voltage to a digital value representing the capacitance being measured.
摘要翻译：用于测量电容器（CSENj）的系统将SAR转换器（17）中的CDAC（23）预充电到参考电压（VAZ），并且还将电容器的第一端子（3-j）预充电到另一参考电压（GND）。在测量阶段期间，CDAC耦合在放大器（31）的输出端和输入端之间，并且电容器还耦合到放大器的输入端，以便在电容器和CDAC之间重新分配电荷。放大器产生表示被测电容的输出电压（VAMP）。输出电压存储在CDAC中。 SAR转换器将输出电压转换为表示被测电容的数字值。

2. 发明申请

US20110234534A1 CAPACITANCE MEASUREMENT SYSTEM AND METHOD 有权
标题翻译：电容测量系统和方法
公开(公告)号：US20110234534A1
公开(公告)日：2011-09-29
申请号：US13151712
申请日：2011-06-02
申请人： Michael Mueck , Ronald F. Cormier, JR.
发明人： Michael Mueck , Ronald F. Cormier, JR.
IPC分类号： G06F3/044
CPC分类号： G01R27/2605 , G01D1/00 , G01D15/00 , G01D21/00 , G06F3/044
摘要： A capacitance measurement system precharges first terminals (21-0 . . . 21-k . . . 21-n) of a plurality of capacitors (25-0 . . . 25-k . . . 25), respectively, of a CDAC (capacitor digital-to-analog converter) (23) included in a SAR (successive approximation register) converter (17) to a first voltage (VDD) and pre-charges a first terminal (3-j) of a capacitor (CSENj) to a second voltage (GND). The first terminals are coupled to the first terminal of the capacitor to redistribute charges therebetween so as to generate a first voltage on the first terminals and the first terminal of the capacitor, the first voltage being representative of a capacitance of the first capacitor (CSENj). A SAR converter converts the first voltage to a digital representation (DATA) of the capacitor. The capacitance can be a touch screen capacitance.
摘要翻译：电容测量系统分别为CDAC的多个电容器（25-0。。25-k。。25）的第一端子（21-0。。21-k。。21-n）预充电包括在SAR（逐次逼近寄存器）转换器（17）中的电容（数字 - 模拟转换器）（23）到第一电压（VDD）并对电容器（CSENj）的第一端子（3-j）进行预充电，到第二电压（GND）。第一端子耦合到电容器的第一端子以重新分配电荷，以在第一端子和电容器的第一端子上产生第一电压，第一电压代表第一电容器（CSENj）的电容，。 SAR转换器将第一电压转换为电容器的数字表示（DATA）。电容可以是触摸屏电容。

3. 发明申请

US20100244859A1 Deconvolution-based capacitive touch detection circuit and method 有权
标题翻译：基于去卷积的电容式触摸检测电路及方法
公开(公告)号：US20100244859A1
公开(公告)日：2010-09-30
申请号：US12587453
申请日：2009-10-07
申请人： Ronald F. Cormier, JR. , Michael D. Snedeker
发明人： Ronald F. Cormier, JR. , Michael D. Snedeker
IPC分类号： G01R27/26
CPC分类号： G06F3/044
摘要： A capacitance measuring system includes analog-digital circuitry (15) coupled to row conductors (2i) and column conductors (3i) of a touch screen panel (13A) for producing a first digital signal (DATA) representative of cross-coupling capacitances (CSENij). Row drive circuitry (45) superimposes charge transfers from cross-coupling capacitances of the row conductors to a first column conductor to cause the first digital signal to be a convoluted signal. Calibration circuitry (39,40) subtracts base line data from the first digital signal to produce a second digital signal (ΔDATA) representing touch-induced capacitance change values (ΔCSENIJ). A deconvolution circuit (44) deconvolutes the second digital signal to produce a digital output (58) representing a magnitude map of the touch-induced capacitance change values.
摘要翻译：电容测量系统包括耦合到触摸屏面板（13A）的行导体（2i）和列导体（3i）的模拟数字电路（15），用于产生代表交叉耦合电容的第一数字信号（DATA）（CSENij ）。行驱动电路（45）将从行导体的交叉耦合电容的电荷转移叠加到第一列导体，以使第一数字信号成为卷积信号。校准电路（39,40）从第一数字信号中减去基线数据以产生表示触摸感应电容变化值（＆Dgr; CSENIJ）的第二数字信号（＆Dgr; DATA）。去卷积电路（44）对第二数字信号进行去卷积以产生表示触摸感应电容变化值的幅度图的数字输出（58）。

4. 发明申请

US20080048901A1 Multiple-bank CMOS image sensor system and method 有权
公开(公告)号：US20080048901A1
公开(公告)日：2008-02-28
申请号：US11507799
申请日：2006-08-22
申请人： Ronald F. Cormier
发明人： Ronald F. Cormier
IPC分类号： H03M1/12
CPC分类号： H04N5/3742 , H03M1/1225 , H04N5/3575 , H04N5/378
摘要： A CMOS image sensor system includes first and second groups of CMOS sensors each responsive to periodic first and second clock signal edges, the second clock signal edge being out-of-phase with the first clock signal edge. Output signals of the first group of CMOS sensors are coupled to a first group of sampling capacitors, respectively, by a first group of sampling switches. Then output signals of the second group of CMOS sensors are coupled to a second group of sampling capacitors, respectively, by means of a second group of sampling switches. Sampled signals on the second group of sampling capacitors to an input of an ADC, and then sampled signals on the first group of sampling capacitors are coupled to the input of the ADC by means of by multiplexing and sample/hold circuitry. A phase of at least one of the first and second clock signal edges is adjusted in response to calibration information so as to avoid circuit noise from being superimposed on sampled signals coupled to the input of the ADC.

5. 发明授权

US08368409B2 Capacitance measurement system and method 有权
标题翻译：电容测量系统及方法
公开(公告)号：US08368409B2
公开(公告)日：2013-02-05
申请号：US13151712
申请日：2011-06-02
申请人： Michael Mueck , Ronald F. Cormier, Jr.
发明人： Michael Mueck , Ronald F. Cormier, Jr.
IPC分类号： G01R27/26
CPC分类号： G01R27/2605 , G01D1/00 , G01D15/00 , G01D21/00 , G06F3/044
摘要： A capacitance measurement system precharges first terminals (21-0 . . . 21-k . . . 21-n) of a plurality of capacitors (25-0 . . . 25-k . . . 25), respectively, of a CDAC (capacitor digital-to-analog converter) (23) included in a SAR (successive approximation register) converter (17) to a first voltage (VDD) and pre-charges a first terminal (3-j) of a capacitor (CSENj) to a second voltage (GND). The first terminals are coupled to the first terminal of the capacitor to redistribute charges therebetween so as to generate a first voltage on the first terminals and the first terminal of the capacitor, the first voltage being representative of a capacitance of the first capacitor (CSENj). A SAR converter converts the first voltage to a digital representation (DATA) of the capacitor. The capacitance can be a touch screen capacitance.
摘要翻译：电容测量系统分别为CDAC的多个电容器（25-0。。25-k。。25）的第一端子（21-0。。21-k。。21-n）预充电包括在SAR（逐次逼近寄存器）转换器（17）中的电容（数字 - 模拟转换器）（23）到第一电压（VDD）并对电容器（CSENj）的第一端子（3-j）进行预充电，到第二电压（GND）。第一端子耦合到电容器的第一端子以重新分配电荷，以在第一端子和电容器的第一端子上产生第一电压，第一电压代表第一电容器（CSENj）的电容，。 SAR转换器将第一电压转换为电容器的数字表示（DATA）。电容可以是触摸屏电容。

6. 发明申请

US20100244858A1 Embedded sar based active gain capacitance measurement system and method 有权
标题翻译：嵌入式基于有源增益电容的测量系统和方法
公开(公告)号：US20100244858A1
公开(公告)日：2010-09-30
申请号：US12383696
申请日：2009-03-27
申请人： Ronald F. Cormier, JR.
发明人： Ronald F. Cormier, JR.
IPC分类号： G01R27/26
CPC分类号： G01R27/2605 , G01D1/00 , G01D15/00 , G01D21/00 , G06F3/044 , G06F2203/0336
摘要： A system for measuring a capacitor (CSENj) precharges a CDAC (23) in a SAR converter (17) to a reference voltage (VAZ) and also precharges a first terminal (3-j) of the capacitor to another reference voltage (GND). During a measurement phase, the CDAC is coupled between an output and an input of an amplifier (31) and the capacitor also is coupled to the input of the amplifier, so as to redistribute charge between the capacitor and the CDAC. The amplifier generates an output voltage (VAMP) representing the capacitance being measured. The output voltage is stored in the CDAC. The SAR converter converts the output voltage to a digital value representing the capacitance being measured.
摘要翻译：用于测量电容器（CSENj）的系统将SAR转换器（17）中的CDAC（23）预充电到参考电压（VAZ），并且还将电容器的第一端子（3-j）预充电到另一参考电压（GND）。在测量阶段期间，CDAC耦合在放大器（31）的输出端和输入端之间，并且电容器还耦合到放大器的输入端，以便在电容器和CDAC之间重新分配电荷。放大器产生表示被测电容的输出电压（VAMP）。输出电压存储在CDAC中。 SAR转换器将输出电压转换为表示被测电容的数字值。

7. 发明授权

US07443331B2 Multiple-bank CMOS image sensor system and method 有权
标题翻译：多库CMOS图像传感器系统及方法
公开(公告)号：US07443331B2
公开(公告)日：2008-10-28
申请号：US11507799
申请日：2006-08-22
申请人： Ronald F. Cormier, Jr.
发明人： Ronald F. Cormier, Jr.
IPC分类号： H03M1/12
CPC分类号： H04N5/3742 , H03M1/1225 , H04N5/3575 , H04N5/378
摘要： A CMOS image sensor system includes first and second groups of CMOS sensors each responsive to periodic first and second clock signal edges, the second clock signal edge being out-of-phase with the first clock signal edge. Output signals of the first group of CMOS sensors are coupled to a first group of sampling capacitors, respectively, by a first group of sampling switches. Then output signals of the second group of CMOS sensors are coupled to a second group of sampling capacitors, respectively, by means of a second group of sampling switches. Sampled signals on the second group of sampling capacitors to an input of an ADC, and then sampled signals on the first group of sampling capacitors are coupled to the input of the ADC by means of by multiplexing and sample/hold circuitry. A phase of at least one of the first and second clock signal edges is adjusted in response to calibration information so as to avoid circuit noise from being superimposed on sampled signals coupled to the input of the ADC.
摘要翻译： CMOS图像传感器系统包括第一和第二组CMOS传感器，每个CMOS传感器响应于周期性的第一和第二时钟信号边缘，第二时钟信号边沿与第一时钟信号边沿不同相。第一组CMOS传感器的输出信号分别由第一组采样开关耦合到第一组采样电容器。然后，第二组CMOS传感器的输出信号分别通过第二组采样开关耦合到第二组采样电容器。将第二组采样电容器上的采样信号转换为ADC的输入，然后通过多路复用和采样/保持电路将第一组采样电容器上的采样信号耦合到ADC的输入。响应于校准信息调整第一和第二时钟信号边缘中的至少一个的相位，以避免电路噪声叠加在耦合到ADC的输入端的采样信号上。

8. 发明授权

US07319419B1 Switched capacitor circuit with current source offset DAC and method 有权
标题翻译：具有电流源偏移DAC和方法的开关电容电路
公开(公告)号：US07319419B1
公开(公告)日：2008-01-15
申请号：US11512389
申请日：2006-08-30
申请人： Christopher P. Lash , Ronald F. Cormier, Jr. , Frederick J. Highton
发明人： Christopher P. Lash , Ronald F. Cormier, Jr. , Frederick J. Highton
IPC分类号： H03M1/06
CPC分类号： H03M1/0607 , H03M1/122 , H03M1/745
摘要： A switched-capacitor sample/hold circuit includes a switched-capacitor input sampling stage and a sample/hold amplifier circuit including an operational amplifier having first and second inputs coupled to first and second input sampling capacitors, respectively, and first and second feedback capacitors coupled between the first and second inputs and first and second outputs of the operational amplifier. A continuous-time offset DAC receives a digital input signal representative of an offset voltage produces first and second offset correction voltages. The first and second offset correction voltages are coupled to the switched-capacitor sample/hold circuit to adjust the amount of pre-charging of the first and second feedback capacitors, respectively, in accordance with the value of the digital input signal to compensate an offset component associated with the and second input voltages. The output of the switched-capacitor sample/hold circuit can be connected to an ADC.
摘要翻译：开关电容器采样/保持电路包括开关电容器输入采样级和采样/保持放大器电路，其包括运算放大器，该运算放大器分别具有耦合到第一和第二输入采样电容器的第一和第二输入端，并且耦合第一和第二反馈电容器在第一和第二输入与运算放大器的第一和第二输出之间。连续时间偏移DAC接收代表偏移电压的数字输入信号产生第一和第二偏移校正电压。第一和第二偏移校正电压被耦合到开关电容器采样/保持电路，以分别根据数字输入信号的值来调整第一和第二反馈电容器的预充电量，以补偿偏移与第二输入电压相关的分量。开关电容采样/保持电路的输出可以连接到ADC。

9. 发明授权

US08228076B2 Deconvolution-based capacitive touch detection circuit and method 有权
标题翻译：基于去卷积的电容式触摸检测电路及方法
公开(公告)号：US08228076B2
公开(公告)日：2012-07-24
申请号：US12587453
申请日：2009-10-07
申请人： Ronald F. Cormier, Jr. , Michael D. Snedeker
发明人： Ronald F. Cormier, Jr. , Michael D. Snedeker
IPC分类号： G01R27/26
CPC分类号： G06F3/044
摘要： A capacitance measuring system includes analog-digital circuitry (15) coupled to row conductors (2i) and column conductors (3i) of a touch screen panel (13A) for producing a first digital signal (DATA) representative of cross-coupling capacitances (CSENij). Row drive circuitry (45) superimposes charge transfers from cross-coupling capacitances of the row conductors to a first column conductor to cause the first digital signal to be a convoluted signal. Calibration circuitry (39,40) subtracts base line data from the first digital signal to produce a second digital signal (ΔDATA) representing touch-induced capacitance change values (ΔCSENIJ). A deconvolution circuit (44) deconvolutes the second digital signal to produce a digital output (58) representing a magnitude map of the touch-induced capacitance change values.
摘要翻译：电容测量系统包括耦合到触摸屏面板（13A）的行导体（2i）和列导体（3i）的模拟数字电路（15），用于产生代表交叉耦合电容的第一数字信号（DATA）（CSENij ）。行驱动电路（45）将从行导体的交叉耦合电容的电荷转移叠加到第一列导体，以使第一数字信号成为卷积信号。校准电路（39,40）从第一数字信号中减去基线数据以产生表示触摸感应电容变化值（＆Dgr; CSENIJ）的第二数字信号（＆Dgr; DATA）。去卷积电路（44）对第二数字信号进行去卷积以产生表示触摸感应电容变化值的幅度图的数字输出（58）。

10. 发明授权

US09128571B2 Capacitive touch panel having improved response characteristics 有权
标题翻译：具有改善的响应特性的电容式触摸面板
公开(公告)号：US09128571B2
公开(公告)日：2015-09-08
申请号：US13555556
申请日：2012-07-23
申请人： Nathan Y. Moyal , Tao Peng , Jerry L. Doorenbos , Ronald F. Cormier
发明人： Nathan Y. Moyal , Tao Peng , Jerry L. Doorenbos , Ronald F. Cormier
IPC分类号： G06F3/044
CPC分类号： G06F3/044 , G06F3/0416 , G06F2203/04103 , G06F2203/04111
摘要： An apparatus is provided. The apparatus comprises a second layer disposed over a first layer. Each of the first and second layers have a set of detection electrodes that are spaced apart and electrically isolated from one another and an associated set of interleavers. Each interleaver is located between adjacent detection electrodes from its associated the set of detection electrodes, and each set of interleavers also includes a pair of complementary interleaving electrodes coupled to those that are electrically coupled to the adjacent detection electrodes from its associated set of detection electrodes. The detection electrodes and interleaving electrodes are also substantially transparent to visible spectrum light.
摘要翻译：提供了一种装置。该装置包括设置在第一层上的第二层。第一层和第二层中的每一层具有彼此间隔开并且电隔离的一组检测电极以及相关联的一组交织器。每个交织器位于相邻的检测电极之间，与其相关联的检测电极组相关联，并且每组交织器还包括一对互补交错电极，其耦合到从其相关联的检测电极电耦合到相邻检测电极的那些。检测电极和交错电极对可见光谱光也是基本透明的。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式