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1. 发明授权

US07943972B2 Methods of fabricating transistors having buried P-type layers coupled to the gate 有权
标题翻译：制造具有连接到栅极的P型层的晶体管的方法
公开(公告)号：US07943972B2
公开(公告)日：2011-05-17
申请号：US12627743
申请日：2009-11-30
申请人： Saptharishi Sriram , Matt Willis
发明人： Saptharishi Sriram , Matt Willis
IPC分类号： H01L29/812 , H01L21/338
CPC分类号： H01L29/8128 , H01L29/1029 , H01L29/1066 , H01L29/808
摘要： A unit cell of a metal-semiconductor field-effect transistor (MESFET) is provided. The MESFET has a source, a drain and a gate. The gate is between the source and the drain and on an n-type conductivity channel layer. A p-type conductivity region is provided beneath the gate between the source and the drain. The p-type conductivity region is spaced apart from the n-type conductivity channel layer and electrically coupled to the gate. Related methods are also provided herein.
摘要翻译：提供了一种金属半导体场效应晶体管（MESFET）的晶胞。 MESFET具有源极，漏极和栅极。栅极在源极和漏极之间以及n型导电沟道层之间。在源极和漏极之间的栅极下方提供p型导电区域。 p型导电区域与n型导电沟道层间隔开并电耦合到栅极。本文还提供了相关方法。

2. 发明授权

US07737476B2 Metal-semiconductor field effect transistors (MESFETs) having self-aligned structures 有权
标题翻译：具有自对准结构的金属 - 半导体场效应晶体管（MESFET）
公开(公告)号：US07737476B2
公开(公告)日：2010-06-15
申请号：US11706762
申请日：2007-02-15
申请人： Saptharishi Sriram , Jason Henning , Keith Wieber
发明人： Saptharishi Sriram , Jason Henning , Keith Wieber
IPC分类号： H01L29/80 , H01L31/112
CPC分类号： H01L29/1608 , H01L29/1029 , H01L29/66068 , H01L29/812
摘要： Metal-semiconductor field-effect transistors (MESFETS) are provided. A MESFET is provided having a source region, a drain region and a gate. The gate is between the source region and the drain region. A p-type conductivity layer is provided beneath the source region, the p-type conductivity layer being self-aligned to the gate. Related methods of fabricating MESFETs are also provided herein.
摘要翻译：提供了金属半导体场效应晶体管（MESFETS）。提供了具有源极区，漏极区和栅极的MESFET。栅极在源极区域和漏极区域之间。 p型导电层设置在源极区域的下方，p型导电层与栅极自对准。本文还提供了制造MESFET的相关方法。

3. 发明申请

US20080197360A1 Diode Having Reduced On-resistance and Associated Method of Manufacture 有权
标题翻译：二极管具有降低的导通电阻和相关的制造方法
公开(公告)号：US20080197360A1
公开(公告)日：2008-08-21
申请号：US11675658
申请日：2007-02-16
申请人： Saptharishi Sriram , Thomas J. Smith , Helmut Hagleitner
发明人： Saptharishi Sriram , Thomas J. Smith , Helmut Hagleitner
IPC分类号： H01L29/868 , H01L21/329 , H01L29/24
CPC分类号： H01L29/1608 , H01L23/291 , H01L23/31 , H01L29/0657 , H01L29/6606 , H01L29/6609 , H01L29/861 , H01L29/868 , H01L2924/0002 , H01L2924/00
摘要： A diode structure having a reduced on-resistance in the forward-biased condition includes semiconductor layers, preferably of silicon carbide. The anode and cathode of the device are located on the same side of the bottom semiconductor layer, providing lateral conduction across the diode body. The anode is positioned on a semiconductor mesa, and the sides of the mesa are covered with a nonconductive spacer extending from the anode to the bottom layer. An ohmic contact, preferably a metal silicide, covers the surface of the bottom layer between the spacer material and the cathode. The conductive path extends from anode to cathode through the body of the mesa and across the bottom semiconductor layer, including the ohmic contact. The method of forming the diode includes reacting layers of silicon and metal on the appropriate regions of the diode to form an ohmic contact of metal silicide.
摘要翻译：在正向偏置状态下具有降低的导通电阻的二极管结构包括优选为碳化硅的半导体层。器件的阳极和阴极位于底部半导体层的同一侧，提供横跨二极管体的横向导通。阳极定位在半导体台面上，并且台面的侧面被从阳极延伸到底层的非导电间隔物覆盖。欧姆接触，优选金属硅化物，覆盖在间隔物材料和阴极之间的底层的表面。导电路径从阳极延伸穿过台面的主体并穿过底部半导体层，包括欧姆接触。形成二极管的方法包括在二极管的适当区域上反应硅和金属层以形成金属硅化物的欧姆接触。

4. 发明申请

US20060091430A1 Metal-semiconductor field effect transistors (MESFETs) having drains coupled to the substrate and methods of fabricating the same 有权
标题翻译：具有与衬底耦合的漏极的金属半导体场效应晶体管（MESFET）及其制造方法
公开(公告)号：US20060091430A1
公开(公告)日：2006-05-04
申请号：US10977054
申请日：2004-10-29
申请人： Saptharishi Sriram , Scott Allen
发明人： Saptharishi Sriram , Scott Allen
IPC分类号： H01L31/112 , H01L21/338
CPC分类号： H01L29/66848 , H01L29/1075 , H01L29/1608 , H01L29/4175 , H01L29/8128
摘要： The present invention provides a unit cell of a metal-semiconductor field-effect transistor (MESFET). The unit cell of the MESFET includes a MESFET having a source region, a drain region and a gate contact. The gate contact is disposed between the source region and the drain region. The drain region is electrically coupled to the substrate through a contact via hole to the substrate. Related methods of fabricating MESFETs are also provided herein.
摘要翻译：本发明提供了一种金属半导体场效应晶体管（MESFET）的单元。 MESFET的单元包括具有源极区，漏极区和栅极接触的MESFET。栅极触点设置在源极区域和漏极区域之间。漏极区域通过接触通孔电耦合到衬底到衬底。本文还提供了制造MESFET的相关方法。

5. 发明授权

US5043777A Power FETS with improved high voltage performance 失效
标题翻译：功率FETS具有改进的高电压性能
公开(公告)号：US5043777A
公开(公告)日：1991-08-27
申请号：US593371
申请日：1990-09-28
申请人： Saptharishi Sriram
发明人： Saptharishi Sriram
IPC分类号： H01L29/778 , H01L29/80
CPC分类号： H01L29/7787 , H01L29/802
摘要： An undoped surface layer over and lattice matched to the n-channel layer between the gate contact and the spaced apart source and drain n+ regions in power FETs made of group III-V compounds minimizes surface effects that preclude such devices from operating efficiently at high voltages, and improves reliability. The undoped surface layer may be grown on the n-channel layer before the layer forming the n+ regions, or where the n+ regions can be formed in the undoped surface layer. The invention is especially suitable for GaAs MESFETs and HEMTs.
摘要翻译：在III-V族化合物制成的功率FET中栅极接触和间隔开的源极和漏极n +区之间的n沟道层上的未掺杂的表面层使表面效应最小化，从而使得这些器件不能在高电压下有效地工作，并提高可靠性。在形成n +区的层之前，或者可以在未掺杂的表面层中形成n +区的情况下，可以在n沟道层上生长未掺杂的表面层。本发明特别适用于GaAs MESFET和HEMT。

6. 发明申请

US20130234278A1 SCHOTTKY CONTACT 有权
标题翻译：肖特友联系人
公开(公告)号：US20130234278A1
公开(公告)日：2013-09-12
申请号：US13414286
申请日：2012-03-07
申请人： Helmut Hagleitner , Saptharishi Sriram
发明人： Helmut Hagleitner , Saptharishi Sriram
IPC分类号： H01L29/47 , H01L21/28
CPC分类号： H01L29/475 , H01L21/28581 , H01L29/2003 , H01L29/402 , H01L29/452 , H01L29/7786 , H01L29/872
摘要： The present disclosure relates to a Schottky contact for a semiconductor device. The semiconductor device has a body formed from one or more epitaxial layers, which reside over a substrate. The Schottky contact may include a Schottky layer, a first diffusion barrier layer, and a third layer. The Schottky layer is formed of a first metal and is provided over at least a portion of a first surface of the body. The first diffusion barrier layer is formed of a silicide of the first metal and is provided over the Schottky layer. The third layer is formed of a second metal and is provided over the first diffusion barrier layer. In one embodiment, the first metal is nickel, and as such, the silicide is nickel silicide. Various other layers may be provided between or above the Schottky layer, the first diffusion barrier layer, and the third layer.
摘要翻译：本公开涉及半导体器件的肖特基接触。半导体器件具有由位于衬底上的一个或多个外延层形成的主体。肖特基接触可以包括肖特基层，第一扩散阻挡层和第三层。肖特基层由第一金属形成并且设置在主体的第一表面的至少一部分上。第一扩散阻挡层由第一金属的硅化物形成，并且设置在肖特基层上。第三层由第二金属形成，并且设置在第一扩散阻挡层上。在一个实施例中，第一金属是镍，因此硅化物是硅化镍。可以在肖特基层，第一扩散阻挡层和第三层之间或之上提供各种其它层。

7. 发明授权

US07858460B2 Passivation of wide band-gap based semiconductor devices with hydrogen-free sputtered nitrides 有权
标题翻译：使用无氢溅射氮化物钝化宽带隙基半导体器件
公开(公告)号：US07858460B2
公开(公告)日：2010-12-28
申请号：US12404557
申请日：2009-03-16
申请人： Zoltan Ring , Helmut Hagleitner , Jason Patrick Henning , Andrew Mackenzie , Scott Allen , Scott Thomas Sheppard , Richard Peter Smith , Saptharishi Sriram , Allan Ward, III
发明人： Zoltan Ring , Helmut Hagleitner , Jason Patrick Henning , Andrew Mackenzie , Scott Allen , Scott Thomas Sheppard , Richard Peter Smith , Saptharishi Sriram , Allan Ward, III
IPC分类号： H01L21/336 , H01L21/8234
CPC分类号： H01L21/045 , H01L21/3145 , H01L21/318 , H01L21/3185 , H01L29/1608 , H01L29/2003 , H01L29/24
摘要： A passivated semiconductor structure and associated method are disclosed. The structure includes a silicon carbide substrate or layer; an oxidation layer on the silicon carbide substrate for lowering the interface density between the silicon carbide substrate and the thermal oxidation layer; a first sputtered non-stoichiometric silicon nitride layer on the thermal oxidation layer for reducing parasitic capacitance and minimizing device trapping; a second sputtered non-stoichiometric silicon nitride layer on the first layer for positioning subsequent passivation layers further from the substrate without encapsulating the structure; a sputtered stoichiometric silicon nitride layer on the second sputtered layer for encapsulating the structure and for enhancing the hydrogen barrier properties of the passivation layers; and a chemical vapor deposited environmental barrier layer of stoichiometric silicon nitride for step coverage and crack prevention on the encapsulant layer.
摘要翻译：公开了钝化的半导体结构和相关方法。该结构包括碳化硅衬底或层; 在碳化硅衬底上的氧化层，用于降低碳化硅衬底和热氧化层之间的界面密度; 在热氧化层上的第一溅射的非化学计量的氮化硅层，用于减少寄生电容并最小化器件捕获; 在所述第一层上的第二溅射的非化学计量的氮化硅层，用于使所述衬底进一步从所述衬底定位以后的钝化层而不封装所述结构; 在第二溅射层上溅射化学计量的氮化硅层，用于封装该结构并增强钝化层的氢阻挡性能; 以及化学气相沉积的化学计量氮化硅的环境阻挡层，用于在封装层上进行步骤覆盖和防裂。

8. 发明授权

US07402844B2 Metal semiconductor field effect transistors (MESFETS) having channels of varying thicknesses and related methods 有权
标题翻译：金属半导体场效应晶体管（MESFETS）具有不同厚度的沟道和相关方法
公开(公告)号：US07402844B2
公开(公告)日：2008-07-22
申请号：US11289158
申请日：2005-11-29
申请人： Saptharishi Sriram
发明人： Saptharishi Sriram
IPC分类号： H01L29/778
CPC分类号： H01L29/1029 , H01L29/1608 , H01L29/66068 , H01L29/812
摘要： A unit cell of a metal-semiconductor field-effect transistor (MESFET) is provided. The unit cell includes a MESFET having a source, a drain and a gate. The gate is between the source and the drain and on a channel layer of the MESFET. The channel layer has a first thickness on a source side of the channel layer and a second thickness, thicker than the first thickness, on a drain side of the channel layer. Related methods of fabricating MESFETs are also provided herein.
摘要翻译：提供了一种金属半导体场效应晶体管（MESFET）的晶胞。该单元包括具有源极，漏极和栅极的MESFET。栅极位于源极和漏极之间以及MESFET的沟道层上。沟道层在沟道层的漏极侧具有在沟道层的源极侧的第一厚度和比第一厚度更厚的第二厚度。本文还提供了制造MESFET的相关方法。

9. 发明授权

US07265399B2 Asymetric layout structures for transistors and methods of fabricating the same 有权
标题翻译：晶体管的不对称布局结构及其制造方法
公开(公告)号：US07265399B2
公开(公告)日：2007-09-04
申请号：US10977227
申请日：2004-10-29
申请人： Saptharishi Sriram , Jason Henning
发明人： Saptharishi Sriram , Jason Henning
IPC分类号： H01L29/80 , H01L21/338
CPC分类号： H01L29/66863 , H01L21/8213 , H01L27/0605 , H01L29/0692 , H01L29/1608 , H01L29/2003 , H01L29/41758 , H01L29/66462 , H01L29/7787 , H01L29/812
摘要： High power transistors are provided. The transistors include a source region, a drain region and a gate contact. The gate contact is positioned between the source region and the drain region. First and second ohmic contacts are provided on the source and drain regions, respectively. The first and second ohmic contacts respectively define a source contact and a drain contact. The source contact and the drain contact have respective first and second widths. The first and second widths are different. Related methods of fabricating transistors are also provided.
摘要翻译：提供大功率晶体管。晶体管包括源极区，漏极区和栅极接触。栅极接触位于源极区域和漏极区域之间。第一和第二欧姆触点分别设置在源极和漏极区域上。第一和第二欧姆触点分别限定了源极触点和漏极触点。源触点和漏极触点具有相应的第一和第二宽度。第一和第二宽度是不同的。还提供了制造晶体管的相关方法。

10. 发明授权

US06906350B2 Delta doped silicon carbide metal-semiconductor field effect transistors having a gate disposed in a double recess structure 有权
标题翻译：具有设置在双凹槽结构中的栅极的Δ掺杂碳化硅金属半导体场效应晶体管
公开(公告)号：US06906350B2
公开(公告)日：2005-06-14
申请号：US10136456
申请日：2001-10-24
申请人： Saptharishi Sriram
发明人： Saptharishi Sriram
IPC分类号： H01L21/28 , H01L21/338 , H01L27/095 , H01L29/24 , H01L29/36 , H01L29/812 , H01L29/15
CPC分类号： H01L29/8128 , H01L29/242 , H01L29/365
摘要： The present invention provides a unit cell of a metal-semiconductor field-effect transistor (MESFET). The unit cell of the MESFET includes a delta doped silicon carbide MESFET having a source, a drain and a gate. The gate is situated between the source and the drain and extends into a doped channel layer of a first conductivity type. Regions of silicon carbide adjacent to the source and the drain extend between the source and the gate and the drain and the gate, respectively. The regions of silicon carbide have carrier concentrations that are greater than a carrier concentration of the doped channel layer and are spaced apart from the gate.
摘要翻译：本发明提供了一种金属半导体场效应晶体管（MESFET）的单元。 MESFET的单元包括具有源极，漏极和栅极的δ掺杂碳化硅MESFET。栅极位于源极和漏极之间并延伸到第一导电类型的掺杂沟道层中。与源极和漏极相邻的碳化硅区域分别在源极和栅极以及漏极和栅极之间延伸。碳化硅的区域具有大于掺杂沟道层的载流子浓度并且与栅极间隔开的载流子浓度。

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