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    • 5. 发明授权
    • Semiconductor memory devices including a damascene wiring line
    • 包括镶嵌线的半导体存储器件
    • US07768128B2
    • 2010-08-03
    • US11499059
    • 2006-08-04
    • Young-woo ChoKyung-tae LeeHeon-jong ShinYoung-hwan Oh
    • Young-woo ChoKyung-tae LeeHeon-jong ShinYoung-hwan Oh
    • H01L23/48H01L23/52H01L29/40
    • H01L27/1104H01L21/76808H01L27/0207H01L27/11
    • Integrated circuit memory devices include an integrated circuit substrate and a plurality of lower wiring lines on the substrate and extending in a first direction. An interlayer insulating layer is on the plurality of lower wiring lines. An upper damascene wiring line is in an upper portion of the interlayer insulating layer and extending in a second direction, different from the first direction, to extend over the plurality of lower wiring lines. The upper damascene wiring line has protruded regions extending therefrom in a direction different from the second direction, the protruded regions extending over respective underlying ones of the lower wiring lines. A first via extends through the interlayer insulating layer under a first of the protruded regions and connects the upper damascene wiring line to a corresponding underlying first one of the plurality of wiring lines. A second via extends through the interlayer insulating layer under a second of the protruded regions and connects the upper damascene wiring line to a corresponding underlying second one of the plurality of wiring lines.
    • 集成电路存储器件包括集成电路基板和在基板上的多个下布线,并沿第一方向延伸。 层间绝缘层位于多个下布线上。 上部镶嵌线路位于层间绝缘层的上部,并且沿与第一方向不同的第二方向延伸,在多条下部布线上延伸。 上部镶嵌线具有沿与第二方向不同的方向从其延伸的突出区域,突出区域延伸到下部布线的下方。 第一通孔延伸穿过位于第一突出区域的层间绝缘层,并将上镶嵌布线连接到多个布线中相应的下面的第一布线。 第二通孔延伸穿过第二突出区域之间的层间绝缘层,并将上部镶嵌布线连接到多条布线中相应的下面的第二布线。
    • 7. 发明申请
    • LAZY BULK INSERTION METHOD FOR MOVING OBJECT INDEXING
    • 用于移动目标索引的LAZY BULK插入方法
    • US20070233720A1
    • 2007-10-04
    • US11611284
    • 2006-12-15
    • Hae Young BAEYoung Hwan OHHo Seok KIMYong Il JANGByeong Seob YOUSang Hun EODong Wook LEEJohn Hyeon CHEON
    • Hae Young BAEYoung Hwan OHHo Seok KIMYong Il JANGByeong Seob YOUSang Hun EODong Wook LEEJohn Hyeon CHEON
    • G06F7/00
    • G06F16/2264G06F16/2246G06F16/29
    • The present invention relates to a lazy bulk insertion method for moving object indexing, which utilizes a hash-based data structure to overcome the disadvantages of an R-tree, and uses two buffers to simultaneously store operations in the buffers and process queries stored in the buffers, so that the overall update cost can be reduced. In the lazy bulk insertion method, a buffer is substituted and a state of the buffer is changed to a deactivated state if an input query cannot be stored in the buffer. Operations stored in the deactivated buffer are sequentially analyzed, information about objects corresponding to respective operations is obtained from a direct link to analyze the operations, and thus the operations are aligned on the basis of object IDs. Operations, aligned in ascending order of spatial objects, are identified depending on respective objects, effectiveness of the operations is determined, and thus the operations are realigned on the basis of terminal node IDs. The number of insert operations and the number of delete operations are counted for each terminal node, and variation in the number of empty spaces in the terminal node is obtained, thus splitting and merging of the terminal nodes is predicted. A processing sequence of queries is reorganized so as to reduce variation in the node on the basis of the predicted information.
    • 本发明涉及一种用于移动对象索引的延迟批量插入方法,其利用基于散列的数据结构来克服R树的缺点,并且使用两个缓冲器来同时存储缓冲器中的操作和存储在 缓冲区,从而可以降低总体更新成本。 在惰性批量插入方法中,如果输入查询不能存储在缓冲区中,则替换缓冲区,并将缓冲区的状态更改为禁用状态。 顺序地分析存储在去激活缓冲器中的操作,从直接链接获得关于对应于各个操作的对象的信息,以分析操作,因此基于对象ID来对齐操作。 根据各个对象来识别按空间对象的升序排列的操作,确定操作的有效性,并且因此基于终端节点ID对操作进行重新排列。 对每个终端节点计数插入操作次数和删除次数,得到终端节点空闲空间数量的变化,从而预测终端节点的分裂和合并。 重新组织查询的处理顺序,以便基于预测信息来减少节点的变化。
    • 9. 发明申请
    • Semiconductor memory devices and methods of fabricating the same
    • 半导体存储器件及其制造方法
    • US20070035028A1
    • 2007-02-15
    • US11499059
    • 2006-08-04
    • Young-woo ChoKyung-tae LeeHeon-jong ShinYoung-hwan Oh
    • Young-woo ChoKyung-tae LeeHeon-jong ShinYoung-hwan Oh
    • H01L23/52
    • H01L27/1104H01L21/76808H01L27/0207H01L27/11
    • Integrated circuit memory devices include an integrated circuit substrate and a plurality of lower wiring lines on the substrate and extending in a first direction. An interlayer insulating layer is on the plurality of lower wiring lines. An upper damascene wiring line is in an upper portion of the interlayer insulating layer and extending in a second direction, different from the first direction, to extend over the plurality of lower wiring lines. The upper damascene wiring line has protruded regions extending therefrom in a direction different from the second direction, the protruded regions extending over respective underlying ones of the lower wiring lines. A first via extends through the interlayer insulating layer under a first of the protruded regions and connects the upper damascene wiring line to a corresponding underlying first one of the plurality of wiring lines. A second via extends through the interlayer insulating layer under a second of the protruded regions and connects the upper damascene wiring line to a corresponding underlying second one of the plurality of wiring lines.
    • 集成电路存储器件包括集成电路基板和在基板上的多个下布线,并沿第一方向延伸。 层间绝缘层位于多个下布线上。 上部镶嵌线路位于层间绝缘层的上部,并且沿与第一方向不同的第二方向延伸,在多条下部布线上延伸。 上部镶嵌线具有沿与第二方向不同的方向从其延伸的突出区域,突出区域延伸到下部布线的下方。 第一通孔延伸穿过位于第一突出区域的层间绝缘层,并将上镶嵌布线连接到多个布线中相应的下面的第一布线。 第二通孔在第二突出区域的下方延伸穿过层间绝缘层,并将上部镶嵌线路连接到多条布线中相应的下面的第二布线。