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1. 发明授权

US07835391B2 Protocol DMA engine 有权
标题翻译：协议DMA引擎
公开(公告)号：US07835391B2
公开(公告)日：2010-11-16
申请号：US11862366
申请日：2007-09-27
申请人： Alain Chateau , Lars Holst Christensen , Bent Rysgaard
发明人： Alain Chateau , Lars Holst Christensen , Bent Rysgaard
IPC分类号： H04J3/24 , H04J3/14
CPC分类号： H04L69/32
摘要： Apparatus and method for accelerating data handling in the protocol stack of a networked device. Embodiments of the disclosed invention may be used to increase the throughput rate of a networked device while offloading processing from the device's host processor. A method includes building a set of descriptors that describe the operations to be performed by a Protocol DMA Engine. A host processor builds the set of descriptors in lieu of performing the operations described by the descriptors. The set of descriptors is provided to the Protocol DMA Engine. The Protocol DMA Engine executes the operations described in the set of descriptors to produce a protocol layer output data unit from a protocol layer input data unit. The protocol layer output data unit is provided to a next layer of a network protocol stack.
摘要翻译：一种用于加速网络设备协议栈中的数据处理的装置和方法。所公开的发明的实施例可以用于在从设备的主处理器卸载处理的同时增加联网设备的吞吐率。一种方法包括构建描述由DMA协议DMA引擎执行的操作的描述符集合。主机处理器构建一组描述符来代替描述符描述的操作。该描述符集提供给协议DMA引擎。协议DMA引擎执行描述符集中描述的操作，以从协议层输入数据单元产生协议层输出数据单元。协议层输出数据单元被提供给网络协议栈的下一层。

2. 发明授权

US5355462A Processor data memory address generator 失效
标题翻译：处理器数据存储器地址生成器
公开(公告)号：US5355462A
公开(公告)日：1994-10-11
申请号：US762821
申请日：1991-09-19
申请人： Emmanuel Rousseau , Alain Chateau
发明人： Emmanuel Rousseau , Alain Chateau
IPC分类号： G06F9/35 , G06F9/355 , G06F9/38 , G06F12/02 , G06F12/00 , G06F9/26 , G06F9/34 , G06F15/76
CPC分类号： G06F9/342 , G06F9/3552 , G06F9/3879
摘要： A processor data memory address generator is adapted to receive a control word from a program controller receiving instructions from a program memory addressed by an instruction counter and producing a program signal addressed to an arithmetic and logic unit. The instruction counter is incremented by a clock signal and reset by the program controller. The control word comprises location information and selection information and the address generator is adapted to produce a data address having a first part comprising bits of said location information and a second part formed by a selected set of bits of the address of the current instruction identified by said selection information.
摘要翻译：处理器数据存储器地址发生器适于从程序控制器接收来自由指令计数器寻址的程序存储器的指令并产生寻址到算术和逻辑单元的程序信号的控制字。指令计数器由时钟信号递增，并由程序控制器复位。控制字包括位置信息和选择信息，并且地址生成器适于产生数据地址，该数据地址具有包括位置信息的位的第一部分和由当前指令的地址的所选位组形成的第二部分，所述选择信息。

3. 发明授权

US07120771B2 Secure mode for processors supporting MMU 有权
标题翻译：支持MMU的处理器的安全模式
公开(公告)号：US07120771B2
公开(公告)日：2006-10-10
申请号：US10256596
申请日：2002-09-27
申请人： Franck Dahan , Christian Roussel , Alain Chateau , Peter Cumming
发明人： Franck Dahan , Christian Roussel , Alain Chateau , Peter Cumming
IPC分类号： G06F12/00
CPC分类号： G06F21/556 , G06F9/30047 , G06F9/3802 , G06F9/468 , G06F12/1491 , G06F21/51 , G06F21/52 , G06F21/74 , G06F21/82 , G06F2221/2101 , G06F2221/2105 , G06F2221/2141 , G06F2221/2143 , G06F2221/2149 , G06F2221/2153
摘要： A digital system is provided with a secure mode (3rd level of privilege) built in a non-invasive way on a processor system that includes a processor core, instruction and data caches, a write buffer and a memory management unit. A secure execution mode is thus provided on a platform where the only trusted software is the code stored in ROM. In particular the OS is not trusted, all native applications are not trusted. A secure execution mode is provided that allows virtual addressing when a memory management unit (MMU) is enabled. The secure execution mode allows instruction and data cache to be enabled. A secure execution mode is provided that allows all the system interruptions to be unmasked. The secure mode is entered through a unique entry point. The secure execution mode can be dynamically entered and exited with full hardware assessment of the entry/exit conditions. A specific set of entry conditions is monitored that account for caches, write buffer and MMU being enabled. The structure of the activation sequence code accounts for caches, write buffer and MMU being enabled. The structure of the exit sequences code accounts for caches, write buffer and MMU being enabled. A specific way is provided to manage a safe exit of secure mode under generic interruptions and allows return from interruption through entry point and activation sequence and a proper resuming of the secure execution. A specific way is provided to manage the MMU in secure mode and provide data exchange between secure and non-secure environment.
摘要翻译：在包括处理器核心，指令和数据高速缓冲存储器，写入缓冲器和写入缓冲器的处理器系统中，数字系统被提供有以非侵入式方式构建的安全模式（3级的特权级别）内存管理单元。因此，在唯一可信软件是存储在ROM中的代码的平台上提供安全执行模式。特别是操作系统不受信任，所有本地应用程序都不被信任。提供了一种安全执行模式，当启用存储器管理单元（MMU）时允许虚拟寻址。安全执行模式允许指令和数据高速缓存启用。提供了一种安全执行模式，允许所有系统中断被隐藏。通过唯一的入口点输入安全模式。安全执行模式可以通过进入/退出条件的完整硬件评估来动态输入和退出。监视一个特定的条目条目，这些条目占用缓存，写入缓冲区和MMU被启用。激活序列代码的结构用于缓存，写入缓冲区和MMU被使能。退出序列代码的结构用于缓存，写入缓冲区和MMU被启用。提供了一种具体的方法来管理通用中断下安全模式的安全退出，并允许从中断通过入口点和激活顺序返回，并适当恢复安全执行。提供了以安全模式管理MMU的特定方式，并在安全和非安全环境之间提供数据交换。

4. 发明授权

US08122244B2 Secure management of configuration parameters in a computing platform 有权
标题翻译：安全管理计算平台中的配置参数
公开(公告)号：US08122244B2
公开(公告)日：2012-02-21
申请号：US10618873
申请日：2003-07-14
申请人： Jerome Azema , Alain Chateau , Eric Balard
发明人： Jerome Azema , Alain Chateau , Eric Balard
IPC分类号： H04L29/06 , G06F15/16
CPC分类号： G06F21/10 , G06F21/57 , G06F21/575 , G06F2221/2153 , H04L9/0822 , H04L9/3226 , H04L9/3263 , H04L2209/603 , H04L2209/80
摘要： A computing platform (10) protects system firmware (30) using a manufacturer certificate (36). The manufacturer certificate binds the system firmware (30) to the particular computing platform (10). The manufacturer certificate also stores configuration parameters and device identification numbers. A secure run-time platform data checker (200) and a secure run-time checker (202) check the system firmware during operation of the computing platform (10) to ensure that the system firmware (30) or information in the manufacturer certificate (36) has not been altered. Application software files (32) and data files (34) are bound to the particular computing device (10) by a platform certificate (38). Configuration parameters may be stored in a data file (34) with an associated platform certificate (38).
摘要翻译：计算平台（10）使用制造商证书（36）保护系统固件（30）。制造商证书将系统固件（30）绑定到特定的计算平台（10）。制造商证书还存储配置参数和设备标识号。安全运行时平台数据检查器（200）和安全运行时检查器（202）在计算平台（10）的操作期间检查系统固件，以确保系统固件（30）或制造商证书（ 36）没有改变。应用软件文件（32）和数据文件（34）通过平台证书（38）绑定到特定的计算设备（10）。配置参数可以存储在具有关联的平台证书（38）的数据文件（34）中。

5. 发明申请

US20050041803A1 On-device random number generator 审中-公开
标题翻译：设备上随机数发生器
公开(公告)号：US20050041803A1
公开(公告)日：2005-02-24
申请号：US10643069
申请日：2003-08-18
申请人： Alain Chateau , Franck Dahan
发明人： Alain Chateau , Franck Dahan
IPC分类号： G06F7/58 , G06F21/73 , H04L9/00
CPC分类号： G06F21/73 , G06F7/58
摘要： A random key generator circuit (10) generates a random number internal to an integrated circuit and stores the random number as a “root key” in a memory (18) on the integrated circuit. The output of the Root Key memory (18) is only accessible internal to the integrated circuit. The root key can be permanently stored in a fused memory or other memory type which is protected from erasure or reprogramming once the root key is stored.
摘要翻译：随机密钥生成器电路（10）生成集成电路内部的随机数，并将随机数作为“根密钥”存储在集成电路的存储器（18）中。根密钥存储器（18）的输出只能在集成电路内部访问。根密钥可以永久存储在融合存储器或其他存储器类型中，一旦存储了根密钥，该密钥将被保护而不被擦除或重新编程。

6. 发明授权

US06564046B1 Method of maintaining mobile terminal synchronization during idle communication periods 有权
标题翻译：在空闲通信期间维护移动终端同步的方法
公开(公告)号：US06564046B1
公开(公告)日：2003-05-13
申请号：US09625902
申请日：2000-07-26
申请人： Alain Chateau
发明人： Alain Chateau
IPC分类号： H04B116
CPC分类号： H04W52/029 , H04W56/0035 , Y02D70/1222
摘要： A method and structure of recovering a network time-base for radio data demodulation after an IDLE period of data communication gauges a local low frequency oscillator versus the high frequency local oscillator to compute the IDLE time as an equivalent number of low frequency oscillator clock periods. Depending upon the high frequency oscillator value, the accuracy of the gauging will directly determine the IDLE period duration versus the gauging period duration in order to keep an acceptable gauging error related to the sampling errors.
摘要翻译：在数据通信的空闲周期测量本地低频振荡器与高频本地振荡器之后，恢复用于无线电数据解调的网络时基的方法和结构，以计算作为等效数量的低频振荡器时钟周期的空闲时间。根据高频振荡器值，测量的精度将直接确定IDLE周期持续时间与测量周期持续时间，以保持与采样误差相关的可接受的测量误差。

7. 发明授权

US5870680A Method and an apparatus for placing devices on standby in a system including a portable mobile telephone connected to a peripheral device 失效
标题翻译：一种用于将设备放置在包括连接到外围设备的便携式移动电话的系统的系统中的方法和装置
公开(公告)号：US5870680A
公开(公告)日：1999-02-09
申请号：US532500
申请日：1995-09-22
申请人： Jean-Pierre Guerlin , Xavier Sarremejean , Alain Chateau , Pascal Bourrier , Marc de Savigny
发明人： Jean-Pierre Guerlin , Xavier Sarremejean , Alain Chateau , Pascal Bourrier , Marc de Savigny
IPC分类号： G06F1/04 , G06F1/32 , H02J1/00 , H04B1/16 , H04B7/26 , H04M1/00 , H04M1/73 , H04M11/00 , H04W52/02 , H04W88/02 , H04B1/40
CPC分类号： H04W88/02 , G06F1/3215 , H04B1/1615 , H04W52/0248 , H04W52/028 , Y02B60/50
摘要： A method and apparatus for conserving energy in a system including first and second devices interconnected by a data communication link via respective first and second interfaces in the first and second devices by sending a message over the link to put the interface in one device on standby. This message is sent by the interface in the other device. The first or second interface is reactivated by the other interface by electrical means via a physical medium of the link.
摘要翻译：一种用于在系统中节省能量的方法和装置，包括通过数据通信链路经由第一和第二设备中的相应第一和第二接口互连的第一和第二设备，通过链路发送消息以将接口置于一个设备中进行待机。该消息由另一设备中的接口发送。第一或第二接口由另一接口通过电气装置通过链路的物理介质重新激活。

8. 发明授权

US5307472A Data transfer interface module 失效
标题翻译：数据传输接口模块
公开(公告)号：US5307472A
公开(公告)日：1994-04-26
申请号：US724629
申请日：1991-07-02
申请人： Alain Chateau , Emmanuel Rousseau
发明人： Alain Chateau , Emmanuel Rousseau
IPC分类号： G06F11/00 , G06F13/00 , G11C7/00 , H04L13/08 , G06F12/02
CPC分类号： H04L13/08
摘要： A data transfer interface module comprises a storage zone constituted by a plurality of locations referenced by addresses provided by an address generator and serving to acquire a set of data items constituting a block of a size that may be variable, which data items are stored successively in the plurality locations; a control signal COM via control circuit and an acquisition and recording circuit to enable address generation and also loading in the storage zone, the same control circuit in association with a read and transmission circuit then enabling the data to be transmitted, with the data items being extracted one by one from the locations, such that the first item to be transmitted is the last item to have been recorded; and a monitor circuit controlled by the address generator and serving to verify that the number Do of data items transmitted is equal to the number Di of data items acquired and to provide a status word ST which can be read to provide information about proper transmission.
摘要翻译：一种数据传输接口模块，包括由地址发生器提供的由地址引用的多个位置构成的存储区域，用于获取构成大小可变的块的一组数据项，这些数据项被连续地存储在多个位置; 通过控制电路的控制信号COM以及采集和记录电路，以使地址生成并在存储区域中加载，与读和发送电路相关联的相同控制电路，然后使数据可以被发送，数据项为从所述位置一个接一个地提取，使得要发送的第一个项目是要被记录的最后一个项目; 以及由地址发生器控制并用于验证所发送的数据项的数量Do等于所获取的数据项的数量Di并且提供可被读取以提供关于正确传输的信息的状态字ST的监视器电路。

9. 发明授权

US07890753B2 Secure mode for processors supporting MMU and interrupts 有权
标题翻译：支持MMU和中断的处理器的安全模式
公开(公告)号：US07890753B2
公开(公告)日：2011-02-15
申请号：US10256642
申请日：2002-09-27
申请人： Franck Dahan , Christian Roussel , Alain Chateau , Peter Cumming
发明人： Franck Dahan , Christian Roussel , Alain Chateau , Peter Cumming
IPC分类号： H04L29/06
CPC分类号： G06F21/556 , G06F9/30047 , G06F9/3802 , G06F9/468 , G06F12/1491 , G06F21/51 , G06F21/52 , G06F21/74 , G06F21/82 , G06F2221/2101 , G06F2221/2105 , G06F2221/2141 , G06F2221/2143 , G06F2221/2149 , G06F2221/2153
摘要： A digital system is provided with a secure mode (3rd level of privilege) built in a non-invasive way on a processor system that includes a processor core, instruction and data caches, a write buffer and a memory management unit. A secure execution mode is thus provided on a platform where the only trusted software is the code stored in ROM. In particular the OS is not trusted, all native applications are not trusted. A secure execution mode is provided that allows virtual addressing when a memory management unit (MMU) is enabled. The secure execution mode allows instruction and data cache to be enabled. A secure execution mode is provided that allows all the system interruptions to be unmasked. The secure mode is entered through a unique entry point. The secure execution mode can be dynamically entered and exited with full hardware assessment of the entry/exit conditions. A specific set of entry conditions is monitored that account for caches, write buffer and MMU being enabled. The structure of the activation sequence code accounts for caches, write buffer and MMU being enabled. The structure of the exit sequences code accounts for caches, write buffer and MMU being enabled. A specific way is provided to manage a safe exit of secure mode under generic interruptions and allows return from interruption through entry point and activation sequence and a proper resuming of the secure execution. A specific way is provided to manage the MMU in secure mode and provide data exchange between secure and non-secure environment.
摘要翻译：在包括处理器核心，指令和数据高速缓存，写入缓冲器和存储器管理单元的处理器系统上，数字系统被提供有以非侵入式方式内置的安全模式（第三级特权）。因此，在唯一可信软件是存储在ROM中的代码的平台上提供安全执行模式。特别是操作系统不受信任，所有本地应用程序都不被信任。提供了一种安全执行模式，当启用存储器管理单元（MMU）时允许虚拟寻址。安全执行模式允许指令和数据高速缓存启用。提供了一种安全执行模式，允许所有系统中断被隐藏。通过唯一的入口点输入安全模式。安全执行模式可以通过进入/退出条件的完整硬件评估来动态输入和退出。监视一个特定的条目条目，这些条目占用缓存，写入缓冲区和MMU被启用。激活序列代码的结构用于缓存，写入缓冲区和MMU被使能。退出序列代码的结构用于缓存，写入缓冲区和MMU被启用。提供了一种具体的方法来管理通用中断下安全模式的安全退出，并允许从中断通过入口点和激活顺序返回，并适当恢复安全执行。提供了以安全模式管理MMU的特定方式，并在安全和非安全环境之间提供数据交换。

10. 发明授权

US07539868B2 Run-time firmware authentication 有权
标题翻译：运行时固件认证
公开(公告)号：US07539868B2
公开(公告)日：2009-05-26
申请号：US10618862
申请日：2003-07-14
申请人： Eric Balard , Alain Chateau , Jerome Azema
发明人： Eric Balard , Alain Chateau , Jerome Azema
IPC分类号： G06F21/22 , G06F11/30 , H04L9/28
CPC分类号： G06F21/10 , G06F21/57 , G06F21/575 , G06F2221/2153 , H04L9/0822 , H04L9/3226 , H04L9/3263 , H04L2209/603 , H04L2209/80
摘要： A computing platform (10) protects system firmware (30) using a manufacturer certificate (36). The manufacturer certificate binds the system firmware (30) to the particular computing platform (10). The manufacturer certificate may also store configuration parameters and device identification numbers. A secure run-time platform data checker (200) and a secure run-time checker (202) check the system firmware during operation of the computing platform (10) to ensure that the system firmware (30) or information in the manufacturer certificate (36) has not been altered. Application software files (32) and data files (34) are bound to the particular computing device (10) by a platform certificate (38). A key generator may be used to generate a random key and an encrypted key may be generated by encrypting the random key using a secret identification number associated with the particular computing platform (10). Only the encrypted key is stored in the platform certificate (36).
摘要翻译：计算平台（10）使用制造商证书（36）保护系统固件（30）。制造商证书将系统固件（30）绑定到特定的计算平台（10）。制造商证书还可以存储配置参数和设备标识号。安全运行时平台数据检查器（200）和安全运行时检查器（202）在计算平台（10）的操作期间检查系统固件，以确保系统固件（30）或制造商证书（ 36）没有改变。应用软件文件（32）和数据文件（34）通过平台证书（38）绑定到特定的计算设备（10）。可以使用密钥生成器来生成随机密钥，并且可以通过使用与特定计算平台（10）相关联的秘密标识号码加密随机密钥来生成加密密钥。只有加密的密钥存储在平台证书（36）中。

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