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1. 发明授权

US07692223B2 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07692223B2
公开(公告)日：2010-04-06
申请号：US11785145
申请日：2007-04-16
申请人： Atsuo Isobe , Tamae Takano , Yasuyuki Arai , Fumiko Terasawa
发明人： Atsuo Isobe , Tamae Takano , Yasuyuki Arai , Fumiko Terasawa
IPC分类号： H01L27/088
CPC分类号： H01L27/12 , H01L21/84 , H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A manufacturing method of a semiconductor device of the present invention includes the steps of forming a stacked body in which a semiconductor film, a gate insulating film, and a first conductive film are sequentially stacked over a substrate; selectively removing the stacked body to form a plurality of island-shaped stacked bodies; forming an insulating film to cover the plurality of island-shaped stacked bodies; removing a part of the insulating film to expose a surface of the first conductive film, such that a surface of the first conductive film almost coextensive with a height of the insulating film; forming a second conductive film over the first conductive film and a left part of the insulating film; forming a resist over the second conductive film; selectively removing the first conductive film and the second conductive film using the resist as a mask.
摘要翻译：本发明的半导体器件的制造方法包括以下步骤：在衬底上依次层叠有半导体膜，栅极绝缘膜和第一导电膜的层叠体; 选择性地去除层叠体以形成多个岛状堆叠体; 形成绝缘膜以覆盖所述多个岛状堆叠体; 去除绝缘膜的一部分以暴露第一导电膜的表面，使得第一导电膜的表面几乎与绝缘膜的高度共同延伸; 在所述第一导电膜和所述绝缘膜的左部分上形成第二导电膜; 在所述第二导电膜上形成抗蚀剂; 使用抗蚀剂作为掩模选择性地去除第一导电膜和第二导电膜。

2. 发明申请

US20070252179A1 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070252179A1
公开(公告)日：2007-11-01
申请号：US11785145
申请日：2007-04-16
申请人： Atsuo Isobe , Tamae Takano , Yasuyuki Arai , Fumiko Terasawa
发明人： Atsuo Isobe , Tamae Takano , Yasuyuki Arai , Fumiko Terasawa
IPC分类号： H01L29/76
CPC分类号： H01L27/12 , H01L21/84 , H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A manufacturing method of a semiconductor device of the present invention includes the steps of forming a stacked body in which a semiconductor film, a gate insulating film, and a first conductive film are sequentially stacked over a substrate; selectively removing the stacked body to form a plurality of island-shaped stacked bodies; forming an insulating film to cover the plurality of island-shaped stacked bodies; removing a part of the insulating film to expose a surface of the first conductive film, such that a surface of the first conductive film almost coextensive with a height of the insulating film; forming a second conductive film over the first conductive film and a left part of the insulating film; forming a resist over the second conductive film; selectively removing the first conductive film and the second conductive film using the resist as a mask.
摘要翻译：本发明的半导体器件的制造方法包括以下步骤：在衬底上依次层叠有半导体膜，栅极绝缘膜和第一导电膜的层叠体; 选择性地去除层叠体以形成多个岛状堆叠体; 形成绝缘膜以覆盖所述多个岛状堆叠体; 去除绝缘膜的一部分以暴露第一导电膜的表面，使得第一导电膜的表面几乎与绝缘膜的高度共同延伸; 在所述第一导电膜和所述绝缘膜的左部分上形成第二导电膜; 在所述第二导电膜上形成抗蚀剂; 使用抗蚀剂作为掩模选择性地去除第一导电膜和第二导电膜。

3. 发明授权

US08896049B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08896049B2
公开(公告)日：2014-11-25
申请号：US12751300
申请日：2010-03-31
申请人： Atsuo Isobe , Tamae Takano , Yasuyuki Arai , Fumiko Terasawa
发明人： Atsuo Isobe , Tamae Takano , Yasuyuki Arai , Fumiko Terasawa
IPC分类号： H01L29/788 , H01L27/115 , H01L21/84 , H01L27/12 , H01L29/76
CPC分类号： H01L27/12 , H01L21/84 , H01L27/115 , H01L27/11521 , H01L27/11524
摘要： A manufacturing method of a semiconductor device of the present invention includes the steps of forming a stacked body in which a semiconductor film, a gate insulating film, and a first conductive film are sequentially stacked over a substrate; selectively removing the stacked body to form a plurality of island-shaped stacked bodies; forming an insulating film to cover the plurality of island-shaped stacked bodies; removing a part of the insulating film to expose a surface of the first conductive film, such that a surface of the first conductive film almost coextensive with a height of the insulating film; forming a second conductive film over the first conductive film and a left part of the insulating film; forming a resist over the second conductive film; selectively removing the first conductive film and the second conductive film using the resist as a mask.
摘要翻译：本发明的半导体器件的制造方法包括以下步骤：在衬底上依次层叠有半导体膜，栅极绝缘膜和第一导电膜的层叠体; 选择性地去除层叠体以形成多个岛状堆叠体; 形成绝缘膜以覆盖所述多个岛状堆叠体; 去除绝缘膜的一部分以暴露第一导电膜的表面，使得第一导电膜的表面几乎与绝缘膜的高度共同延伸; 在所述第一导电膜和所述绝缘膜的左部分上形成第二导电膜; 在所述第二导电膜上形成抗蚀剂; 使用抗蚀剂作为掩模选择性地去除第一导电膜和第二导电膜。

4. 发明授权

US06690068B2 Thin film transistors and semiconductor device 有权
标题翻译：薄膜晶体管和半导体器件
公开(公告)号：US06690068B2
公开(公告)日：2004-02-10
申请号：US09874204
申请日：2001-06-06
申请人： Shunpei Yamazaki , Toru Mitsuki , Kenji Kasahara , Taketomi Asami , Tamae Takano , Takeshi Shichi , Chiho Kokubo , Yasuyuki Arai
发明人： Shunpei Yamazaki , Toru Mitsuki , Kenji Kasahara , Taketomi Asami , Tamae Takano , Takeshi Shichi , Chiho Kokubo , Yasuyuki Arai
IPC分类号： H01L2762
CPC分类号： H01L29/66757 , H01L29/78684
摘要： The TFT has a channel-forming region formed of a crystalline semiconductor film obtained by heat-treating and crystallizing an amorphous semiconductor film containing silicon as a main component and germanium in an amount of not smaller than 0.1 atomic % but not larger than 10 atomic % while adding a metal element thereto, wherein an orientation ratio of the lattice plane {101} is not smaller than 20% and the lattice plane {101} has an angle of not larger than 10 degrees with respect to the surface of the semiconductor film, and an orientation ratio of the lattice plane {001} is not larger than 3% and the lattice plane {001} has an angle of not larger than 10 degrees with respect to the surface of the semiconductor film, and an orientation ratio of the lattice plane {001} is not larger than 5% and the lattice plane {111} has an angle of not larger than 10 degrees with respect to the surface of the semiconductor film as detected by the electron backscatter diffraction pattern method.
摘要翻译： TFT具有通过以以不小于0.1原子％但不大于10原子％的量将含有硅作为主要成分的非晶半导体膜和锗进行热处理和结晶而获得的晶体半导体膜形成的沟道形成区域，同时向其中添加金属元素，其中晶格面{101}的取向比不小于20％，并且晶格面{101}相对于半导体膜的表面具有不大于10度的角度，并且晶格面{001}的取向比不大于3％，晶格面{001}相对于半导体膜的表面具有不大于10度的角度，并且晶格的取向比平面{001}不大于5％，并且晶格面{111}相对于通过电子反向散射衍射图案法检测的半导体膜的表面具有不大于10度的角度。

5. 发明授权

US07307282B2 Thin film transistors and semiconductor device 有权
标题翻译：薄膜晶体管和半导体器件
公开(公告)号：US07307282B2
公开(公告)日：2007-12-11
申请号：US10727651
申请日：2003-12-05
申请人： Shunpei Yamazaki , Toru Mitsuki , Kenji Kasahara , Taketomi Asami , Tamae Takano , Takeshi Shichi , Chiho Kokubo , Yasuyuki Arai
发明人： Shunpei Yamazaki , Toru Mitsuki , Kenji Kasahara , Taketomi Asami , Tamae Takano , Takeshi Shichi , Chiho Kokubo , Yasuyuki Arai
IPC分类号： H01L29/04
CPC分类号： H01L29/66757 , H01L29/78684
摘要： The TFT has a channel-forming region formed of a crystalline semiconductor film obtained by heat-treating and crystallizing an amorphous semiconductor film containing silicon as a main component and germanium in an amount of not smaller than 0.1 atomic % but not larger than 10 atomic % while adding a metal element thereto, wherein not smaller than 20% of the lattice plane {101} has an angle of not larger than 10 degrees with respect to the surface of the semiconductor film, not larger than 3% of the lattice plane {001} has an angle of not larger than 10 degrees with respect to the surface of the semiconductor film, and not larger than 5% of the lattice plane {111} has an angle of not larger than 10 degrees with respect to the surface of the semiconductor film as detected by the electron backscatter diffraction pattern method.
摘要翻译： TFT具有通过以以不小于0.1原子％但不大于10原子％的量将含有硅作为主要成分的非晶半导体膜和锗进行热处理和结晶而获得的晶体半导体膜形成的沟道形成区域，同时向其中添加金属元素，其中不小于晶格面{101}的20％相对于半导体膜的表面具有不大于10度的角度，不大于晶格面{001 }相对于半导体膜的表面具有不大于10度的角度，并且不大于晶格面{111}的5％的角度相对于半导体的表面具有不大于10度的角度通过电子背散射衍射图法检测。

6. 发明授权

US08343816B2 Organic transistor, manufacturing method of semiconductor device and organic transistor 有权
标题翻译：有机晶体管，半导体器件和有机晶体管的制造方法
公开(公告)号：US08343816B2
公开(公告)日：2013-01-01
申请号：US12850652
申请日：2010-08-05
申请人： Ryota Imahayashi , Shinobu Furukawa , Atsuo Isobe , Yasuyuki Arai , Shunpei Yamazaki
发明人： Ryota Imahayashi , Shinobu Furukawa , Atsuo Isobe , Yasuyuki Arai , Shunpei Yamazaki
IPC分类号： H01L21/00
CPC分类号： H01L51/0512 , H01L21/02175 , H01L21/02244 , H01L21/02247 , H01L21/02252 , H01L21/31683 , H01L51/0002 , H01L51/0055 , H01L51/0525 , H01L51/0541 , H01L51/0545 , H01L51/0566
摘要： It is an object to form a high quality gate insulating film which is dense and has a strong insulation resistance property, and to propose a high reliable organic transistor in which a tunnel leakage current is little. One mode of the organic transistor of the present invention has a step of forming the gate insulating film by forming the conductive layer which becomes the gate electrode activating oxygen (or gas including oxygen) or nitrogen (or gas including nitrogen) or the like using dense plasma in which density of electron is 1011 cm−3 or more, and electron temperature is a range of 0.2 eV to 2.0 eV with plasma activation, and reacting directly with a portion of the conductive layer which becomes the gate electrode to be insulated.
摘要翻译：本发明的目的是形成致密且具有很强绝缘电阻特性的高质量栅极绝缘膜，并且提出了隧道泄漏电流很小的高可靠性有机晶体管。本发明的有机晶体管的一种模式具有如下步骤：通过使用密集的方法形成作为活化氧（或含氧气体）或氮（或含氮气体）的栅极的导电层形成栅极绝缘膜电子密度为1011cm -3以上的等离子体，等离子体活化时电子温度为0.2eV〜2.0eV的范围，直接与成为要被绝缘的栅电极的导体层的一部分反应。

7. 发明申请

US20060270066A1 Organic transistor, manufacturing method of semiconductor device and organic transistor 审中-公开
标题翻译：有机晶体管，半导体器件和有机晶体管的制造方法
公开(公告)号：US20060270066A1
公开(公告)日：2006-11-30
申请号：US11405514
申请日：2006-04-18
申请人： Ryota Imahayashi , Shinobu Furukawa , Atsuo Isobe , Yasuyuki Arai , Shunpei Yamazaki
发明人： Ryota Imahayashi , Shinobu Furukawa , Atsuo Isobe , Yasuyuki Arai , Shunpei Yamazaki
IPC分类号： H01L21/00
CPC分类号： H01L51/0512 , H01L21/02175 , H01L21/02244 , H01L21/02247 , H01L21/02252 , H01L21/31683 , H01L51/0002 , H01L51/0055 , H01L51/0525 , H01L51/0541 , H01L51/0545 , H01L51/0566
摘要： It is an object to form a high quality gate insulating film which is dense and has a strong insulation resistance property, and to propose a high reliable organic transistor in which a tunnel leakage current is little. One mode of the organic transistor of the present invention has a step of forming the gate insulating film by forming the conductive layer which becomes the gate electrode activating oxygen (or gas including oxygen) or nitrogen (or gas including nitrogen) or the like using dense plasma in which density of electron is 1011 cm−3 or more, and electron temperature is a range of 0.2 eV to 2.0 eV with plasma activation, and reacting directly with a portion of the conductive layer which becomes the gate electrode to be insulated.
摘要翻译：本发明的目的是形成致密且具有很强绝缘电阻特性的高质量栅极绝缘膜，并且提出了隧道泄漏电流很小的高可靠性有机晶体管。本发明的有机晶体管的一种模式具有如下步骤：通过使用密集的方法形成作为活化氧（或含氧气体）或氮（或含氮气体）的栅极的导电层形成栅极绝缘膜等离子体，其中电子密度为10〜30cm -3以上，等离子体激活时电子温度为0.2eV〜2.0eV，直接与作为要被绝缘的栅电极的导电层的一部分。

8. 发明授权

US09030298B2 Thin semiconductor device and operation method of thin semiconductor device 有权
标题翻译：薄型半导体器件及薄型半导体器件的操作方法
公开(公告)号：US09030298B2
公开(公告)日：2015-05-12
申请号：US13424737
申请日：2012-03-20
申请人： Shunpei Yamazaki , Takeshi Osada , Yasuyuki Arai , Yuko Tachimura
发明人： Shunpei Yamazaki , Takeshi Osada , Yasuyuki Arai , Yuko Tachimura
IPC分类号： G06K9/00 , H01L23/66 , G06K19/07 , G06K7/00 , G06K19/077
CPC分类号： G06K19/072 , G06K7/0008 , G06K19/0723 , G06K19/07718 , G06K19/07749
摘要： The present invention provides a thin semiconductor device in which its security such as prevention of counterfeit or information leakage is to be enhanced. One feature of the present invention is a thin semiconductor device in which a plurality of thin film integrated circuits are mounted and in which at least one integrated circuit is different from the other integrated circuits in any one of a specification, layout, frequency for transmission or reception, a memory, a communication means, a communication rule and the like. According to the present invention, a thin semiconductor device tag having the plurality of thin film integrated circuits communicates with a reader/writer and at least one of the thin film integrated circuits receives a signal to write information in a memory, and the information written in the memory determines which of the thin film integrated circuits communicates.
摘要翻译：本发明提供一种薄型半导体器件，其中要防止伪造或信息泄漏的安全性得到提高。本发明的一个特征是薄型半导体器件，其中安装了多个薄膜集成电路，并且其中至少一个集成电路与其他集成电路不同，其中任何一个规格，布局，传输频率或接收，存储器，通信装置，通信规则等。根据本发明，具有多个薄膜集成电路的薄的半导体器件标签与读取器/写入器通信，并且至少一个薄膜集成电路接收将信息写入存储器的信号，并且写入的信息存储器确定薄膜集成电路中的哪一个通信。

9. 发明授权

US08659014B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08659014B2
公开(公告)日：2014-02-25
申请号：US13174980
申请日：2011-07-01
申请人： Tatsuya Honda , Yasuyuki Arai
发明人： Tatsuya Honda , Yasuyuki Arai
IPC分类号： H01L29/10 , H01L29/12
CPC分类号： H01L27/1225 , H01L27/3244 , H01L29/7869 , Y10T428/12917
摘要： An object is to provide a method for manufacturing a semiconductor device, in which the number of photolithography steps can be reduced, the manufacturing process can be simplified, and manufacturing can be performed with high yield at low cost. A method for manufacturing a semiconductor device includes the following steps: forming a semiconductor film; irradiating a laser beam by passing the laser beam through a photomask including a shield for shielding the laser beam; subliming a region which has been irradiated with the laser beam through a region in which the shield is not formed in the photomask in the semiconductor film; forming an island-shaped semiconductor film in such a way that a region which is not irradiated with the laser beam is not sublimed because it is a region in which the shield is formed in the photomask; forming a first electrode which is one of a source electrode and a drain electrode and a second electrode which is the other one of the source electrode and the drain electrode; forming a gate insulating film; and forming a gate electrode over the gate insulating film.
摘要翻译：本发明的目的是提供一种制造半导体器件的方法，其中可以减少光刻步骤的数量，可以简化制造工艺，并且可以以低成本高成品率地进行制造。一种制造半导体器件的方法包括以下步骤：形成半导体膜; 通过使激光束通过包括用于屏蔽激光束的屏蔽的光掩模来照射激光束; 通过在半导体膜中的光掩模中未形成屏蔽的区域激光照射激光束的区域; 形成岛状半导体膜，使得由于其是在光掩模中形成屏蔽的区域而不被激光束照射的区域不升华; 形成作为源极电极和漏极电极之一的第一电极和作为源极电极和漏极电极中的另一个的第二电极; 形成栅极绝缘膜; 以及在所述栅极绝缘膜上形成栅电极。

10. 发明授权

US08633488B2 Semiconductor device and method of fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08633488B2
公开(公告)日：2014-01-21
申请号：US13325129
申请日：2011-12-14
申请人： Shunpei Yamazaki , Yasuyuki Arai
发明人： Shunpei Yamazaki , Yasuyuki Arai
IPC分类号： H01L29/04 , G02F1/136
CPC分类号： H01L27/124 , G02F1/133553 , G02F1/134336 , G02F1/13439 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/133302 , G02F2001/136295 , G02F2201/123 , H01L21/02532 , H01L21/02592 , H01L21/0262 , H01L21/02631 , H01L21/02686 , H01L21/3003 , H01L27/1214 , H01L27/1218 , H01L27/1222 , H01L27/1251 , H01L27/1255 , H01L27/1285 , H01L27/3244 , H01L27/3246 , H01L27/3248 , H01L27/3258 , H01L27/326 , H01L27/3262 , H01L27/3265 , H01L27/3276 , H01L27/3279 , H01L29/66537 , H01L29/78621 , H01L29/78633 , H01L29/78678 , H01L29/78684 , H01L29/78696
摘要： An active matrix display device having a pixel structure in which pixel electrodes, gate wirings and source wirings are suitably arranged in the pixel portions to realize a high numerical aperture without increasing the number of masks or the number of steps. The device comprises a gate electrode and a source wiring on an insulating surface, a first insulating layer on the gate electrode and on the source wiring, a semiconductor layer on the first insulating film, a second insulating layer on the semiconductor film, a gate wiring connected to the gate electrode on the second insulating layer, a connection electrode for connecting the source wiring and the semiconductor layer together; and a pixel electrode connected to the semiconductor layer.
摘要翻译：具有像素结构的有源矩阵显示装置，其中像素电极，栅极布线和源极布线适当地布置在像素部分中，以实现高数值孔径，而不增加掩模的数量或台阶。该器件包括在绝缘表面上的栅电极和源极布线，栅电极和源极布线上的第一绝缘层，第一绝缘膜上的半导体层，半导体膜上的第二绝缘层，栅极布线连接到第二绝缘层上的栅电极，用于将源极配线和半导体层连接在一起的连接电极; 以及连接到半导体层的像素电极。

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