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    • 2. 发明申请
    • Method and Circuit for Reducing the Crest Factor
    • 降低峰值因子的方法和电路
    • US20080043616A1
    • 2008-02-21
    • US10559698
    • 2004-06-01
    • Axel ClausenWerner HenkelDietmar StraussniggSteffen Trautmann
    • Axel ClausenWerner HenkelDietmar StraussniggSteffen Trautmann
    • H04J11/00
    • H04L27/2624
    • The invention relates to a method for reducing the crest factor, comprising the following method steps: (a) IFFT transformation of a data symbol to be transmitted; (b) looking for all peak values within a frame of the IFFT-transformed data symbol the amount of which is above a predetermined threshold; (c) providing a sample correction function; (d) allocating a scaling and phase rotation to the sample correction function according to the amplitude and position of the peak values found; (e) generating a correction signal in the frequency domain from a linear combination of rotated and scaled vectors according to the scaling and position determined; (f) modifying, particularly reducing the peak value of the data symbol to be transmitted by subtracting the correction signal, and IFFT transformation of the peak-value-modified data symbol into the time domain. The invention also relates to a circuit for reducing the crest factor.
    • 本发明涉及一种降低波峰因数的方法,包括以下方法步骤:(a)要传输的数据符号的IFFT变换; (b)查找其量超过预定阈值的IFFT变换数据符号的帧内的所有峰值; (c)提供样本校正功能; (d)根据找到的峰值的幅度和位置,向采样校正功能分配缩放和相位旋转; (e)根据所确定的比例和位置,从旋转和缩放向量的线性组合产生频域中的校正信号; (f)特别地通过减去校正信号来修改要发送的数据符号的峰值,以及将峰值修正数据符号的IFFT变换变换为时域。 本发明还涉及一种降低波峰因数的电路。
    • 3. 发明申请
    • Circuit and method for reducing the crest factor
    • 降低波峰因数的电路和方法
    • US20070099579A1
    • 2007-05-03
    • US10559751
    • 2004-06-03
    • Axel ClausenWerner HenkelDietmar StraussniggSteffen Trautmann
    • Axel ClausenWerner HenkelDietmar StraussniggSteffen Trautmann
    • H04B1/40
    • H04L27/2624
    • According to the invention, a circuit for reducing the crest factor is provided: (A) with a transmit path with a data symbol to be transmitted; (B) with a model path, which is arranged in parallel with a section of the transmit path, which exhibits a model filter to which the non-oversampled data symbol to be transmitted can be supplied, the non-oversampled data symbol exhibiting a non-flat PSD power spectrum, which exhibits an analysis and evaluation circuit which is arranged following the model filter and which checks whether the time domain function of the data symbol to be transmitted exhibits within a predetermined time interval at least one maximum, the amount of which exceeds a first threshold and/or determines the associated position of the maximum within the time interval, and which, by scaling and displacing a dirac-like sample function generates a correction function in dependence on the position and the amplitude of the maximum; (C) with a subtracting device which is connected to outputs of the model path and of the transmit path and which subtracts the correction function from the data symbol to be transmitted.
    • 根据本发明,提供一种用于降低波峰因数的电路:(A)具有要发送的数据符号的发送路径; (B)具有与发送路径的一部分并行布置的模型路径,该模型路径呈现可以提供要被发送的非过采样数据符号的模型滤波器,未过采样的数据符号表示非 该PSD功率谱表示分析和评估电路,该分析和评估电路被布置在模型滤波器之后,并且检查要发送的数据符号的时域功能是否在预定的时间间隔内至少呈现出最大值,其量 超过第一阈值和/或在时间间隔内确定最大值的相关位置,并且通过缩放和移位狄拉克样样本函数根据最大值的位置和幅度产生校正函数; (C)与减法装置连接,该减法装置连接到模型路径和发送路径的输出,并从要发送的数据符号中减去校正功能。
    • 9. 发明授权
    • Tuning circuit for a filter
    • 滤波器调谐电路
    • US07002404B2
    • 2006-02-21
    • US10773710
    • 2004-02-06
    • Richard GagglManfred NoppPeter PesslChristian SchranzDietmar Straussnigg
    • Richard GagglManfred NoppPeter PesslChristian SchranzDietmar Straussnigg
    • H03K5/00
    • H03H11/1291H03H19/008H03H2210/021H03H2210/043
    • The invention relates to a tuning circuit for tuning a filter stage, which has an RC element (1) with an RC time constant (τ), with the RC time constant (τ) being the product of the resistance of a resistor (R1) in the RC element (1) and the capacitance of a capacitor (C1), which is connected in series with the resistor (R1), in the RC element (1), having a comparator (10) for comparison of the voltage which is produced at the potential node (4) between the resistor (R1) and the capacitor (C1), with a reference ground voltage; and having a controller (15) which varies the charge on the capacitor (C1) in the RC element (1) until the comparator (10) indicates that the voltage which is produced at the potential node (4) is equal to the reference ground voltage, with the controller (15) switching a capacitor array (26) as a function of the charge variation time, which capacitor array (26) is connected in parallel with the capacitor (C1) in the RC element (1), in order to compensate for any discrepancy between the RC time constant (τ) of the RC element (1) and a nominal value.
    • 本发明涉及一种用于调谐滤波器级的调谐电路,其具有RC时间常数(τ)的RC元件(1),其中RC时间常数(τ)是电阻器(R 1 )和RC元件(1)中与电阻器(R 1)串联连接的电容器(C1)的电容,具有比较器(10),用于比较 在电阻器(R 1)和电容器(C 1)之间的电位节点(4)产生的具有参考接地电压的电压; 并且具有改变RC元件(1)中的电容器(C1)上的电荷的控制器(15),直到比较器(10)指示在电势节点(4)处产生的电压等于参考 接地电压,控制器(15)根据电荷变化时间切换电容器阵列(26),电容器阵列(26)与RC元件(1)中的电容器(C 1)并联连接, 以便补偿RC元件(1)的RC时间常数(τ)与标称值之间的任何差异。