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1. 发明授权

US08015511B2 Adjustment of mask shapes for improving printability of dense integrated circuit layout 有权
标题翻译：调整面罩形状，提高密集集成电路布局的可印刷性
公开(公告)号：US08015511B2
公开(公告)日：2011-09-06
申请号：US12348331
申请日：2009-01-05
申请人： Azalia Krasnoperova , Ian P Stobert , Klaus Herold
发明人： Azalia Krasnoperova , Ian P Stobert , Klaus Herold
IPC分类号： G06F17/50
CPC分类号： G03F1/36
摘要： Embodiments of the present invention provide a method for making mask shape adjustment The method includes creating a first mask shape; identifying one or more mask segments of the first mask shape as candidate mask segments of needing segment adjustment; applying an optical proximity correction (OPC) process to the first mask shape, the OPC process identifying at least one of the candidate mask segments as a constrained mask segment; applying a rotational adjustment to the constrained mask segment; and creating a second mask shape having the constrained mask segment being rotationally adjusted. A system and a machine-readable medium for performing the above method are also provided.
摘要翻译：本发明的实施例提供一种用于制作掩模形状调整的方法。该方法包括产生第一掩模形状; 识别第一掩模形状的一个或多个掩模段作为需要段调整的候选掩码段; 将光学邻近校正（OPC）处理应用于所述第一掩模形状，所述OPC处理将所述候选掩模段中的至少一个识别为约束掩模段; 对受约束的掩模段施加旋转调节; 以及创建具有被约束的掩模段被旋转地调节的第二掩模形状。还提供了用于执行上述方法的系统和机器可读介质。

2. 发明申请

US20100175041A1 ADJUSTMENT OF MASK SHAPES FOR IMPROVING PRINTABILITY OF DENSE INTEGRATED CIRCUIT LAYOUT 有权
标题翻译：调整密封形状的改进打印电路集成电路布局的可打印性
公开(公告)号：US20100175041A1
公开(公告)日：2010-07-08
申请号：US12348331
申请日：2009-01-05
申请人： Azalia Krasnoperova , Ian P. Stobert , Klaus Herold
发明人： Azalia Krasnoperova , Ian P. Stobert , Klaus Herold
IPC分类号： G06F17/50
CPC分类号： G03F1/36
摘要： Embodiments of the present invention provide a method for making mask shape adjustment The method includes creating a first mask shape; identifying one or more mask segments of the first mask shape as candidate mask segments of needing segment adjustment; applying an optical proximity correction (OPC) process to the first mask shape, the OPC process identifying at least one of the candidate mask segments as a constrained mask segment; applying a rotational adjustment to the constrained mask segment; and creating a second mask shape having the constrained mask segment being rotationally adjusted. A system and a machine-readable medium for performing the above method are also provided.
摘要翻译：本发明的实施例提供一种用于制作掩模形状调整的方法。该方法包括产生第一掩模形状; 识别第一掩模形状的一个或多个掩模段作为需要段调整的候选掩码段; 将光学邻近校正（OPC）处理应用于所述第一掩模形状，所述OPC处理将所述候选掩模段中的至少一个识别为约束掩模段; 对受约束的掩模段施加旋转调节; 以及创建具有被约束的掩模段被旋转地调节的第二掩模形状。还提供了用于执行上述方法的系统和机器可读介质。

3. 发明申请

US20070261013A1 DESIGNER'S INTENT TOLERANCE BANDS FOR PROXIMITY CORRECTION AND CHECKING 失效
公开(公告)号：US20070261013A1
公开(公告)日：2007-11-08
申请号：US11778302
申请日：2007-07-16
申请人： Scott Mansfield , Lars Liebmann , Azalia Krasnoperova , Ioana Graur
发明人： Scott Mansfield , Lars Liebmann , Azalia Krasnoperova , Ioana Graur
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G03F1/36 , G06F2217/12 , Y02P90/265
摘要： A method of conveying the designer's intended electrical characteristics for a semiconductor design is provided by forming tolerance bands for a design layer of interest that take into consideration constraints from design layers that interact with and influence the features on the design layer of interest. The method determines regions, i.e. tolerance bands, within which the printed edges of features of the layer of interest will print within a predetermined criterion, and satisfy a variety of constraints, including, but not limited to, electrical, overlay and manufacturability constraints arising from the influence of features on other layers. The method may be implemented in a computer program product for execution on a computer system. The resulting tolerance bands can be used to efficiently convey the designer's intent to a lithographer, an OPC engineer or a mask manufacturer or tool.

4. 发明申请

US20070083847A1 DESIGNER'S INTENT TOLERANCE BANDS FOR PROXIMITY CORRECTION AND CHECKING 失效
标题翻译：设计师对于接近修正和检查的信誉度量表
公开(公告)号：US20070083847A1
公开(公告)日：2007-04-12
申请号：US11163264
申请日：2005-10-12
申请人： Scott Mansfield , Lars Liebmann , Azalia Krasnoperova , Ioana Graur
发明人： Scott Mansfield , Lars Liebmann , Azalia Krasnoperova , Ioana Graur
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G03F1/36 , G06F2217/12 , Y02P90/265
摘要： A method of conveying the designer's intended electrical characteristics for a semiconductor design is provided by forming tolerance bands for a design layer of interest that take into consideration constraints from design layers that interact with and influence the features on the design layer of interest. The method determines regions, i.e. tolerance bands, within which the printed edges of features of the layer of interest will print within a predetermined criterion, and satisfy a variety of constraints, including, but not limited to, electrical, overlay and manufacturability constraints arising from the influence of features on other layers. The method may be implemented in a computer program product for execution on a computer system. The resulting tolerance bands can be used to efficiently convey the designer's intent to a lithographer, an OPC engineer or a mask manufacturer or tool.
摘要翻译：通过为感兴趣的设计层形成公差带来提供设计者用于半导体设计的预期电气特性的方法，其考虑到与感兴趣的设计层上的特征相互作用并影响其特征的设计层的约束。该方法确定区域，即公差带，其中感兴趣层的特征的打印边缘将在预定标准内打印，并且满足各种约束，包括但不限于电气，重叠和可制造性约束特征对其他层的影响。该方法可以在用于在计算机系统上执行的计算机程序产品中实现。所得到的公差带可用于有效传达设计人员对平版印刷机，OPC工程师或掩模制造商或工具的意图。

5. 发明授权

US07607114B2 Designer's intent tolerance bands for proximity correction and checking 失效
标题翻译：设计师的意图容差带用于近距离校正和检查
公开(公告)号：US07607114B2
公开(公告)日：2009-10-20
申请号：US11778302
申请日：2007-07-16
申请人： Scott M. Mansfield , Lars W. Liebmann , Azalia Krasnoperova , Ioana Graur
发明人： Scott M. Mansfield , Lars W. Liebmann , Azalia Krasnoperova , Ioana Graur
IPC分类号： G06F17/50 , G06F9/45 , G06F9/455
CPC分类号： G06F17/5081 , G03F1/36 , G06F2217/12 , Y02P90/265
摘要： A method of conveying the designer's intended electrical characteristics for a semiconductor design is provided by forming tolerance bands for a design layer of interest that take into consideration constraints from design layers that interact with and influence the features on the design layer of interest. The method determines regions, i.e. tolerance bands, within which the printed edges of features of the layer of interest will print within a predetermined criterion, and satisfy a variety of constraints, including, but not limited to, electrical, overlay and manufacturability constraints arising from the influence of features on other layers. The method may be implemented in a computer program product for execution on a computer system. The resulting tolerance bands can be used to efficiently convey the designer's intent to a lithographer, an OPC engineer or a mask manufacturer or tool.
摘要翻译：通过为感兴趣的设计层形成公差带来提供设计者用于半导体设计的预期电气特性的方法，其考虑到与感兴趣的设计层上的特征相互作用并影响其特征的设计层的约束。该方法确定区域，即公差带，其中感兴趣层的特征的打印边缘将在预定标准内打印，并且满足各种约束，包括但不限于电气，重叠和可制造性约束特征对其他层的影响。该方法可以在用于在计算机系统上执行的计算机程序产品中实现。所得到的公差带可用于有效传达设计人员对平版印刷机，OPC工程师或掩模制造商或工具的意图。

6. 发明授权

US07571418B2 Simulation site placement for lithographic process models 有权
标题翻译：光刻过程模型的模拟现场布置
公开(公告)号：US07571418B2
公开(公告)日：2009-08-04
申请号：US11615221
申请日：2007-02-20
申请人： Azalia Krasnoperova
发明人： Azalia Krasnoperova
IPC分类号： G06F17/50
CPC分类号： G03F1/36
摘要： A method and system for performing the method are provided for designing a mask layout that includes selecting simulation sites for optical proximity correction (OPC) or mask verification, prior to fragmentation of shape edges. The primary simulation sites are selected based upon the influence of adjacent shapes, and then fragmentation is performed based on the primary simulation sites. Preferably, the simulation sites are selected by initial simulation within a region of influence of the vertices of mask shapes. The extrema of the resulting simulations are identified, and the intersection of a projection from the extrema to shape edges is used to define the primary simulation sites. Fragmentation of the edges may then be performed as long as the primary simulation sites thus selected are retained. The resulting simulation sites will allow the OPC engine to more effectively correct the shapes where the greatest influences will occur.
摘要翻译：提供了一种用于执行该方法的方法和系统，用于设计在形状边缘分裂之前包括选择用于光学邻近校正（OPC）或掩模验证的模拟位置的掩模布局。基于相邻形状的影响选择主要模拟站点，然后基于主要模拟站点进行碎片化。优选地，通过在掩模形状的顶点的影响区域内的初始模拟来选择模拟位置。识别所得到的模拟的极值，并且使用从极值到形状边缘的投影的交点来定义主要模拟位置。只要保留如此选择的主要模拟站点，则可以执行边缘的分段。所得到的模拟站点将允许OPC引擎更有效地校正将发生最大影响的形状。

7. 发明申请

US20080201684A1 SIMULATION SITE PLACEMENT FOR LITHOGRAPHIC PROCESS MODELS 有权
标题翻译：用于光刻过程模型的模拟场地放置
公开(公告)号：US20080201684A1
公开(公告)日：2008-08-21
申请号：US11615221
申请日：2007-02-20
申请人： Azalia Krasnoperova
发明人： Azalia Krasnoperova
IPC分类号： G06F17/50
CPC分类号： G03F1/36
摘要： A method and system for performing the method are provided for designing a mask layout that includes selecting simulation sites for optical proximity correction (OPC) or mask verification, prior to fragmentation of shape edges. The primary simulation sites are selected based upon the influence of adjacent shapes, and then fragmentation is performed based on the primary simulation sites. Preferably, the simulation sites are selected by initial simulation within a region of influence of the vertices of mask shapes. The extrema of the resulting simulations are identified, and the intersection of a projection from the extrema to shape edges is used to define the primary simulation sites. Fragmentation of the edges may then be performed as long as the primary simulation sites thus selected are retained. The resulting simulation sites will allow the OPC engine to more effectively correct the shapes where the greatest influences will occur.
摘要翻译：提供了一种用于执行该方法的方法和系统，用于设计在形状边缘分裂之前包括选择用于光学邻近校正（OPC）或掩模验证的模拟位置的掩模布局。基于相邻形状的影响选择主要模拟站点，然后基于主要模拟站点进行碎片化。优选地，通过在掩模形状的顶点的影响区域内的初始模拟来选择模拟位置。识别所得到的模拟的极值，并且使用从极值到形状边缘的投影的交点来定义主要模拟位置。只要保留如此选择的主要模拟站点，则可以执行边缘的分段。所得到的模拟站点将允许OPC引擎更有效地校正将发生最大影响的形状。

8. 发明授权

US07266798B2 Designer's intent tolerance bands for proximity correction and checking 失效
标题翻译：设计师的意图容差带用于近距离校正和检查
公开(公告)号：US07266798B2
公开(公告)日：2007-09-04
申请号：US11163264
申请日：2005-10-12
申请人： Scott M. Mansfield , Lars W. Liebmann , Azalia Krasnoperova , Ioana Graur
发明人： Scott M. Mansfield , Lars W. Liebmann , Azalia Krasnoperova , Ioana Graur
IPC分类号： G06F17/50 , G06F9/455
CPC分类号： G06F17/5081 , G03F1/36 , G06F2217/12 , Y02P90/265
摘要： A method of conveying the designer's intended electrical characteristics for a semiconductor design is provided by forming tolerance bands for a design layer of interest that take into consideration constraints from design layers that interact with and influence the features on the design layer of interest. The method determines regions, i.e. tolerance bands, within which the printed edges of features of the layer of interest will print within a predetermined criterion, and satisfy a variety of constraints, including, but not limited to, electrical, overlay and manufacturability constraints arising from the influence of features on other layers. The method may be implemented in a computer program product for execution on a computer system. The resulting tolerance bands can be used to efficiently convey the designer's intent to a lithographer, an OPC engineer or a mask manufacturer or tool.
摘要翻译：通过为感兴趣的设计层形成公差带来提供设计者用于半导体设计的预期电气特性的方法，其考虑到与感兴趣的设计层上的特征相互作用并影响其特征的设计层的约束。该方法确定区域，即公差带，其中感兴趣层的特征的打印边缘将在预定标准内打印，并且满足各种约束，包括但不限于电气，重叠和可制造性约束特征对其他层的影响。该方法可以在用于在计算机系统上执行的计算机程序产品中实现。所得到的公差带可用于有效传达设计人员对平版印刷机，OPC工程师或掩模制造商或工具的意图。

9. 发明申请

US20050117795A1 Mask inspection process accounting for mask writer proximity correction 失效
标题翻译：掩模检查过程负责掩模写入器邻近校正
公开(公告)号：US20050117795A1
公开(公告)日：2005-06-02
申请号：US10725854
申请日：2003-12-02
申请人： Karen Badger , James Culp , Azalia Krasnoperova
发明人： Karen Badger , James Culp , Azalia Krasnoperova
IPC分类号： G03F7/20 , G06F17/50 , G06K9/00
CPC分类号： G03F7/70441
摘要： A mask inspection method and system. Provided is a mask fabrication database describing geometrical shapes S to be printed as part of a mask pattern on a reticle to fabricate a mask through use of a mask fabrication tooling. The shapes S appear on the mask as shapes S′ upon being printed. At least one of the shapes S′ may be geometrically distorted relative to a corresponding at least one of the shapes S due to a lack of precision in the mask fabrication tooling. Also provided is a mask inspection database to be used for inspecting the mask after the mask has been fabricated by the mask fabrication tooling. The mask inspection database describes shapes S″ approximating the shapes S′. A geometric distortion between the shapes S′ and S″ is less than a corresponding geometric distortion between the shapes S′ and S.
摘要翻译：面罩检查方法和系统。提供了一种掩模制造数据库，其描述要在掩模版上作为掩模图案的一部分打印的几何形状S，以通过使用掩模制造工具来制造掩模。形状S在印刷时作为形状S'出现在掩模上。由于在掩模制造工具中缺乏精度，至少一种形状S'可能相对于形状S中的相应的至少一个形状几何失真。还提供了掩模检查数据库，用于在通过掩模制造工具制造掩模之后检查掩模。掩模检查数据库描述形状S'近似形状S'。形状S'和S“之间的几何变形小于形状S'和S之间的对应的几何变形。

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