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1. 发明授权

US07138721B2 Memory module 有权
标题翻译：内存模块
公开(公告)号：US07138721B2
公开(公告)日：2006-11-21
申请号：US10925987
申请日：2004-08-26
申请人： Chang-Hyun Kim , Kyung-Ho Kim
发明人： Chang-Hyun Kim , Kyung-Ho Kim
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L22/22 , G11C5/04 , H01L25/0652 , H01L2224/48091 , H01L2224/49175 , H01L2924/181 , H01L2924/00014 , H01L2924/00012
摘要： A memory module includes a substrate having a common substrate body, a plurality of first memory chips located over a surface of the common substrate body, a conductive pattern which electrically connects at least some of the plurality of first memory chips, and an external terminal which is electrically connected to the conductive pattern. The memory module further includes at least one second memory chip mounted over a respective one of the plurality of first memory chips and electrically connected to the conductive pattern, where each one of the plurality of first memory chips mounted below the at least one second memory chip is disabled.
摘要翻译：存储器模块包括具有公共衬底主体的衬底，位于公共衬底主体的表面上方的多个第一存储器芯片，电连接多个第一存储器芯片中的至少一个的导电图案和外部端子，电连接到导电图案。存储器模块还包括安装在多个第一存储器芯片中的相应一个第一存储器芯片上并电连接到导电图案的至少一个第二存储器芯片，其中多个第一存储器芯片中的每一个安装在至少一个第二存储器芯片被禁用。

2. 发明授权

US08084840B2 Interposer including air gap structure, methods of forming the same, semiconductor device including the interposer, and multi-chip package including the interposer 失效
标题翻译：包括气隙结构的内插件，其形成方法，包括该插入件的半导体器件和包括该插入件的多芯片封装
公开(公告)号：US08084840B2
公开(公告)日：2011-12-27
申请号：US11485535
申请日：2006-07-13
申请人： Chang-Hyun Kim , Kyung-Ho Kim
发明人： Chang-Hyun Kim , Kyung-Ho Kim
IPC分类号： H01L29/00
CPC分类号： H01L23/535 , H01L25/0652 , H01L2224/48091 , H01L2224/48464 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
摘要： Example embodiments of the present invention relate to an interposer of a semiconductor device having an air gap structure, a semiconductor device using the interposer, a multi-chip package using the interposer and methods of forming the interposer. The interposer includes a semiconductor substrate including a void, a metal interconnect, provided within the void, thereby forming an air gap insulating the metal interconnect. The metal interconnect may be connected to a contact element, and may be maintained within the air gap using the contact element.
摘要翻译：本发明的示例性实施例涉及具有气隙结构的半导体器件的插入器，使用该插入器的半导体器件，使用该插入器的多芯片封装以及形成该插入件的方法。插入器包括设置在空隙内的包括空隙，金属互连的半导体衬底，由此形成绝缘金属互连的气隙。金属互连可以连接到接触元件，并且可以使用接触元件保持在气隙内。

3. 发明申请

US20050047248A1 Memory module 有权
标题翻译：内存模块
公开(公告)号：US20050047248A1
公开(公告)日：2005-03-03
申请号：US10925987
申请日：2004-08-26
申请人： Chang-Hyun Kim , Kyung-Ho Kim
发明人： Chang-Hyun Kim , Kyung-Ho Kim
IPC分类号： H01L23/12 , G11C5/04 , H01L21/66 , H01L25/065 , G11C7/00
CPC分类号： H01L22/22 , G11C5/04 , H01L25/0652 , H01L2224/48091 , H01L2224/49175 , H01L2924/181 , H01L2924/00014 , H01L2924/00012
摘要： A memory module includes a substrate having a common substrate body, a plurality of first memory chips located over a surface of the common substrate body, a conductive pattern which electrically connects at least some of the plurality of first memory chips, and an external terminal which is electrically connected to the conductive pattern. The memory module further includes at least one second memory chip mounted over a respective one of the plurality of first memory chips and electrically connected to the conductive pattern, where each one of the plurality of first memory chips mounted below the at least one second memory chip is disabled.
摘要翻译：存储器模块包括具有公共衬底主体的衬底，位于公共衬底主体的表面上方的多个第一存储器芯片，电连接多个第一存储器芯片中的至少一个的导电图案和外部端子，电连接到导电图案。存储器模块还包括安装在多个第一存储器芯片中的相应一个第一存储器芯片上并电连接到导电图案的至少一个第二存储器芯片，其中多个第一存储器芯片中的每一个安装在至少一个第二存储器芯片被禁用。

4. 发明授权

US06806140B1 Semiconductor memory device for eliminating floating body effect and method of fabricating the same 有权
标题翻译：用于消除浮体效应的半导体存储器件及其制造方法
公开(公告)号：US06806140B1
公开(公告)日：2004-10-19
申请号：US10401972
申请日：2003-03-27
申请人： Chang-Hyun Kim , Kyung-Ho Kim , Won-suk Yang
发明人： Chang-Hyun Kim , Kyung-Ho Kim , Won-suk Yang
IPC分类号： H01L21336
CPC分类号： H01L27/10852 , H01L27/10808 , H01L27/10823 , H01L27/10876 , H01L27/10885
摘要： A semiconductor memory device from which a floating body effect is eliminated and which has enhanced immunity to external noise, and a method of fabricating the same are provided. The memory device includes a semiconductor substrate. A plurality of bit lines are buried in the semiconductor substrate such that the surfaces of the bit lines are adjacent to the surface of the semiconductor substrate. The bit lines are arranged in parallel with one another. A plurality of word lines are formed on the semiconductor substrate so that the word lines cross and are isolated from the bit lines. A plurality of vertical access transistors are formed at individual memory cells where the bit lines and the word lines intersect. Each vertical access transistor includes a first source/drain region, a body region including a vertical channel region and a second source/drain region which are formed sequentially on the bit line. The vertical access transistor contacts a gate insulation layer formed on a portion of one side of the sidewalls of the word line. Body regions including the channel regions of the access transistors are connected to one another to be a single integrated region.
摘要翻译：提供了一种消除浮体效应并且具有增强的对外部噪声的抗扰性的半导体存储器件及其制造方法。存储器件包括半导体衬底。多个位线被埋在半导体衬底中，使得位线的表面与半导体衬底的表面相邻。位线彼此平行排列。多个字线形成在半导体衬底上，使得字线交叉并与位线隔离。在位线和字线相交的各个存储单元处形成多个垂直存取晶体管。每个垂直存取晶体管包括第一源极/漏极区域，包括在位线上顺序形成的垂直沟道区域和第二源极/漏极区域的主体区域。垂直存取晶体管接触形成在字线侧壁一侧的一部分上的栅极绝缘层。包括存取晶体管的通道区域的主体区域彼此连接成单个集成区域。

5. 发明申请

US20070013392A1 Interposer including air gap structure, methods of forming the same, semiconductor device including the interposer, and multi-chip package including the interposer 失效
标题翻译：包括气隙结构的内插件，其形成方法，包括该插入件的半导体器件和包括该插入件的多芯片封装
公开(公告)号：US20070013392A1
公开(公告)日：2007-01-18
申请号：US11485535
申请日：2006-07-13
申请人： Chang-Hyun Kim , Kyung-Ho Kim
发明人： Chang-Hyun Kim , Kyung-Ho Kim
IPC分类号： G01R31/02
CPC分类号： H01L23/535 , H01L25/0652 , H01L2224/48091 , H01L2224/48464 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
摘要： Example embodiments of the present invention relate to an interposer of a semiconductor device having an air gap structure, a semiconductor device using the interposer, a multi-chip package using the interposer and methods of forming the interposer. The interposer includes a semiconductor substrate including a void, a metal interconnect, provided within the void, thereby forming an air gap insulating the metal interconnect. The metal interconnect may be connected to a contact element, and may be maintained within the air gap using the contact element.
摘要翻译：本发明的示例性实施例涉及具有气隙结构的半导体器件的插入器，使用该插入器的半导体器件，使用该插入器的多芯片封装以及形成该插入件的方法。插入器包括设置在空隙内的包括空隙，金属互连的半导体衬底，由此形成绝缘金属互连的气隙。金属互连可以连接到接触元件，并且可以使用接触元件保持在气隙内。

6. 发明授权

US06573545B2 Semiconductor memory device for eliminating floating body effect and method of fabricating the same 失效
公开(公告)号：US06573545B2
公开(公告)日：2003-06-03
申请号：US09882489
申请日：2001-06-15
申请人： Chang-Hyun Kim , Kyung-Ho Kim , Won-suk Yang
发明人： Chang-Hyun Kim , Kyung-Ho Kim , Won-suk Yang
IPC分类号： H01L27108
CPC分类号： H01L27/10852 , H01L27/10808 , H01L27/10823 , H01L27/10876 , H01L27/10885
摘要： A semiconductor memory device from which a floating body effect is eliminated and which has enhanced immunity to external noise, and a method of fabricating the same are provided. The memory device includes a semiconductor substrate. A plurality of bit lines are buried in the semiconductor substrate such that the surfaces of the bit lines are adjacent to the surface of the semiconductor substrate. The bit lines are arranged in parallel with one another. A plurality of word lines are formed on the semiconductor substrate so that the word lines cross and are isolated from the bit lines. A plurality of vertical access transistors are formed at individual memory cells where the bit lines and the word lines intersect. Each vertical access transistor includes a first source/drain region, a body region including a vertical channel region and a second source/drain region which are formed sequentially on the bit line. The vertical access transistor contacts a gate insulation layer formed on a portion of one side of the sidewalls of the word line. Body regions including the channel regions of the access transistors are connected to one another to be a single integrated region.

7. 发明申请

US20100235531A1 UPNP-BASED MEDIA CONTENTS REPRODUCING SYSTEM AND METHOD THEREOF 审中-公开
标题翻译：基于UPNP的媒体内容再现系统及其方法
公开(公告)号：US20100235531A1
公开(公告)日：2010-09-16
申请号：US12785386
申请日：2010-05-21
申请人： Ku-Bong Min , Chang-Hyun Kim
发明人： Ku-Bong Min , Chang-Hyun Kim
IPC分类号： G06F15/16
CPC分类号： H04L12/2812 , H04L12/2816 , H04L12/2823 , H04L2012/2849 , H04N21/4147 , H04N21/43615 , H04Q11/0478
摘要： A method for controlling of content playback related information on a network including a server, a playing device, and a controller, the controller being used for controlling the server and the playing device is presented. the method being performed by the server and including transmitting, according to a resume request, a transport state value and a rendering state value stored in the server to the controller, wherein the controller transmits the transport state value and the rendering state value according to an operation mode including a different location mode and a same location mode, and wherein the controller, in case of the different mode, transmits the transport state value to the server, and transmits the rendering state value to the playing device.
摘要翻译：提供一种用于控制包括服务器，播放设备和控制器的网络上的内容回放相关信息的方法，用于控制服务器和播放设备的控制器。所述方法由所述服务器执行，并且包括根据恢复请求将存储在所述服务器中的传输状态值和呈现状态值发送到所述控制器，其中所述控制器根据所述控制器发送所述传输状态值和所述呈现状态值操作模式包括不同的位置模式和相同的位置模式，并且其中在不同模式的情况下，控制器将传输状态值发送到服务器，并将呈现状态值发送到播放设备。

8. 发明授权

US07336554B2 Semiconductor memory device having a reduced number of pins 有权
标题翻译：具有减少数量的引脚的半导体存储器件
公开(公告)号：US07336554B2
公开(公告)日：2008-02-26
申请号：US11258565
申请日：2005-10-25
申请人： Kyu-Hyoun Kim , Chang-Hyun Kim
发明人： Kyu-Hyoun Kim , Chang-Hyun Kim
IPC分类号： G11C7/00 , G11C7/10
CPC分类号： G11C5/066 , H04Q2213/13103 , H04Q2213/13292 , H04Q2213/1332 , H04Q2213/13322
摘要： A semiconductor memory device includes an IO circuit for receiving or outputting command signals, address signals and data which are serialized and an IO signal control circuit for parallel converting the serialized command signals, address signals and data inputted through the IO circuit and applying the parallel converted signals to an internal portion and serial converting parallel data applied from the internal portion and outputting the serial converted data to the IO circuit.
摘要翻译：一种半导体存储器件包括用于接收或输出串行化的命令信号，地址信号和数据的IO电路，以及用于并行转换串行化命令信号的IO信号控制电路，地址信号和通过IO电路输入的数据并且将并行转换发送到内部部分，并串行转换从内部部分应用的并行数据，并将串行转换数据输出到IO电路。

9. 发明申请

US20080005272A1 UPNP-BASED MEDIA CONTENTS REPRODUCING SYSTEM AND METHOD THEREOF 审中-公开
标题翻译：基于UPNP的媒体内容再现系统及其方法
公开(公告)号：US20080005272A1
公开(公告)日：2008-01-03
申请号：US11844556
申请日：2007-08-24
申请人： Ku-Bong Kim , Chang-Hyun Kim
发明人： Ku-Bong Kim , Chang-Hyun Kim
IPC分类号： G06F15/16
CPC分类号： H04L12/2812 , H04L12/2816 , H04L12/2823 , H04L2012/2849 , H04N21/4147 , H04N21/43615 , H04Q11/0478
摘要： A method for delivering content playback related information between devices comprising gathering state information from at least one service by invoking an action to the at least one service and storing the gathered state information in a device. A system for delivering content playback related information includes a server for storing content, a device including at least one service, and a control point for gathering state information from the at least one service by invoking an action to the device and storing the gathered state information in the server.
摘要翻译：一种用于在设备之间传送内容回放相关信息的方法，包括：通过向所述至少一个服务调用动作来收集来自至少一个服务的状态信息并将所收集的状态信息存储在设备中。一种用于传送内容回放相关信息的系统包括用于存储内容的服务器，包括至少一个服务的设备和用于通过向该设备调用动作来收集来自至少一个服务的状态信息的控制点，并且存储所收集的状态信息在服务器中。

10. 发明授权

US08093075B2 Semiconductor integrated circuit including a power supply, semiconductor system including a semiconductor integrated circuit, and method of forming a semiconductor integrated circuit 失效
标题翻译：包括电源的半导体集成电路，包括半导体集成电路的半导体系统和形成半导体集成电路的方法
公开(公告)号：US08093075B2
公开(公告)日：2012-01-10
申请号：US12656134
申请日：2010-01-19
申请人： Kyu-Hyoun Kim , Chang-Hyun Kim
发明人： Kyu-Hyoun Kim , Chang-Hyun Kim
IPC分类号： H01L21/00
CPC分类号： H01L23/58 , H01L23/5286 , H01L24/83 , H01L25/18 , H01L2224/48091 , H01L2224/48137 , H01L2224/83801 , H01L2924/01068 , H01L2924/14 , H01L2924/19104 , H01L2924/00014 , H01L2924/00
摘要： Provided are a semiconductor integrated circuit including a power supply, a semiconductor system including the semiconductor integrated circuit, and a method of forming the semiconductor integrated circuit. The semiconductor integrated circuit includes: a semiconductor substrate on a surface of which a plurality of electrical circuits and a plurality of power pads are mounted; an insulation layer stacked on the semiconductor substrate; a first conductive layer connected to a first power pad by a first via and stacked on the insulation layer; a second conductive layer connected to a second power pad by a second via, stacked on the insulation layer, and separated from the first insulation layer; and a power generation layer stacked on the first conductive layer and the second conductive layer and that generates voltage.
摘要翻译：提供了包括电源，包括半导体集成电路的半导体系统和形成半导体集成电路的方法的半导体集成电路。半导体集成电路包括：表面上安装有多个电路和多个电源焊盘的半导体衬底; 层叠在所述半导体基板上的绝缘层; 第一导电层，其通过第一通孔连接到第一功率垫并堆叠在所述绝缘层上; 通过第二通孔连接到第二功率垫的第二导电层，堆叠在绝缘层上并与第一绝缘层分离; 以及堆叠在第一导电层和第二导电层上并产生电压的发电层。

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