专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07479826B2 Chopper amplifier circuit and semiconductor device 有权
标题翻译：斩波放大器电路和半导体器件
公开(公告)号：US07479826B2
公开(公告)日：2009-01-20
申请号：US11499357
申请日：2006-08-04
申请人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Minoru Ariyama , Atsushi Igarashi , Akira Takeda
发明人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Minoru Ariyama , Atsushi Igarashi , Akira Takeda
IPC分类号： H03F1/02
CPC分类号： H03F3/45775
摘要： Provided is a chopper amplifier circuit capable of reducing an offset voltage of a sensor bridge and temperature characteristics of the offset voltage. An offset adjusting voltage generation circuit for generating a voltage equal to an offset voltage of a sensor bridge and an offset temperature characteristics adjusting voltage generation circuit for generating a voltage having temperature characteristics equal to those of the offset voltage are provided. These output voltages are chopper-modulated and subtracted from a chopper-modulated output signal of the sensor bridge.
摘要翻译：提供了能够减小传感器桥的偏移电压和偏移电压的温度特性的斩波放大器电路。提供了用于产生等于传感器桥的偏移电压的电压的偏移调整电压产生电路和用于产生具有等于偏移电压的温度特性的电压的偏移温度特性调整电压产生电路。这些输出电压被斩波调制并从传感器桥的斩波调制输出信号中减去。

2. 发明授权

US07508258B2 Amplifier circuit 有权
标题翻译：放大器电路
公开(公告)号：US07508258B2
公开(公告)日：2009-03-24
申请号：US11703026
申请日：2007-02-06
申请人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Akira Takeda , Minoru Ariyama , Atsushi Igarashi
发明人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Akira Takeda , Minoru Ariyama , Atsushi Igarashi
IPC分类号： H03F1/02
CPC分类号： H03F1/3211 , H03F3/387 , H03F3/45475 , H03F3/45986 , H03F3/45995 , H03F2203/45138 , H03F2203/45212 , H03F2203/45614 , H03F2203/45616 , H03F2203/45681 , H03F2203/45726
摘要： Provided is a chopper amplifier circuit capable of eliminating an influence of a slew rate of an amplifier and suppressing spike generation to thereby obtain an output signal having little harmonic distortion. The chopper amplifier circuit according to the present invention includes: a first chopper circuit for chopping an input signal by a first pulse and a second pulse shifted from each other in phase by a half cycle, switching a relation of connection between an input terminal pair and an output terminal pair at a timing of the chopping, and outputting the input signal as a modulated signal; an amplifier for amplifying the modulated signal and outputting the modulated signal thus amplified as an amplified signal; a first sample hold circuit for holding the amplified signal at the first pulse and outputting the amplified signal at the second pulse; and a second sample hold circuit for holding the amplified signal at the second pulse and outputting the amplified signal at the first pulse.
摘要翻译：提供了能够消除放大器的转换速率的影响并抑制尖峰发生从而获得具有很小的谐波失真的输出信号的斩波放大器电路。根据本发明的斩波放大器电路包括：第一斩波电路，用于通过第一脉冲斩波输入信号和相位偏移半个周期的第二脉冲，切换输入端子对和在斩波的定时输出端子对，并输出该输入信号作为调制信号; 放大器，用于放大经调制的信号并输出被放大的被调制信号作为放大信号; 第一采样保持电路，用于保持放大的信号处于第一脉冲，并以第二脉冲输出放大的信号; 以及第二采样保持电路，用于将放大的信号保持在第二脉冲，并以第一脉冲输出放大的信号。

3. 发明申请

US20070222509A1 Amplifier circuit 有权
标题翻译：放大器电路
公开(公告)号：US20070222509A1
公开(公告)日：2007-09-27
申请号：US11703026
申请日：2007-02-06
申请人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Akira Takeda , Minoru Ariyama , Atsushi Igarashi
发明人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Akira Takeda , Minoru Ariyama , Atsushi Igarashi
IPC分类号： H03F1/14
CPC分类号： H03F1/3211 , H03F3/387 , H03F3/45475 , H03F3/45986 , H03F3/45995 , H03F2203/45138 , H03F2203/45212 , H03F2203/45614 , H03F2203/45616 , H03F2203/45681 , H03F2203/45726
摘要： Provided is a chopper amplifier circuit capable of eliminating an influence of a slew rate of an amplifier and suppressing spike generation to thereby obtain an output signal having little harmonic distortion. The chopper amplifier circuit according to the present invention includes: a first chopper circuit for chopping an input signal by a first pulse and a second pulse shifted from each other in phase by a half cycle, switching a relation of connection between an input terminal pair and an output terminal pair at a timing of the chopping, and outputting the input signal as a modulated signal; an amplifier for amplifying the modulated signal and outputting the modulated signal thus amplified as an amplified signal; a first sample hold circuit for holding the amplified signal at the first pulse and outputting the amplified signal at the second pulse; and a second sample hold circuit for holding the amplified signal at the second pulse and outputting the amplified signal at the first pulse.
摘要翻译：提供了能够消除放大器的转换速率的影响并抑制尖峰发生从而获得具有很小的谐波失真的输出信号的斩波放大器电路。根据本发明的斩波放大器电路包括：第一斩波电路，用于通过第一脉冲斩波输入信号和相位偏移半个周期的第二脉冲，切换输入端子对和在斩波的定时输出端子对，并输出该输入信号作为调制信号; 放大器，用于放大经调制的信号并输出被放大的被调制信号作为放大信号; 第一采样保持电路，用于保持放大的信号处于第一脉冲，并以第二脉冲输出放大的信号; 以及第二采样保持电路，用于将放大的信号保持在第二脉冲，并以第一脉冲输出放大的信号。

4. 发明申请

US20070146065A1 Chopper amplifier circuit and semiconductor device 有权
标题翻译：斩波放大器电路和半导体器件
公开(公告)号：US20070146065A1
公开(公告)日：2007-06-28
申请号：US11499357
申请日：2006-08-04
申请人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Minoru Ariyama , Atsushi Igarashi , Akira Takeda
发明人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Minoru Ariyama , Atsushi Igarashi , Akira Takeda
IPC分类号： H03F1/02
CPC分类号： H03F3/45775
摘要： Provided is a chopper amplifier circuit capable of reducing an offset voltage of a sensor bridge and temperature characteristics of the offset voltage. An offset adjusting voltage generation circuit for generating a voltage equal to an offset voltage of a sensor bridge and an offset temperature characteristics adjusting voltage generation circuit for generating a voltage having temperature characteristics equal to those of the offset voltage are provided. These output voltages are chopper-modulated and subtracted from a chopper-modulated output signal of the sensor bridge.
摘要翻译：提供了能够减小传感器桥的偏移电压和偏移电压的温度特性的斩波放大器电路。提供了用于产生等于传感器桥的偏移电压的电压的偏移调整电压产生电路和用于产生具有等于偏移电压的温度特性的电压的偏移温度特性调整电压产生电路。这些输出电压被斩波调制并从传感器桥的斩波调制输出信号中减去。

5. 发明授权

US08895140B2 Vinylidene fluoride resin film 有权
标题翻译：偏二氟乙烯树脂膜
公开(公告)号：US08895140B2
公开(公告)日：2014-11-25
申请号：US13201246
申请日：2010-02-09
申请人： Hidetoshi Yoshimura , Fukumu Komoda , Atsushi Igarashi , Susumu Ooka , Koji Nakajima
发明人： Hidetoshi Yoshimura , Fukumu Komoda , Atsushi Igarashi , Susumu Ooka , Koji Nakajima
IPC分类号： B32B27/20 , C08K3/22 , C08K5/053 , C08L27/16 , C08L33/10 , C08L71/02 , C08G65/332 , C09J171/02 , C08L33/12
CPC分类号： C08L71/02 , B32B7/12 , B32B27/08 , B32B27/20 , B32B27/30 , B32B27/302 , B32B27/304 , B32B27/308 , B32B2250/24 , B32B2264/102 , B32B2307/306 , B32B2307/308 , B32B2307/40 , B32B2307/71 , B32B2307/712 , B32B2307/732 , B32B2410/00 , B32B2419/00 , B32B2419/06 , B32B2451/00 , B32B2457/12 , B32B2457/20 , B32B2479/00 , B32B2519/00 , B32B2605/08 , B32B2607/02 , C08G65/3322 , C08J5/18 , C08J2327/16 , C08J2433/10 , C08K3/22 , C08K5/053 , C08K9/02 , C08K2003/2241 , C08L27/16 , C08L33/10 , C08L33/12 , C08L2666/04 , C09J171/02 , Y10T428/256 , Y10T428/3154 , Y10T428/31935
摘要： Provided is a vinylidene fluoride resin film that has good adhesiveness to a base material, achieves good dispersivity even when a pigment is contained in large amounts, and has excellent thermal stability during a forming process. To a resin component composed of a vinylidene fluoride resin and a methacrylic acid ester resin, a predetermined amount of a titanium oxide surface treated with alumina and silica and a predetermined amount of a fatty acid ester of polyethylene glycol and/or its derivative are added to prepare a vinylidene fluoride resin film. Alternatively, at least a front side layer and a back side layer have such a composition, the front side layer has a combination amount of the vinylidene fluoride resin and the methacrylic acid ester resin of 70:30 to 95:5 in terms of mass ratio, and the back side layer has a combination amount of the vinylidene fluoride resin and the methacrylic acid ester resin of 5:95 to 45:55 in terms of mass ratio. In each case, the total adhesion amount of alumina and silica is 5 to 11% by mass in the titanium oxide relative to the total mass of the titanium oxide.
摘要翻译：提供一种对基材具有良好的粘合性的偏二氟乙烯树脂膜，即使在大量含有颜料的情况下也能获得良好的分散性，并且在成型过程中具有优异的热稳定性。对于由偏二氟乙烯树脂和甲基丙烯酸酯树脂构成的树脂组分，将预定量的用氧化铝和二氧化硅处理的氧化钛表面和预定量的聚乙二醇和/或其衍生物的脂肪酸酯加入到制备偏氟乙烯树脂膜。或者，至少前侧层和背面层具有这样的组成，前侧层的质量比为70:30〜95:5的偏氟乙烯树脂和甲基丙烯酸酯树脂的组合量背面层的质量比为5:95〜45:55的偏氟乙烯树脂和甲基丙烯酸酯树脂的组合量。在每种情况下，相对于氧化钛的总质量，氧化钛和二氧化硅的总附着量在氧化钛中为5〜11质量％。

6. 发明授权

US08063675B2 Delay circuit including first and second internal delay circuits and a selection switch 有权
标题翻译：延迟电路包括第一和第二内部延迟电路和选择开关
公开(公告)号：US08063675B2
公开(公告)日：2011-11-22
申请号：US12686703
申请日：2010-01-13
申请人： Atsushi Igarashi , Masakazu Sugiura
发明人： Atsushi Igarashi , Masakazu Sugiura
IPC分类号： H03L7/00
CPC分类号： H03K5/06 , H03K5/133 , H03K2005/0013 , H03K2005/00136
摘要： Provided is a delay circuit that has a delay time period independent of a power supply voltage and has the equal delay time period between a case of a change in input signal from Low to High and a case of a change in input signal from High to Low. The delay time period is determined as a time period necessary for a voltage of a capacitor (17) (internal voltage (Va)) to increase from a ground voltage (VSS) to a voltage equal to or higher than an inverting threshold voltage of a constant current inverter (19) (threshold voltage (Vtn) of an NMOS transistor (16)). Therefore, the delay time period is determined with reference to the ground voltage (VSS). Note that the same holds true for an internal delay circuit (20). If the input signal (Vin) becomes High, the delay circuit utilizes the delay time period caused by an internal delay circuit (10). On the other hand, if the input signal (Vin) becomes Low, the delay circuit utilizes the delay time period caused by the internal delay circuit (20). Those internal delay circuit (10) and internal delay circuit (20) are identical with each other.
摘要翻译：提供了延迟电路，其具有与电源电压无关的延迟时间，并且在从低电平变为高电平的输入信号变化的情况和输入信号从高变化到低的情况之间具有相等的延迟时间段。延迟时间被确定为电容器（17）的电压（内部电压（Va））从接地电压（VSS）增加到等于或高于其的反相阈值电压的电压所需的时间段恒流逆变器（19）（NMOS晶体管（16）的阈值电压（Vtn））。因此，参考接地电压（VSS）确定延迟时间。注意，对于内部延迟电路（20）也是如此。如果输入信号（Vin）变为高电平，则延迟电路利用由内部延迟电路（10）引起的延迟时间。另一方面，如果输入信号（Vin）为低电平，则延迟电路利用由内部延迟电路（20）引起的延迟时间。那些内部延迟电路（10）和内部延迟电路（20）彼此相同。

7. 发明授权

US07977999B2 Temperature detection circuit 有权
标题翻译：温度检测电路
公开(公告)号：US07977999B2
公开(公告)日：2011-07-12
申请号：US12653536
申请日：2009-12-15
申请人： Atsushi Igarashi , Masakazu Sugiura
发明人： Atsushi Igarashi , Masakazu Sugiura
IPC分类号： H01L35/00
CPC分类号： G01K7/01 , G01K3/005
摘要： Provided is a temperature detection circuit capable of preventing malfunction, which may occur when power is turned on. A switch circuit for giving such a potential that a comparator detects a low temperature is provided at an output terminal of a temperature sensor circuit. A switch circuit for giving such a potential that the comparator detects a low temperature is provided at an output terminal of a reference voltage circuit. When the power is turned on, each of the switch circuits is set by a switch control circuit such that the comparator detects a low temperature.
摘要翻译：提供了能够防止在接通电源时可能发生的故障的温度检测电路。在温度传感器电路的输出端设置有用于给出比较器检测到低温的电位的开关电路。在基准电压电路的输出端提供用于给出比较器检测到低温的电位的开关电路。当电源接通时，每个开关电路由开关控制电路设置，使得比较器检测到低温。

8. 发明授权

US08449179B2 Temperature detection system 有权
标题翻译：温度检测系统
公开(公告)号：US08449179B2
公开(公告)日：2013-05-28
申请号：US12974956
申请日：2010-12-21
申请人： Atsushi Igarashi
发明人： Atsushi Igarashi
IPC分类号： G01K7/01
CPC分类号： G01K3/005 , G01K1/026
摘要： Provided is a temperature detection system which is low in cost. The temperature detection system includes a plurality of temperature detection ICs (10) for detecting an abnormal temperature and a resistor (20). Each of the plurality of temperature detection ICs (10) includes a reference voltage terminal connected to an output terminal of one of the plurality of temperature detection ICs (10) located at a preceding stage. The resistor (20) is provided between an output terminal of one of the plurality of temperature detection ICs (10) located at the final stage and a ground terminal.
摘要翻译：提供了一种成本低的温度检测系统。温度检测系统包括用于检测异常温度的多个温度检测IC（10）和电阻器（20）。多个温度检测IC（10）中的每一个包括连接到位于前一级的多个温度检测IC（10）之一的输出端的参考电压端子。电阻器（20）设置在位于最后级的多个温度检测IC（10）之一的输出端子与接地端子之间。

9. 发明申请

US20100321845A1 OVERHEAT PROTECTION CIRCUIT AND POWER SUPPLY INTEGRATED CIRCUIT 有权
标题翻译：超声波保护电路和电源集成电路
公开(公告)号：US20100321845A1
公开(公告)日：2010-12-23
申请号：US12790070
申请日：2010-05-28
申请人： Takashi Imura , Takao Nakashimo , Masakazu Sugiura , Atsushi Igarashi , Masahiro Mitani
发明人： Takashi Imura , Takao Nakashimo , Masakazu Sugiura , Atsushi Igarashi , Masahiro Mitani
IPC分类号： H02H5/04
CPC分类号： G05F1/569
摘要： Provided is a power supply integrated circuit including an overheat protection circuit with high detection accuracy. The overheat protection circuit includes: a current generation circuit including: a first metal oxide semiconductor (MOS) transistor including a gate terminal and a drain terminal that are connected to each other, the first MOS transistor operating in a weak inversion region; a second MOS transistor including a gate terminal connected to the gate terminal of the first MOS transistor, the second MOS transistor having the same conductivity type as the first MOS transistor and operating in a weak inversion region; and a first resistive element connected to a source terminal of the second MOS transistor; and a comparator for comparing a reference voltage having positive temperature characteristics and a temperature voltage having negative temperature characteristics, which are obtained based on a current generated by the current generation circuit.
摘要翻译：提供了一种具有高检测精度的过热保护电路的电源集成电路。过热保护电路包括：电流产生电路，包括：第一金属氧化物半导体（MOS）晶体管，其包括彼此连接的栅极端子和漏极端子，所述第一MOS晶体管在弱反转区域中工作; 第二MOS晶体管，包括连接到第一MOS晶体管的栅极端子的栅极端子，第二MOS晶体管具有与第一MOS晶体管相同的导电类型并且在弱反转区域中操作; 以及连接到所述第二MOS晶体管的源极端子的第一电阻元件; 以及比较器，用于比较具有正温度特性的参考电压和具有负温度特性的温度电压，其基于由电流产生电路产生的电流获得。

10. 发明申请

US20100180059A1 DETECTION CIRCUIT AND SENSOR DEVICE 有权
标题翻译：检测电路和传感器装置
公开(公告)号：US20100180059A1
公开(公告)日：2010-07-15
申请号：US12686674
申请日：2010-01-13
申请人： Masakazu Sugiura , Atsushi Igarashi
发明人： Masakazu Sugiura , Atsushi Igarashi
IPC分类号： G06F13/24
CPC分类号： G06F13/24 , G06F1/24 , Y02D10/14
摘要： Provided is a detection circuit for monitoring a power supply voltage with a circuit configuration in which power consumption is reduced, and a sensor device including the detection circuit. A detection circuit (100) detects an input signal input thereto to output an output signal. An interrupt condition generating circuit (10a) directly detects a power supply voltage (VDD) supplied thereto from a power supply, and outputs an interrupt signal until the power supply voltage makes a transition to a predetermined voltage range. An interrupt condition reception circuit outputs, as an output signal, a given voltage without allowing an input signal (Vtemp) to be output until an interrupt caused by the interrupt signal is released, and outputs, as an output signal, the input signal by allowing the input signal to be output when the interrupt caused by the interrupt signal is released.
摘要翻译：提供了一种用于通过降低功耗的电路配置来监测电源电压的检测电路，以及包括检测电路的传感器装置。检测电路（100）检测输入的输入信号，输出输出信号。中断条件生成电路（10a）直接检测从电源供给的电源电压（VDD），并输出中断信号，直到电源电压转换到规定的电压范围为止。中断条件接收电路作为输出信号输出给定电压，而不允许输出信号（Vtemp）被输出，直到由中断信号引起的中断被解除为止，并通过允许输入信号作为输出信号输出当中断信号中断引起的输出信号被释放。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式