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1. 发明授权

US07508258B2 Amplifier circuit 有权
标题翻译：放大器电路
公开(公告)号：US07508258B2
公开(公告)日：2009-03-24
申请号：US11703026
申请日：2007-02-06
申请人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Akira Takeda , Minoru Ariyama , Atsushi Igarashi
发明人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Akira Takeda , Minoru Ariyama , Atsushi Igarashi
IPC分类号： H03F1/02
CPC分类号： H03F1/3211 , H03F3/387 , H03F3/45475 , H03F3/45986 , H03F3/45995 , H03F2203/45138 , H03F2203/45212 , H03F2203/45614 , H03F2203/45616 , H03F2203/45681 , H03F2203/45726
摘要： Provided is a chopper amplifier circuit capable of eliminating an influence of a slew rate of an amplifier and suppressing spike generation to thereby obtain an output signal having little harmonic distortion. The chopper amplifier circuit according to the present invention includes: a first chopper circuit for chopping an input signal by a first pulse and a second pulse shifted from each other in phase by a half cycle, switching a relation of connection between an input terminal pair and an output terminal pair at a timing of the chopping, and outputting the input signal as a modulated signal; an amplifier for amplifying the modulated signal and outputting the modulated signal thus amplified as an amplified signal; a first sample hold circuit for holding the amplified signal at the first pulse and outputting the amplified signal at the second pulse; and a second sample hold circuit for holding the amplified signal at the second pulse and outputting the amplified signal at the first pulse.
摘要翻译：提供了能够消除放大器的转换速率的影响并抑制尖峰发生从而获得具有很小的谐波失真的输出信号的斩波放大器电路。根据本发明的斩波放大器电路包括：第一斩波电路，用于通过第一脉冲斩波输入信号和相位偏移半个周期的第二脉冲，切换输入端子对和在斩波的定时输出端子对，并输出该输入信号作为调制信号; 放大器，用于放大经调制的信号并输出被放大的被调制信号作为放大信号; 第一采样保持电路，用于保持放大的信号处于第一脉冲，并以第二脉冲输出放大的信号; 以及第二采样保持电路，用于将放大的信号保持在第二脉冲，并以第一脉冲输出放大的信号。

2. 发明授权

US07479826B2 Chopper amplifier circuit and semiconductor device 有权
标题翻译：斩波放大器电路和半导体器件
公开(公告)号：US07479826B2
公开(公告)日：2009-01-20
申请号：US11499357
申请日：2006-08-04
申请人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Minoru Ariyama , Atsushi Igarashi , Akira Takeda
发明人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Minoru Ariyama , Atsushi Igarashi , Akira Takeda
IPC分类号： H03F1/02
CPC分类号： H03F3/45775
摘要： Provided is a chopper amplifier circuit capable of reducing an offset voltage of a sensor bridge and temperature characteristics of the offset voltage. An offset adjusting voltage generation circuit for generating a voltage equal to an offset voltage of a sensor bridge and an offset temperature characteristics adjusting voltage generation circuit for generating a voltage having temperature characteristics equal to those of the offset voltage are provided. These output voltages are chopper-modulated and subtracted from a chopper-modulated output signal of the sensor bridge.
摘要翻译：提供了能够减小传感器桥的偏移电压和偏移电压的温度特性的斩波放大器电路。提供了用于产生等于传感器桥的偏移电压的电压的偏移调整电压产生电路和用于产生具有等于偏移电压的温度特性的电压的偏移温度特性调整电压产生电路。这些输出电压被斩波调制并从传感器桥的斩波调制输出信号中减去。

3. 发明申请

US20070222509A1 Amplifier circuit 有权
标题翻译：放大器电路
公开(公告)号：US20070222509A1
公开(公告)日：2007-09-27
申请号：US11703026
申请日：2007-02-06
申请人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Akira Takeda , Minoru Ariyama , Atsushi Igarashi
发明人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Akira Takeda , Minoru Ariyama , Atsushi Igarashi
IPC分类号： H03F1/14
CPC分类号： H03F1/3211 , H03F3/387 , H03F3/45475 , H03F3/45986 , H03F3/45995 , H03F2203/45138 , H03F2203/45212 , H03F2203/45614 , H03F2203/45616 , H03F2203/45681 , H03F2203/45726
摘要： Provided is a chopper amplifier circuit capable of eliminating an influence of a slew rate of an amplifier and suppressing spike generation to thereby obtain an output signal having little harmonic distortion. The chopper amplifier circuit according to the present invention includes: a first chopper circuit for chopping an input signal by a first pulse and a second pulse shifted from each other in phase by a half cycle, switching a relation of connection between an input terminal pair and an output terminal pair at a timing of the chopping, and outputting the input signal as a modulated signal; an amplifier for amplifying the modulated signal and outputting the modulated signal thus amplified as an amplified signal; a first sample hold circuit for holding the amplified signal at the first pulse and outputting the amplified signal at the second pulse; and a second sample hold circuit for holding the amplified signal at the second pulse and outputting the amplified signal at the first pulse.
摘要翻译：提供了能够消除放大器的转换速率的影响并抑制尖峰发生从而获得具有很小的谐波失真的输出信号的斩波放大器电路。根据本发明的斩波放大器电路包括：第一斩波电路，用于通过第一脉冲斩波输入信号和相位偏移半个周期的第二脉冲，切换输入端子对和在斩波的定时输出端子对，并输出该输入信号作为调制信号; 放大器，用于放大经调制的信号并输出被放大的被调制信号作为放大信号; 第一采样保持电路，用于保持放大的信号处于第一脉冲，并以第二脉冲输出放大的信号; 以及第二采样保持电路，用于将放大的信号保持在第二脉冲，并以第一脉冲输出放大的信号。

4. 发明申请

US20070146065A1 Chopper amplifier circuit and semiconductor device 有权
标题翻译：斩波放大器电路和半导体器件
公开(公告)号：US20070146065A1
公开(公告)日：2007-06-28
申请号：US11499357
申请日：2006-08-04
申请人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Minoru Ariyama , Atsushi Igarashi , Akira Takeda
发明人： Hirokazu Yoshizawa , Ryoichi Anzai , Toshiyuki Uchida , Minoru Ariyama , Atsushi Igarashi , Akira Takeda
IPC分类号： H03F1/02
CPC分类号： H03F3/45775
摘要： Provided is a chopper amplifier circuit capable of reducing an offset voltage of a sensor bridge and temperature characteristics of the offset voltage. An offset adjusting voltage generation circuit for generating a voltage equal to an offset voltage of a sensor bridge and an offset temperature characteristics adjusting voltage generation circuit for generating a voltage having temperature characteristics equal to those of the offset voltage are provided. These output voltages are chopper-modulated and subtracted from a chopper-modulated output signal of the sensor bridge.
摘要翻译：提供了能够减小传感器桥的偏移电压和偏移电压的温度特性的斩波放大器电路。提供了用于产生等于传感器桥的偏移电压的电压的偏移调整电压产生电路和用于产生具有等于偏移电压的温度特性的电压的偏移温度特性调整电压产生电路。这些输出电压被斩波调制并从传感器桥的斩波调制输出信号中减去。

5. 发明授权

US06713815B2 Semiconductor device with transistors that convert a voltage difference into a drain current difference 有权
标题翻译：具有将电压差转换为漏极电流差的晶体管的半导体器件
公开(公告)号：US06713815B2
公开(公告)日：2004-03-30
申请号：US10147415
申请日：2002-05-16
申请人： Fumiyasu Utsunomiya , Hirokazu Yoshizawa
发明人： Fumiyasu Utsunomiya , Hirokazu Yoshizawa
IPC分类号： H01L2362
CPC分类号： H01L27/1203 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device is provided, which includes a pair of differential transistors that convert a voltage difference between a first input terminal and a second input terminal into a drain current difference between a first transistor and a second transistor and in which a voltage range of the first input terminal or the second input terminal is wide. A SOI structure MOSFET is used as each of the pair of differential transistors. The MOSFET includes a general MOSFET structure including a source region, a drain region, a well region between both the regions, a gate oxide film on an upper surface of the well region, and a gate electrode on the gate oxide film, and further includes a first conductivity type substrate region under the source region, the drain region and the well region through a buried oxide film. In the MOSFET, the first conductivity type substrate region of the first transistor is the first input terminal, and the first conductivity type substrate region of the second transistor is the first input terminal.
摘要翻译：提供了一种半导体器件，其包括将第一输入端和第二输入端之间的电压差转换为第一晶体管和第二晶体管之间的漏极电流差的一对差分晶体管，其中第一输入端或第二输入端宽。 SOI结构MOSFET用作这对差分晶体管中的每一个。 MOSFET包括通常的MOSFET结构，其包括源极区域，漏极区域，两个区域之间的阱区域，阱区域的上表面上的栅极氧化膜以及栅极氧化物膜上的栅电极，并且还包括在源极区域之下的第一导电类型的衬底区域，通过掩埋氧化物膜的漏极区域和阱区域。在MOSFET中，第一晶体管的第一导电型衬底区域是第一输入端子，第二晶体管的第一导电类型衬底区域是第一输入端子。

6. 发明授权

US06542007B2 Inverter circuit 有权
公开(公告)号：US06542007B2
公开(公告)日：2003-04-01
申请号：US09990573
申请日：2001-11-21
申请人： Hirokazu Yoshizawa
发明人： Hirokazu Yoshizawa
IPC分类号： H03K1920
CPC分类号： H03F3/345 , H03K19/00315
摘要： An inverter circuit is disclosed that prevents flow of a large feedthrough current. The inverter circuit includes depletion type MOS transistor combined with a resistor to impose a current limitation when a feedthrough current flows.

7. 发明授权

US5982247A CR oscillating circuit 有权
标题翻译： CR振荡电路
公开(公告)号：US5982247A
公开(公告)日：1999-11-09
申请号：US177813
申请日：1998-10-23
申请人： Hirokazu Yoshizawa , Kenichi Kobayashi
发明人： Hirokazu Yoshizawa , Kenichi Kobayashi
IPC分类号： H03K3/354 , H03K3/011 , H03K3/03 , H03K3/02 , H03K3/26
CPC分类号： H03K3/011 , H03K3/03
摘要： There is provided a CR oscillating circuit from which oscillation frequency is obtained as targeted, when MOS capacitors having large voltage dependency are used therein. The circuit is constructed such that bias voltage is applied always to the two MOS capacitors by connecting the two MOS, capacitors in series in the opposite direction from each other and by connecting further a MOSFET.
摘要翻译：提供了一种CR振荡电路，当其中使用具有较大电压依赖性的MOS电容器时，可以从其获得目标振荡频率。该电路被构造成使得通过将两个MOS电容器彼此相反的方向串联连接并且进一步连接MOSFET来将偏置电压总是施加到两个MOS电容器。

8. 发明授权

US6037836A Switched-capacitor amplifier circuit 有权
标题翻译：开关电容放大器电路
公开(公告)号：US6037836A
公开(公告)日：2000-03-14
申请号：US177812
申请日：1998-10-23
申请人： Hirokazu Yoshizawa
发明人： Hirokazu Yoshizawa
IPC分类号： H03H19/00 , H03F3/00 , H03F3/70 , H03F1/02
CPC分类号： H03F3/005
摘要： A switched-capacitor amplifier circuit produces accurate output signal even if the input signal varies rapidly at every sampling phase. Two capacitors having the same capacitance are connected, in series with the input of an operational amplifier circuit. A switching circuit is connected between a first terminal and ground terminal. The two capacitors are connected with the first terminal.
摘要翻译：即使在每个采样阶段输入信号迅速变化，开关电容放大器电路产生精确的输出信号。具有相同电容的两个电容器与运算放大器电路的输入串联。开关电路连接在第一端子和接地端子之间。两个电容器与第一个端子连接。

9. 发明授权

US06437722B1 AD converter circuit 有权
标题翻译： AD转换电路
公开(公告)号：US06437722B1
公开(公告)日：2002-08-20
申请号：US09698686
申请日：2000-10-27
申请人： Hirokazu Yoshizawa
发明人： Hirokazu Yoshizawa
IPC分类号： H03M136
CPC分类号： H03M1/0612 , H03M1/168
摘要： In a pipeline A/D converter circuit, the time at which outputs of MDACs of the A/D converter circuit change is shifted at respective stages, so that a cumulative error is avoided. In a resistance ladder circuit for supplying reference voltages to sub-A/D converter circuits of the pipeline A/D converter circuit, main resistors and auxiliary resistors are alternately connected in series to prepare the reference voltages, and the reference voltage supplied to the first stage MDAC is made different from the reference voltage supplied to the second and subsequent stage MDACs. In an embodiment, the auxiliary resistors have a resistance value of no more than one-half that of the main resistors to provide the offset.
摘要翻译：在流水线A / D转换器电路中，A / D转换器电路的MDAC的输出变化的时间在各个阶段变化，从而避免了累积误差。在用于向管线A / D转换电路的A / D转换电路供给基准电压的电阻梯形电路中，主电阻和辅助电阻交替地串联连接以准备参考电压，并且提供给第一使得MDAC与提供给第二级和后一级MDAC的参考电压不同。在一个实施例中，辅助电阻的电阻值不超过主电阻的一半，以提供偏移。

10. 发明授权

US06288662B1 A/D converter circuit having ladder resistor network with alternating first and second resistors of different resistance values 有权
标题翻译：具有梯形电阻网络的A / D转换器电路具有不同电阻值的交替的第一和第二电阻器
公开(公告)号：US06288662B1
公开(公告)日：2001-09-11
申请号：US09342425
申请日：1999-06-29
申请人： Hirokazu Yoshizawa
发明人： Hirokazu Yoshizawa
IPC分类号： H03M112
CPC分类号： H03M1/0675 , H03M1/168 , H03M1/365 , H03M1/765
摘要： In a resistor ladder circuit for supplying reference voltages to sub-A/D converter circuits constituting a pipeline type A/D converter, the circuit is configured in such a way that main resistors are connected in series with auxiliary resistors in order to produce a plurality of reference voltages so that the reference voltages which are supplied to an MDAC in the first stage differ from those which are supplied to the MDACs in and after the second stage.
摘要翻译：在用于向构成流水线型A / D转换器的子A / D转换器电路提供参考电压的电阻梯形电路中，电路被配置为使得主电阻器与辅助电阻器串联连接以产生多个的参考电压，使得提供给第一级中的MDAC的参考电压与在第二级中和之后提供给MDAC的参考电压不同。

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