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1. 发明申请

US20100266080A1 TRANSMISSION DEVICE, RECEIVING DEVICE AND COMMUNICATION SYSTEM 有权
标题翻译：传输设备，接收设备和通信系统
公开(公告)号：US20100266080A1
公开(公告)日：2010-10-21
申请号：US12808598
申请日：2009-10-27
申请人： Hironobu Akita , Seiichi Ozawa , Yohei Ishizone , Satoshi Miura
发明人： Hironobu Akita , Seiichi Ozawa , Yohei Ishizone , Satoshi Miura
IPC分类号： H04L7/04
CPC分类号： H04L7/10 , G09G5/008 , H03L7/095 , H04L7/033 , H04L7/046
摘要： Provided are a transmission device, a receiving device, and a communication system having a simple configuration and capable of reliably executing the confirmation of a changed bit rate. The communication system 1 sends, to the receiving device 3, a serial data signal Sdata that is set as a constant value across a period of a constant multiple of a cycle of the clock when a bit rate of a serial data signal Sdata in the transmission device 2 is changed. The receiving device 3 that received the serial data signal Sdata receives training data Tdata from the transmission device 2 when it is determined that the serial data signal Sdata is a constant value across a period of a constant multiple of a cycle of the clock, and proceeds to the processing of confirming the changed bit rate.
摘要翻译：提供具有简单配置并能够可靠地执行改变的比特率的确认的传输设备，接收设备和通信系统。通信系统1向发送装置3发送串行数据信号Sdata，该串行数据信号Sdata在传输中的串行数据信号Sdata的比特率时，在时钟的周期的恒定倍数的周期内被设定为恒定值设备2更改。接收到串行数据信号Sdata的接收装置3当确定串行数据信号Sdata在时钟的周期的恒定倍数的周期内是恒定值时，从发送装置2接收训练数据Tdata，并且进行以确认改变的比特率的处理。

2. 发明授权

US08363771B2 Transmission device, receiving device and communication system 有权
标题翻译：传输设备，接收设备和通信系统
公开(公告)号：US08363771B2
公开(公告)日：2013-01-29
申请号：US12808598
申请日：2009-10-27
申请人： Hironobu Akita , Seiichi Ozawa , Yohei Ishizone , Satoshi Miura
发明人： Hironobu Akita , Seiichi Ozawa , Yohei Ishizone , Satoshi Miura
IPC分类号： H04L7/04
CPC分类号： H04L7/10 , G09G5/008 , H03L7/095 , H04L7/033 , H04L7/046
摘要： Provided are a transmission device, a receiving device, and a communication system having a simple configuration and capable of reliably executing the confirmation of a changed bit rate. The communication system 1 sends, to the receiving device 3, a serial data signal Sdata that is set as a constant value across a period of a constant multiple of a cycle of the clock when a bit rate of a serial data signal Sdata in the transmission device 2 is changed. The receiving device 3 that received the serial data signal Sdata receives training data Tdata from the transmission device 2 when it is determined that the serial data signal Sdata is a constant value across a period of a constant multiple of a cycle of the clock, and proceeds to the processing of confirming the changed bit rate.
摘要翻译：提供具有简单配置并能够可靠地执行改变的比特率的确认的传输设备，接收设备和通信系统。通信系统1向发送装置3发送串行数据信号Sdata，该串行数据信号Sdata在传输中的串行数据信号Sdata的比特率时，在时钟周期的恒定倍数的周期内被设置为恒定值设备2更改。接收到串行数据信号Sdata的接收装置3当确定串行数据信号Sdata在时钟的周期的恒定倍数的周期内是恒定值时，从发送装置2接收训练数据Tdata，并且进行以确认改变的比特率的处理。

3. 发明授权

US07535957B2 Transmitter circuit, receiver circuit, clock data recovery phase locked loop circuit, data transfer method and data transfer system 有权
标题翻译：发射机电路，接收机电路，时钟数据恢复锁相环电路，数据传输方式和数据传输系统
公开(公告)号：US07535957B2
公开(公告)日：2009-05-19
申请号：US11104586
申请日：2005-04-13
申请人： Seiichi Ozawa , Jun-ichi Okamura , Yohei Ishizone , Satoshi Miura
发明人： Seiichi Ozawa , Jun-ichi Okamura , Yohei Ishizone , Satoshi Miura
IPC分类号： H03K7/08
CPC分类号： H04L7/033 , H03K7/10 , H03L7/087 , H03L7/091 , H03L7/113 , H04L25/45 , H04L25/4902
摘要： [Problems] To realize a reliable and stable transfer of digital data that does not require a reference clock and a handshake operation.[Means for Solving the Problem] The present invention provides a digital data transfer method for alternately and periodically transferring first information and second information respectively in a first period and in a second period, wherein: an amount of information of the first information per unit time in the first period is greater than an amount of information of the second information per unit time in the second period; and the second information in the first period is transferred as pulse-width-modulated serial data.
摘要翻译： [问题]实现不需要参考时钟和握手操作的数字数据的可靠而稳定的传输。解决问题的手段本发明提供一种用于在第一周期和第二周期中分别交替地和周期性地传送第一信息和第二信息的数字数据传送方法，其中：每单位时间的第一信息的信息量在第一期间中，比第二期间的每单位时间的第二信息的信息量大; 并且第一周期中的第二信息作为脉冲宽度调制的串行数据传送。

4. 发明申请

US20050286643A1 Transmitter circuit, receiver circuit, clock data recovery phase locked loop circuit, data transfer method and data transfer system 有权
标题翻译：发射机电路，接收机电路，时钟数据恢复锁相环电路，数据传输方式和数据传输系统
公开(公告)号：US20050286643A1
公开(公告)日：2005-12-29
申请号：US11104586
申请日：2005-04-13
申请人： Seiichi Ozawa , Jun-ichi Okamura , Yohei Ishizone , Satoshi Miura
发明人： Seiichi Ozawa , Jun-ichi Okamura , Yohei Ishizone , Satoshi Miura
IPC分类号： H03D3/18 , H03K9/08 , H03L7/087 , H03L7/091 , H03L7/113 , H03M9/00 , H04B14/04 , H04L7/033 , H04L25/45 , H04L25/49 , H04N11/04
CPC分类号： H04L7/033 , H03K7/10 , H03L7/087 , H03L7/091 , H03L7/113 , H04L25/45 , H04L25/4902
摘要： [Problems] To realize a reliable and stable transfer of digital data that does not require a reference clock and a handshake operation. [Means for Solving the Problem] The present invention provides a digital data transfer method for alternately and periodically transferring first information and second information respectively in a first period and in a second period, wherein: an amount of information of the first information per unit time in the first period is greater than an amount of information of the second information per unit time in the second period; and the second information in the first period is transferred as pulse-width-modulated serial data.
摘要翻译： [问题]实现不需要参考时钟和握手操作的数字数据的可靠而稳定的传输。解决问题的手段本发明提供一种用于在第一周期和第二周期中分别交替地和周期性地传送第一信息和第二信息的数字数据传送方法，其中：每单位时间的第一信息的信息量在第一期间中，比第二期间的每单位时间的第二信息的信息量大; 并且第一周期中的第二信息作为脉冲宽度调制的串行数据传送。

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