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1. 发明授权

US08441845B2 Semiconductor memory device and control method thereof 有权
标题翻译：半导体存储器件及其控制方法
公开(公告)号：US08441845B2
公开(公告)日：2013-05-14
申请号：US12827901
申请日：2010-06-30
申请人： Ho Seok Em , Dong Keun Kim
发明人： Ho Seok Em , Dong Keun Kim
IPC分类号： G11C11/00
CPC分类号： G11C13/004 , G11C7/1048 , G11C7/12 , G11C8/14 , G11C13/0004 , G11C13/0026 , G11C13/02
摘要： A semiconductor memory device substantially prevents a faulty operation from being generated in a read operation, and increases the operation reliability. The semiconductor memory device includes a cell array configured to include a memory element having a different resistance value in response to data, a sense-amp configured to sense and amplify the data, a global bit line configured to couple the sense-amp to a cell array, and a discharge unit configured to discharge the global bit line prior to execution of a read operation.
摘要翻译：半导体存储器件基本上防止在读取操作中产生故障操作，并且增加了操作可靠性。该半导体存储器件包括一个单元阵列，其被配置为包括响应于数据具有不同电阻值的存储元件，被配置为感测和放大数据的感测放大器，被配置为将感测放大器耦合到单元的全局位线阵列和放电单元，其被配置为在执行读取操作之前对全局位线进行放电。

2. 发明申请

US20110182114A1 SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD THEREOF 有权
标题翻译：半导体存储器件及其控制方法
公开(公告)号：US20110182114A1
公开(公告)日：2011-07-28
申请号：US12827901
申请日：2010-06-30
申请人： Ho Seok Em , Dong Keun Kim
发明人： Ho Seok Em , Dong Keun Kim
IPC分类号： G11C11/00 , G11C7/00
CPC分类号： G11C13/004 , G11C7/1048 , G11C7/12 , G11C8/14 , G11C13/0004 , G11C13/0026 , G11C13/02
摘要： A semiconductor memory device substantially prevents a faulty operation from being generated in a read operation, and increases the operation reliability. The semiconductor memory device includes a cell array configured to include a memory element having a different resistance value in response to data, a sense-amp configured to sense and amplify the data, a global bit line configured to couple the sense-amp to a cell array, and a discharge unit configured to discharge the global bit line prior to execution of a read operation.
摘要翻译：半导体存储器件基本上防止在读取操作中产生故障操作，并且增加了操作可靠性。该半导体存储器件包括一个单元阵列，其被配置为包括响应于数据具有不同电阻值的存储元件，被配置为感测和放大数据的感测放大器，被配置为将感测放大器耦合到单元的全局位线阵列和放电单元，其被配置为在执行读取操作之前对全局位线进行放电。

3. 发明授权

US09054680B2 Methods of controlling clocks in system on chip including function blocks, systems on chips and semiconductor systems including the same 有权
公开(公告)号：US09054680B2
公开(公告)日：2015-06-09
申请号：US14559131
申请日：2014-12-03
申请人： Dong Keun Kim , Sun Cheol Kwon , Si Young Kim , Jae Gon Lee , Jung Hun Heo
发明人： Dong Keun Kim , Sun Cheol Kwon , Si Young Kim , Jae Gon Lee , Jung Hun Heo
IPC分类号： H03K3/00 , H03K5/04
CPC分类号： H03K5/04 , G06F1/08 , G06F1/324 , H03K19/0016 , H03K21/00 , H03K21/10 , Y02D10/126 , Y02D50/20
摘要： A system-on-chip includes a clock controller configured to decrease an operating frequency of at least one function block based on a change in an operating state of the at least one function block from an active state to an idle state. In a method of operating a system-on-chip including at least one function block, an operating frequency of the at least one function block is decreased based on a change in an operating state of the at least one function block from an active state to an idle state. The decreased operating frequency is greater than zero.

4. 发明申请

US20090251983A1 SEMICONDUCTOR MEMORY APPARATUS CAPABLE OF REDUCING GROUND NOISE 有权
标题翻译：可减少接地噪声的半导体存储器
公开(公告)号：US20090251983A1
公开(公告)日：2009-10-08
申请号：US12359606
申请日：2009-01-26
申请人： Dong Keun Kim , Chae Kyu Jang
发明人： Dong Keun Kim , Chae Kyu Jang
IPC分类号： G11C5/14 , G11C8/00 , G11C7/00
CPC分类号： G11C5/14 , G11C7/02
摘要： An apparatus includes a plurality of first driving signal driving units, and generates a first driving signal by driving an input signal, a plurality of second driving signal driving units, each of which drives an input signal and generates a second driving signal, a timing control unit that controls each of the first driving signal driving units such that a predetermined time difference is generated between an enable timing of the first driving signal and an enable timing of the second driving signal, a plurality of sense amplifier driving units, each of which generates a first driving level and a second driving level according to the first driving signal and the second driving signal, and a plurality of sense amplifiers that are provided for respective bit line pairs, and each include first type switching elements operating according to the first driving level and second type switching elements operating according to the second driving level.
摘要翻译：一种装置包括多个第一驱动信号驱动单元，并且通过驱动输入信号产生第一驱动信号;多个第二驱动信号驱动单元，其驱动输入信号并产生第二驱动信号;定时控制控制每个第一驱动信号驱动单元的单元，使得在第一驱动信号的使能定时和第二驱动信号的使能定时之间产生预定时间差;多个读出放大器驱动单元，其生成根据第一驱动信号和第二驱动信号的第一驱动电平和第二驱动电平以及针对各个位线对设置的多个读出放大器，并且各自包括根据第一驱动电平工作的第一类型的开关元件以及根据第二驱动电平工作的第二类型的开关元件。

5. 发明授权

US09336871B2 Resistance change memory 有权
公开(公告)号：US09336871B2
公开(公告)日：2016-05-10
申请号：US14811237
申请日：2015-07-28
申请人： Masahiro Takahashi , Dong Keun Kim , Hyuck Sang Yim
发明人： Masahiro Takahashi , Dong Keun Kim , Hyuck Sang Yim
IPC分类号： G11C7/00 , G11C13/00 , G11C11/16
CPC分类号： G11C13/003 , G11C11/1659 , G11C11/1673 , G11C13/0004 , G11C13/0007 , G11C13/004 , G11C2013/0054
摘要： According to one embodiment, a resistance change memory includes the following configuration. A first inverter includes first input and first output terminals and first and second voltage terminals. A second inverter includes second input and second output terminals and third and fourth voltage terminals. The second input terminal is connected to the first output terminal. The second output terminal is connected to the first input terminal. First and second transistors are connected to the first and second output terminals, respectively. Third and fourth transistors are connected to the first and third voltage terminals, respectively. A fifth transistor is connected between the first voltage terminal and the first memory cell. A sixth transistor is connected to the third voltage terminal. A controller turns on the first and second transistors, after turning off the fifth and sixth transistors.

6. 发明授权

US09177641B2 Memory device 有权
标题翻译：内存设备
公开(公告)号：US09177641B2
公开(公告)日：2015-11-03
申请号：US14018306
申请日：2013-09-04
申请人： Masahiro Takahashi , Tsuneo Inaba , Dong Keun Kim , Ji Wang Lee
发明人： Masahiro Takahashi , Tsuneo Inaba , Dong Keun Kim , Ji Wang Lee
IPC分类号： G11C13/00 , G11C11/16
CPC分类号： G11C13/004 , G11C11/1673 , G11C2013/0054 , G11C2213/79
摘要： According to one embodiment, a memory device includes a memory cell, a sense amplifier, and a resistor. The sense amplifier includes a first input and a second input, outputs a signal in accordance with a difference between the first and second inputs, and is selectively coupled at a second input to the memory cell. The resistor is in a first path between the first input of the sense amplifier and a ground node.
摘要翻译：根据一个实施例，存储器件包括存储单元，读出放大器和电阻器。读出放大器包括第一输入和第二输入，根据第一和第二输入之间的差输出信号，并且在第二输入端选择性地耦合到存储单元。电阻器位于读出放大器的第一输入端和接地节点之间的第一路径中。

7. 发明授权

US08531864B2 Nonvolatile semiconductor integrated circuit for controlling sensing voltage 有权
标题翻译：用于控制感测电压的非易失性半导体集成电路
公开(公告)号：US08531864B2
公开(公告)日：2013-09-10
申请号：US12844637
申请日：2010-07-27
申请人： Dong Keun Kim
发明人： Dong Keun Kim
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , G11C13/004 , G11C2013/0045 , G11C2013/0052 , G11C2213/72
摘要： A nonvolatile semiconductor integrated circuit includes a memory cell array configured to include each of memory cells having a variable resistor; a current sensing unit configured to convert a current which depends on the variable resistor of a corresponding memory cell, into a sensing voltage; and a voltage control unit configured to receive the sensing voltage for a predetermined time in response to a sensing control signal, regulate the received sensing voltage, and provide a sensing output voltage.
摘要翻译：非易失性半导体集成电路包括：存储单元阵列，被配置为包括具有可变电阻器的每个存储单元; 电流感测单元，被配置为将依赖于相应的存储单元的可变电阻器的电流转换成感测电压; 以及电压控制单元，被配置为响应于感测控制信号接收感测电压达预定时间，调节所接收的感测电压，并提供感测输出电压。

8. 发明授权

US08520423B2 Non-volatile memory device 有权
标题翻译：非易失性存储器件
公开(公告)号：US08520423B2
公开(公告)日：2013-08-27
申请号：US12962322
申请日：2010-12-07
申请人： Hyun Joo Lee , Dong Keun Kim
发明人： Hyun Joo Lee , Dong Keun Kim
IPC分类号： G11C11/00
CPC分类号： G11C7/062 , G11C11/16 , G11C11/1673 , G11C13/0004 , G11C13/004 , G11C13/0061 , G11C2013/0045 , G11C2013/0054 , G11C2207/063
摘要： A non-volatile memory device for performing a sensing operation using a current signal includes a cell array, a current-voltage converter, and a sense amplifier. The cell array includes at least one unit cell so as to read or write data. The current-voltage converter converts a sensing current corresponding to data stored in the unit cell into a sensing voltage, outputs the sensing voltage, receives a feedback input of the sensing voltage, and adjusts a level of a current applied to an input terminal of the sensing current in response to a level of the feedback input sensing voltage. The sense amplifier compares the sensing voltage with a predetermined reference voltage, and amplifies the result of comparison.
摘要翻译：用于使用电流信号执行感测操作的非易失性存储器件包括单元阵列，电流 - 电压转换器和读出放大器。单元阵列包括至少一个单位单元，以便读或写数据。电流 - 电压转换器将对应于存储在单位电池中的数据的感测电流转换为感测电压，输出感测电压，接收感测电压的反馈输入，并调整施加到感测电压的输入端的电流电平响应于反馈输入感测电压的电平来感测电流。感测放大器将感测电压与预定参考电压进行比较，并且放大比较结果。

9. 发明授权

US08130541B2 Phase change memory apparatus and test circuit therefor 有权
标题翻译：相变存储装置及其测试电路
公开(公告)号：US08130541B2
公开(公告)日：2012-03-06
申请号：US12650518
申请日：2009-12-30
申请人： Dong Keun Kim , Tae Hun Yoon
发明人： Dong Keun Kim , Tae Hun Yoon
IPC分类号： G11C11/00
CPC分类号： G11C29/48 , G11C29/12005 , G11C29/1201
摘要： A test circuit transfers data, which is generated by current supplied from an external source, to a memory cell in response to a test mode signal.
摘要翻译：测试电路响应于测试模式信号将从外部源提供的电流产生的数据传送到存储器单元。

10. 发明授权

US5776993A Thermoplastic PVC foam composition 失效
标题翻译：热塑性PVC泡沫组合物
公开(公告)号：US5776993A
公开(公告)日：1998-07-07
申请号：US697948
申请日：1996-09-03
申请人： Bong Sub Shin , Jae Yeon Lee , Dong Keun Kim , Seoun Jun Kim , Sung Ok Cho
发明人： Bong Sub Shin , Jae Yeon Lee , Dong Keun Kim , Seoun Jun Kim , Sung Ok Cho
IPC分类号： C08K5/00 , C08J9/00 , C08L7/00 , C08L9/00 , C08L19/00 , C08L21/00 , C08L23/08 , C08L27/06 , C08L31/04 , C08L51/00 , C08L51/04 , C08L75/00 , C08L75/04
CPC分类号： C08J9/0061 , C08J2327/06 , C08J2421/00
摘要： This invention relates to a thermoplastic PVC foam composition and more particularly, to the thermoplastic PVC foam composition suitable for a shoe material, which is characterized by the following fabrication and advantages. Some plasticizer and additive are added to the PVC base, plasticized by dioctyl phthalate (hereinafter called as "DOP") or epoxide soybean oil (hereinafter called as "ESO") to obtain the thermoplastic PVC foam composition. Then, one type of compound, selected from rubber thermoplastic urethane compound (hereinafter called as "TPU") and ethylenevinyl acetate copolymer (hereinafter called as "EVA"), was added to the mixture for modification. The desired product, so formed, has recognized some advantages in that a) possible foaming by extruder and injector including heating press, b) the composition, so foamed, can be regenerated, c) the desired product is light due to its low specific gravity, and d) physical property, anti-slip, abrasion-resistance and adhesiveness with other materials are remarkable.
摘要翻译：本发明涉及热塑性PVC泡沫组合物，更具体地说，涉及适用于鞋材的热塑性PVC泡沫组合物，其特征在于以下制造和优点。将一些增塑剂和添加剂加入到PVC基质中，由邻苯二甲酸二辛酯（以下称为“DOP”）或环氧化物大豆油（以下称为“ESO”）增塑，得到热塑性PVC泡沫组合物。然后，向混合物中加入一种选自橡胶热塑性氨基甲酸酯化合物（以下称为“TPU”）和乙烯 - 乙酸乙烯酯共聚物（以下称为“EVA”）的化合物进行改性。所形成的所需产品已经认识到一些优点，即a）通过挤出机和喷射器可能的发泡，包括加热压机，b）可以再生发泡的组合物，c）由于其比重低，所需产品是轻质的，d）物理性能，防滑，耐磨性和与其他材料的粘合性显着。

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