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    • 7. 发明申请
    • ANALOG TO DIGITAL CONVERTER
    • 模拟到数字转换器
    • US20150214970A1
    • 2015-07-30
    • US14607282
    • 2015-01-28
    • Huawei Technologies Co., Ltd.
    • Mingjun FanLiming FangYuan Liu
    • H03M1/12
    • H03M1/12H03M1/00H03M1/0602H03M1/365H03M7/165
    • The present invention relates to an analog to digital converter. The analog to digital converter includes comparing modules at multi levels, where a comparing module at each level includes a comparator and a metastable state determining unit. The comparator is configured to, when a previous-level comparing module is not in a metastable state, receive a first clock, a first input signal, and a second input signal, and compare the first input signal with the second input signal. The metastable state determining unit is configured to, when the previous-level comparing module is not in a metastable state, receive the first clock, generate a reference clock according to the first clock, and if a second clock that is output by the comparator is later than the reference clock, determine that the current-level comparing module is in a metastable state.
    • 本发明涉及一种模数转换器。 模数转换器包括在多级别比较模块,其中每个级别的比较模块包括比较器和亚稳态确定单元。 比较器被配置为当前一级比较模块不处于亚稳状态时,接收第一时钟,第一输入信号和第二输入信号,并将第一输入信号与第二输入信号进行比较。 亚稳态确定单元被配置为当前级电平比较模块不处于亚稳态时,接收第一时钟,根据第一时钟生成参考时钟,并且如果由比较器输出的第二时钟是 晚于参考时钟,确定当前级别的比较模块处于亚稳状态。