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1. 发明授权

US09478599B1 Integrated circuit device substrates having packaged inductors thereon 有权
标题翻译：集成电路器件衬底，其上具有封装的电感器
公开(公告)号：US09478599B1
公开(公告)日：2016-10-25
申请号：US14586525
申请日：2014-12-30
申请人： Integrated Device Technology, Inc.
发明人： Robert A. Gubser , Ajay Kumar Ghai , Viresh Piyush Patel
IPC分类号： H01L23/495 , H01L23/02 , H01L23/04 , H01L23/48 , H01L23/52 , H01L29/40 , H01L49/02 , H01L23/50 , H01L23/552
CPC分类号： H01L28/10 , H01F27/00 , H01L21/50 , H01L23/10 , H01L23/3114 , H01L23/481 , H01L23/50 , H01L23/552 , H01L23/645 , H01L2224/16225
摘要： An integrated circuit device includes an integrated circuit substrate having an at least two piece package thereon. The package has a sealed cavity therein and a patterned metal inductor in the cavity. The inductor has at least a first terminal electrically coupled to a portion of the integrated circuit substrate by an electrically conductive via, which extends at least partially through the package. The package, which may include a material selected from a group consisting of glass and ceramics, includes a base and a cap sealed to the base. The metal inductor includes a metal layer patterned on at least one of the cap and base of the package. The base may also include first and second electrically conductive vias therein, which are electrically connected to first and second terminals of the inductor.
摘要翻译：集成电路器件包括其上具有至少两个片的封装的集成电路衬底。封装在其中具有密封腔，并且在空腔中具有图案化的金属电感器。电感器具有至少第一端子，该第一端子通过导电通孔电连接到集成电路基板的一部分，导电通孔至少部分延伸穿过封装。可以包括从由玻璃和陶瓷组成的组中选择的材料的包装包括基部和与基部密封的盖。金属电感器包括在封装的帽和底座中的至少一个上图案化的金属层。基座还可以包括其中的第一和第二导电通孔，其电连接到电感器的第一和第二端子。

2. 发明授权

US09791503B1 Packaged oscillators with built-in self-test circuits that support resonator testing with reduced pin count 有权
公开(公告)号：US09791503B1
公开(公告)日：2017-10-17
申请号：US14871411
申请日：2015-09-30
申请人： Integrated Device Technology, Inc.
发明人： James Bryan Northcutt , Stephen Amar Tibbitts , Robert A. Gubser , Bruce Edward Clark , John William Fallisgaard , Kenneth Astrof
IPC分类号： G01R31/3187 , G01R31/28 , H03B5/32
CPC分类号： G01R31/2884 , G01R31/282 , G01R31/2836 , G01R31/2853 , H03B5/04 , H03B5/32 , H03B5/36 , H03H9/02133 , H03H9/02834 , H03H9/02897 , H03H9/0547 , H03H9/10 , H03H9/1021 , H03H9/13 , H03H9/205 , H03H11/44
摘要： Packaged integrated circuit devices include an oscillator circuit having a resonator (e.g., quartz crystal, MEMs, etc.) associated therewith, which is configured to generate a periodic reference signal. A built-in self-test (BIST) circuit is provided, which is selectively electrically coupled to first and second terminals of the resonator during an operation by the BIST circuit to test at least one performance characteristic of the resonator, such as at least one failure mode. These test operations may occur during a built-in self-test time interval when the oscillator circuit is at least partially disabled. In this manner, built-in self-test circuitry may be utilized to provide an efficient means of testing a resonating element/structure using circuitry that is integrated within an oscillator chip and within a wafer-level chip-scale package (WLCSP) containing the resonator.

3. 发明授权

US09445536B1 Crystal oscillator fabrication methods using dual-deposition of mounting cement and dual-curing techniques 有权
标题翻译：晶体振荡器制造方法采用双沉积安装水泥和双固化技术
公开(公告)号：US09445536B1
公开(公告)日：2016-09-13
申请号：US14586534
申请日：2014-12-30
申请人： Integrated Device Technology, Inc.
发明人： Robert A. Gubser , Ajay Kumar Ghai , Viresh Piyush Patel
IPC分类号： H05K13/04 , H03B1/00
CPC分类号： H03B1/00 , H03H3/02 , H03H9/1021 , H03H9/19 , H03H2003/022
摘要： A crystal oscillator fabrication method includes depositing mounting cement onto first and second mounting pads on a substrate to thereby define first and second electrode adhesion bumps. First and second electrodes of a crystal oscillator are electrically connected to the first and second mounting pads by contacting the first and second electrodes to the first and second electrode adhesion bumps and then curing the adhesion bumps. Next, mounting cement is deposited onto the first electrode and onto a portion of the first electrode adhesion bump to thereby define a top electrode adhesion extension. The top electrode adhesion extension is then cured.
摘要翻译：一种晶体振荡器制造方法，包括在基板上的第一和第二安装焊盘上沉积水泥，从而限定第一和第二电极附着凸块。晶体振荡器的第一和第二电极通过使第一和第二电极接触第一和第二电极粘附凸块，然后使粘附凸块固化而与第一和第二安装焊盘电连接。接下来，将安装的水泥沉积到第一电极上并且沉积到第一电极粘附凸块的一部分上，从而限定顶部电极附着延伸。然后固化顶部电极粘合延伸。

4. 发明授权

US09397151B1 Packaged integrated circuits having high-Q inductors therein and methods of forming same 有权
标题翻译：具有高Q电感器的封装集成电路及其形成方法
公开(公告)号：US09397151B1
公开(公告)日：2016-07-19
申请号：US14136040
申请日：2013-12-20
申请人： Integrated Device Technology, Inc.
发明人： Kenneth L. Astrof , Robert A. Gubser , Ajay Kumar Ghai , Viresh Piyush Patel , Jitesh Shah
IPC分类号： H01L49/02
CPC分类号： H01L28/10 , H01F27/00 , H01L21/50 , H01L23/10 , H01L23/3114 , H01L23/481 , H01L23/50 , H01L23/552 , H01L23/645 , H01L2224/16225
摘要： A packaged integrated circuit includes an integrated circuit substrate and a cap bonded to a surface of the integrated circuit substrate. The cap has a recess therein that is at least partially lined with at least one segment of an inductor. This inductor may be electrically coupled to an electrical component within the integrated circuit substrate. In some embodiments, the inductor is patterned to extend along a sidewall and interior top surface of the recess, which extends opposite the integrated circuit substrate. The inductor may include a plurality of arcuate-shaped segments and may be patterned to be symmetric about a center-tapped portion thereof. The cap may also include a magnetic material therein that increases an effective inductance of the inductor relative to an otherwise equivalent cap and inductor combination that is devoid of the magnetic material.
摘要翻译：封装的集成电路包括集成电路基板和结合到集成电路基板的表面的盖。盖子在其中具有至少部分地衬有电感器的至少一个部分的凹部。该电感器可以电耦合到集成电路基板内的电气部件。在一些实施例中，电感器被图案化以沿着与集成电路基板相对延伸的凹部的侧壁和内部顶表面延伸。电感器可以包括多个弧形段，并且可以被图案化成关于其中心抽头部分对称。盖子还可以包括其中的磁性材料，其相对于没有磁性材料的否则相当的盖和电感器组合增加了电感器的有效电感。

5. 发明授权

US09306537B1 Integrated circuit device substrates having packaged crystal resonators thereon 有权
标题翻译：在其上具有封装晶体谐振器的集成电路器件衬底
公开(公告)号：US09306537B1
公开(公告)日：2016-04-05
申请号：US14586508
申请日：2014-12-30
申请人： Integrated Device Technology, Inc.
发明人： Robert A. Gubser , Ajay Kumar Ghai , Viresh Piyush Patel
IPC分类号： H03B5/36 , H03B1/02 , H03H9/17 , H01L41/053 , H01L41/047
CPC分类号： H03H9/17 , H03B1/02 , H03H9/0547 , H03H9/1021
摘要： An integrated circuit device includes an integrated circuit substrate having a two piece package thereon. The package has a hermetically sealed cavity therein and a crystal resonator within the cavity. The crystal resonator includes at least one electrode electrically coupled to a portion of the integrated circuit substrate by an electrically conductive via, which extends at least partially through the package. The package may include a material selected from a group consisting of glass and ceramics. The crystal resonator includes a crystal blank and first and second electrodes on first and second opposing sides of the crystal blank. The package includes a base having a recess therein and a cap hermetically sealed to the base. The cap includes first and second electrical traces thereon, which are electrically connected to the first and second electrodes of the crystal resonator.
摘要翻译：集成电路器件包括其上具有两片封装的集成电路衬底。该封装在其中具有气密密封腔，并且在腔内具有晶体谐振器。晶体谐振器包括至少一个电极，其通过导电通孔电连接到集成电路基板的一部分，导电通孔至少部分延伸穿过封装。包装可以包括从由玻璃和陶瓷组成的组中选择的材料。晶体谐振器包括晶体坯料和晶体坯料的第一和第二相对侧上的第一和第二电极。该包装包括其中具有凹部的底座和密封到底座的盖。盖包括其上的第一和第二电迹线，其电连接到晶体谐振器的第一和第二电极。

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