专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07598122B1 Die attach method and microarray leadframe structure 有权
标题翻译：贴片方法和微阵列引线框架结构
公开(公告)号：US07598122B1
公开(公告)日：2009-10-06
申请号：US11372481
申请日：2006-03-08
申请人： Jaime A. Bayan , Nghia Thuc Tu , Lim Fong , Chan Peng Yeen
发明人： Jaime A. Bayan , Nghia Thuc Tu , Lim Fong , Chan Peng Yeen
IPC分类号： H01L21/00
CPC分类号： H01L23/4951 , H01L21/4828 , H01L23/3107 , H01L23/49513 , H01L23/49541 , H01L24/48 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/48465 , H01L2224/73265 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： In one aspect of the invention, a method of attaching a semiconductor die to a microarray leadframe is described. The method comprises stamping an adhesive onto discrete areas of the microarray leadframe using a multi-pronged stamp tool. The adhesive is applied to the leadframe as a series of dots, each dot corresponding to an associated prong of the stamping tool. In some embodiments the adhesive used to attach the semiconductor die to a leadframe is a black epoxy based adhesive material. In an apparatus aspect of the invention, lead traces in a microarray leadframe are arranged to have tails that extend beyond their associated contact posts on the side of the contact post that is opposite a wire bonding region such that such lead traces extends on two opposing sides of their associated contact posts. The tails do not attach to other structures within the lead frame (such as a die attach structure). The width of at least some of these tailed lead traces in a region that overlies their associated contact post is narrower than their associated contact post. Thus, these narrowed lead traces have extensions that extend beyond their associated contact posts. The extensions provide additional surface area that gives an adhesive applied to the narrowed lead trace (as for example by stamping) room to bleed (flow) along the top surface of the lead trace on both sides of the associated contact pad.
摘要翻译：在本发明的一个方面，描述了将半导体管芯附着到微阵列引线框架的方法。该方法包括使用多管齐下的印模工具将粘合剂冲压到微阵列引线框架的离散区域上。将粘合剂作为一系列点施加到引线框架，每个点对应于冲压工具的相关插脚。在一些实施例中，用于将半导体管芯附接到引线框架的粘合剂是黑色环氧基粘合剂材料。在本发明的装置方面，微阵列引线框架中的导线布置成具有延伸超出其在接触柱侧面的与引线接合区域相对的相关接触柱的尾部，使得这种引线迹线在两个相对侧上延伸的相关联系人员。尾部不附着到引线框架内的其他结构（如模具附接结构）。覆盖在其相关联的接触柱上的区域中的这些尾部引线的至少一些的宽度比其相关联的接触柱窄。因此，这些狭窄的引线迹线具有延伸超出其相关接触柱的延伸。这些延伸部分提供了额外的表面积，其给出了粘合剂施加到狭窄的引线迹线（例如通过冲压）沿着引线迹线的顶表面在相关接触焊盘的两侧上的流出（流动）。

2. 发明授权

US07859090B2 Die attach method and leadframe structure 有权
标题翻译：贴片方法和引线框架结构
公开(公告)号：US07859090B2
公开(公告)日：2010-12-28
申请号：US12549324
申请日：2009-08-27
申请人： Jaime A. Bayan , Nghia Thuc Tu , Lim Fong , Chan Peng Yeen
发明人： Jaime A. Bayan , Nghia Thuc Tu , Lim Fong , Chan Peng Yeen
IPC分类号： H01L23/495 , H01L23/48 , H01L23/52 , H01L23/28
CPC分类号： H01L23/4951 , H01L21/4828 , H01L23/3107 , H01L23/49513 , H01L23/49541 , H01L24/48 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/48465 , H01L2224/73265 , H01L2924/00014 , H01L2924/01013 , H01L2924/01029 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： In one aspect of the invention, a method of attaching a semiconductor die to a microarray leadframe is described. The method comprises stamping an adhesive onto discrete areas of the microarray leadframe using a multi-pronged stamp tool. The adhesive is applied to the leadframe as a series of dots, each dot corresponding to an associated prong of the stamping tool. In some embodiments the adhesive used to attach the semiconductor die to a leadframe is a black epoxy based adhesive material. In an apparatus aspect of the invention, lead traces in a microarray leadframe are arranged to have tails that extend beyond their associated contact posts on the side of the contact post that is opposite a wire bonding region such that such lead traces extends on two opposing sides of their associated contact posts. The tails do not attach to other structures within the lead frame (such as a die attach structure). The width of at least some of these tailed lead traces in a region that overlies their associated contact post is narrower than their associated contact post. Thus, these narrowed lead traces have extensions that extend beyond their associated contact posts. The extensions provide additional surface area that gives an adhesive applied to the narrowed lead trace (as for example by stamping) room to bleed (flow) along the top surface of the lead trace on both sides of the associated contact pad.
摘要翻译：在本发明的一个方面，描述了将半导体管芯附着到微阵列引线框架的方法。该方法包括使用多管齐下的印模工具将粘合剂冲压到微阵列引线框架的离散区域上。将粘合剂作为一系列点施加到引线框架，每个点对应于冲压工具的相关插脚。在一些实施例中，用于将半导体管芯附接到引线框架的粘合剂是黑色环氧基粘合剂材料。在本发明的装置方面，微阵列引线框架中的导线布置成具有延伸超出其在接触柱侧面的与引线接合区域相对的相关接触柱的尾部，使得这种引线迹线在两个相对侧上延伸的相关联系人员。尾部不附着到引线框架内的其他结构（如模具附接结构）。覆盖在其相关联的接触柱上的区域中的这些尾部引线的至少一些的宽度比其相关联的接触柱窄。因此，这些狭窄的引线迹线具有延伸超出其相关接触柱的延伸。这些延伸部分提供了额外的表面积，其给出了粘合剂施加到狭窄的引线迹线（例如通过冲压）沿着引线迹线的顶表面在相关接触焊盘的两侧上的流出（流动）。

3. 发明授权

US07186588B1 Method of fabricating a micro-array integrated circuit package 有权
标题翻译：制造微阵列集成电路封装的方法
公开(公告)号：US07186588B1
公开(公告)日：2007-03-06
申请号：US10871188
申请日：2004-06-18
申请人： Jaime A. Bayan , Santhiran S/O Nadarajah , Chan Chee Ling , Ashok S. Prabhu , Hasfiza Ramley , Chan Peng Yeen
发明人： Jaime A. Bayan , Santhiran S/O Nadarajah , Chan Chee Ling , Ashok S. Prabhu , Hasfiza Ramley , Chan Peng Yeen
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L24/83 , H01L21/568 , H01L23/4951 , H01L23/4952 , H01L23/49548 , H01L23/544 , H01L24/27 , H01L24/29 , H01L24/48 , H01L24/73 , H01L24/85 , H01L24/97 , H01L2223/54486 , H01L2224/274 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73265 , H01L2224/83191 , H01L2224/83856 , H01L2224/85 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/07802 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A method of fabricating a micro-array IC package is recited. A wafer has a B-stageable adhesive applied, and the wafer is diced. The individual dice are applied to a lead-frame via their adhesive, and wirebonded to associated leads. The lead-frame is then encapsulated, and solder connectors are applied. The lead-frame is then singulated to produce a plurality of lead-frame based micro-array packages. The process thus allows lead-frame based manufacturing methods to be employed in the production of BGA-type packages, allowing such packages to be produced faster and more efficiently.
摘要翻译：列举了制造微阵列IC封装的方法。晶片具有可施加的B级粘合剂，并且晶片被切割。单个骰子通过其粘合剂施加到引线框架，并且引线键合到相关联的引线。然后封装引线框架，并应用焊接连接器。引线框架然后被分割以产生多个基于引线框架的微阵列封装。因此，该方法允许基于引线框架的制造方法用于生产BGA型封装，从而允许更快更有效地制造这种封装。

4. 发明授权

US06677667B1 Leadless leadframe package design that provides a greater structural integrity 有权
标题翻译：无铅引线框封装设计，提供更大的结构完整性
公开(公告)号：US06677667B1
公开(公告)日：2004-01-13
申请号：US09724728
申请日：2000-11-28
申请人： Harry Kam Cheng Hong , Hu Ah Lek , Santhiran Nadarajah , Sharon Ko Mei Wan , Chan Peng Yeen , Jaime Bayan , Peter Howard Spalding
发明人： Harry Kam Cheng Hong , Hu Ah Lek , Santhiran Nadarajah , Sharon Ko Mei Wan , Chan Peng Yeen , Jaime Bayan , Peter Howard Spalding
IPC分类号： H01L2306
CPC分类号： H01L23/3107 , H01L23/49548 , H01L24/45 , H01L24/48 , H01L2224/48245 , H01L2224/48247 , H01L2224/97 , H01L2924/00014 , H01L2924/00015 , H01L2924/14 , H01L2924/15747 , H01L2924/181 , H01L2924/00 , H01L2224/05599 , H01L2224/45099 , H01L2224/85499 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A leadless leadframe semiconductor package comprising a plurality of contacts, which have contact surfaces on the bottom surface of the package. At least some of the contacts have integrally formed stems that extend outward to the peripheral surface of the package. These stems have heights and widths less than the heights and widths of their corresponding contacts. A molded cap encapsulates at least a portion of the die, the stems and the contacts. The molded cap leaves the contact surfaces of the contacts exposed on the bottom surface of the package, leaves a peripheral surface of the stems exposed on the peripheral surface of the package, and covers a bottom surface of each of the stems. Another aspect of the invention pertains to a leadless leadframe panel assembly having a conductive substrate panel that has at least one array of device areas, each array of device areas having a plurality of tie bars and a plurality of contacts. The contacts have contact surfaces on the bottom surface of the leadless leadframe panel assembly. The contacts also have integrally formed stems that extend towards and connect to one of the tie bars. The stems have widths and heights that are less than the widths and heights of their corresponding contacts. A molded cap encapsulates at least a portion of each die, the tie bars, the stems and the contacts while leaving the contact surfaces of the contacts exposed and covering a bottom surface of each of the stems.
摘要翻译：一种无引线框架半导体封装，其包括在封装的底表面上具有接触表面的多个触点。至少一些触点具有向外延伸到包装的外周表面的整体形成的杆。这些杆的高度和宽度小于其相应接触件的高度和宽度。模制帽封装了模具，杆和触头的至少一部分。模制帽离开暴露在包装底部表面上的触点的接触表面，离开暴露在包装的外周表面上的茎的外周表面，并覆盖每个茎的底表面。本发明的另一方面涉及一种无引线框架面板组件，其具有导电衬底面板，该导电衬底面板具有至少一个器件区域阵列，每个阵列的器件区域具有多个连接条和多个触点。触点在无引线框架面板组件的底表面上具有接触表面。接触件还具有朝向并连接到一个连接杆的连接件的整体形成的杆。杆的宽度和高度小于其相应接触件的宽度和高度。模制帽封装每个模具，连接杆，杆和触头的至少一部分，同时使触头的接触表面暴露并覆盖每个杆的底表面。

5. 发明授权

US06933174B1 Leadless leadframe package design that provides a greater structural integrity 有权
标题翻译：无铅引线框封装设计，提供更大的结构完整性
公开(公告)号：US06933174B1
公开(公告)日：2005-08-23
申请号：US10956268
申请日：2004-09-30
申请人： Harry Kam Cheng Hong , Hu Ah Lek , Santhiran Nadarajah , Sharon Ko Mei Wan , Chan Peng Yeen , Jaime Bayan , Peter Howard Spalding
发明人： Harry Kam Cheng Hong , Hu Ah Lek , Santhiran Nadarajah , Sharon Ko Mei Wan , Chan Peng Yeen , Jaime Bayan , Peter Howard Spalding
IPC分类号： H01L21/50 , H01L21/56 , H01L23/31 , H01L23/495
CPC分类号： H01L23/49548 , H01L21/561 , H01L23/3107 , H01L24/48 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2924/00014 , H01L2924/14 , H01L2924/15747 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A leadless leadframe semiconductor package having a plurality of contacts, which have contact surfaces on the bottom surface of the package. At least some of the contacts have integrally formed stems that extend outward to the peripheral surface of the package. These stems have heights and widths less than the heights and widths of their corresponding contacts. A molded cap encapsulates at least a portion of the die, the stems and the contacts. Another aspect of the invention pertains to a leadless leadframe panel assembly having a conductive substrate panel that has at least one array of device areas, each array of device areas having a plurality of tie bars and a plurality of contacts. The contacts also have integrally formed stems that extend towards and connect to one of the tie bars. The stems have widths and heights that are less than the widths and heights of their corresponding contacts.
摘要翻译：一种具有多个触点的无引线框架半导体封装，其具有在封装的底表面上的接触表面。至少一些触点具有向外延伸到包装的外周表面的整体形成的杆。这些杆的高度和宽度小于其相应接触件的高度和宽度。模制帽封装了模具，杆和触头的至少一部分。本发明的另一方面涉及一种无引线框架面板组件，其具有导电衬底面板，该导电衬底面板具有至少一个器件区域阵列，每个阵列的器件区域具有多个连接条和多个触点。接触件还具有朝向并连接到一个连接杆的连接件的整体形成的杆。杆的宽度和高度小于其相应接触件的宽度和高度。

6. 发明授权

US06933223B1 Ultra-low loop wire bonding 有权
标题翻译：超低环线焊接
公开(公告)号：US06933223B1
公开(公告)日：2005-08-23
申请号：US10826755
申请日：2004-04-15
申请人： Lim Peng Soon , Chan Peng Yeen
发明人： Lim Peng Soon , Chan Peng Yeen
IPC分类号： B23K20/00 , H01L21/44 , H01L21/60
CPC分类号： H01L24/85 , B23K20/004 , B23K2101/40 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/78 , H01L2224/05554 , H01L2224/32145 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/48247 , H01L2224/48451 , H01L2224/48465 , H01L2224/48511 , H01L2224/48599 , H01L2224/48699 , H01L2224/4917 , H01L2224/73265 , H01L2224/78301 , H01L2224/85181 , H01L2224/92247 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/85399 , H01L2224/05599
摘要： A wire bonding technique for manufacturing semiconductor devices that results in a bonded wire having a small loop height. The wire bonding technique involves a capillary tool that ball bonds a wire to a first contact point, then moves upwards, and then towards a second contact point to which the wire will be attached. The capillary tool only moves towards the second contact point in the lateral direction. The height of the wire loop of the bonded wires can be controlled to have desired wire loop heights. The bonding technique can be used in semiconductor devices with stacked dice and in devices where a die and a contact lead are approximately at the same height.
摘要翻译：一种用于制造半导体器件的引线接合技术，其导致具有小环路高度的接合线。引线接合技术涉及一种毛细管工具，其将电线焊接到第一接触点，然后向上移动，然后朝向将被连接到电线的第二接触点。毛细管工具仅沿横向朝向第二接触点移动。可以将接合线的导线的高度控制为具有期望的线环高度。接合技术可以用于具有堆叠骰子的半导体器件中，并且在芯片和接触引线大致处于相同高度的器件中。

7. 发明授权

US06818970B1 Leadless leadframe package design that provides a greater structural integrity 有权
标题翻译：无铅引线框封装设计，提供更大的结构完整性
公开(公告)号：US06818970B1
公开(公告)日：2004-11-16
申请号：US10639226
申请日：2003-08-11
申请人： Harry Kam Cheng Hong , Hu Ah Lek , Santhiran Nadarajah , Sharon Ko Mei Wan , Chan Peng Yeen , Jaime Bayan , Peter Howard Spalding
发明人： Harry Kam Cheng Hong , Hu Ah Lek , Santhiran Nadarajah , Sharon Ko Mei Wan , Chan Peng Yeen , Jaime Bayan , Peter Howard Spalding
IPC分类号： H01L23495
CPC分类号： H01L23/3107 , H01L23/49548 , H01L24/45 , H01L24/48 , H01L2224/48245 , H01L2224/48247 , H01L2224/97 , H01L2924/00014 , H01L2924/00015 , H01L2924/14 , H01L2924/15747 , H01L2924/181 , H01L2924/00 , H01L2224/05599 , H01L2224/45099 , H01L2224/85499 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A leadless leadframe semiconductor package includes a plurality of contacts, at least some of which have integrally formed stems that extend to the peripheral surface of the package. These stems have heights and widths less than the heights and widths of their corresponding contacts. A molded cap encapsulates the stems and the contacts to leave contact surfaces of the contacts exposed on the bottom surface of the package. Another aspect of the invention pertains to a leadless leadframe panel assembly having a conductive substrate panel that has at least one array of device areas, which has a plurality of tie bars and a plurality of contacts. The contacts have integrally formed stems that extend towards and connect to one of the tie bars. The stems have widths and heights that are less than the widths and heights of their corresponding contacts.
摘要翻译：无引线框架半导体封装包括多个触点，其中至少一些具有延伸到封装的外围表面的整体形成的杆。这些杆的高度和宽度小于其相应接触件的高度和宽度。模制帽封装茎和触点以使暴露在包装底部表面上的触点的接触表面留下。本发明的另一方面涉及一种无引线框架面板组件，其具有导电衬底面板，该导电衬底面板具有至少一个设备区域阵列，该阵列具有多个连接杆和多个触点。触头具有朝向并连接到一个连接杆的一体形成的杆。杆的宽度和高度小于其相应接触件的宽度和高度。

8. 发明授权

US06808961B1 Locking of mold compound to conductive substrate panels 有权
标题翻译：将模具化合物锁定到导电基板面板上
公开(公告)号：US06808961B1
公开(公告)日：2004-10-26
申请号：US10414131
申请日：2003-04-14
申请人： Harry Kam Cheng Hong , Hu Ah Lek , Santhiran Nadarajah , Sharon Ko Mei Wan , Chan Peng Yeen , Jaime Bayan , Peter Howard Spalding
发明人： Harry Kam Cheng Hong , Hu Ah Lek , Santhiran Nadarajah , Sharon Ko Mei Wan , Chan Peng Yeen , Jaime Bayan , Peter Howard Spalding
IPC分类号： H01L2144
CPC分类号： H01L23/13 , H01L23/3121 , H01L24/97 , H01L2924/14 , H01L2924/181 , H01L2924/00
摘要： A panel assembly of packaged integrated circuit devices comprising a conductive substrate panel having an array of device areas and a plurality of locking passageways. The locking passageways are positioned about an inactive buffer area which surrounds the periphery of the array of device areas. The locking passageways extend from a topside of the panel toward a bottom side of the panel. The panel assembly also includes a molded cap that is molded over the topside of the panel to encapsulate the array of device areas and the inactive buffer area. The molded cap includes conforming locking stem portions that extend into each of the locking passageways in a manner locking the molded cap to the substrate panel such that during singulation of the device areas, the molded cap will not separate from the substrate panel at the inactive buffer area. In another aspect of the invention, a method for producing the panel assembly having the locking passageways is described. The method involves providing a conductive substrate panel having the locking passageways and applying molding material to the topside of the substrate panel such that the solidified molding material forms stems that conform to the passageways.
摘要翻译：一种封装的集成电路器件的面板组件，包括具有一组器件区域的导电衬底面板和多个锁定通道。锁定通道围绕围绕装置区域阵列的周边的非活动缓冲区域定位。锁定通道从面板的顶部朝向面板的底侧延伸。面板组件还包括模制顶盖，其模制在面板的顶部以封装装置区域阵列和非活动缓冲区域。模制帽包括符合锁定杆部分，其以将模制帽锁定到衬底面板的方式延伸到每个锁定通道中，使得在单元化设备区域期间，模制帽不会在非活动缓冲器处与衬底面板分离区。在本发明的另一方面，描述了一种用于制造具有锁定通道的面板组件的方法。该方法包括提供具有锁定通道的导电基板面板，并将模塑材料施加到基板面板的顶侧，使得固化的模制材料形成符合通道的阀杆。

9. 发明授权

US06963124B1 Locking of mold compound to conductive substrate panels 有权
标题翻译：将模具化合物锁定到导电基板面板上
公开(公告)号：US06963124B1
公开(公告)日：2005-11-08
申请号：US10943476
申请日：2004-09-17
申请人： Harry Kam Cheng Hong , Hu Ah Lek , Santhiran Nadarajah , Sharon Ko Mei Wan , Chan Peng Yeen , Jaime Bayan , Peter Howard Spalding
发明人： Harry Kam Cheng Hong , Hu Ah Lek , Santhiran Nadarajah , Sharon Ko Mei Wan , Chan Peng Yeen , Jaime Bayan , Peter Howard Spalding
IPC分类号： H01L23/02 , H01L23/31 , H01L23/495
CPC分类号： H01L23/3121 , H01L23/3142 , H01L23/49548 , H01L24/97 , H01L2924/14 , H01L2924/181 , H01L2924/00
摘要： A panel assembly of packaged integrated circuit devices including a conductive substrate panel having an array of device areas and a plurality of locking passageways. The locking passageways are positioned about an inactive buffer area which surrounds the periphery of the array of device areas. The panel assembly also includes a molded cap that is molded over the topside of the panel to encapsulate the array of device areas and the inactive buffer area. The molded cap includes conforming locking stem portions that extend into each of the locking passageways in a manner locking the molded cap to the substrate panel such that during singulation of the device areas, the molded cap will not separate from the substrate panel at the inactive buffer area. In another aspect of the invention, a method for producing the panel assembly having the locking passageways is described.
摘要翻译：一种封装集成电路器件的面板组件，包括具有一组器件区域的导电衬底面板和多个锁定通道。锁定通道围绕围绕装置区域阵列的周边的非活动缓冲区域定位。面板组件还包括模制顶盖，其模制在面板的顶部以封装装置区域阵列和非活动缓冲区域。模制帽包括符合锁定杆部分，其以将模制帽锁定到衬底面板的方式延伸到每个锁定通道中，使得在单元化设备区域期间，模制帽不会在非活动缓冲器处与衬底面板分离区。在本发明的另一方面，描述了一种用于制造具有锁定通道的面板组件的方法。

10. 发明授权

US06576989B1 Locking of mold compound to conductive substrate panels 失效
标题翻译：将模具化合物锁定到导电基板面板上
公开(公告)号：US06576989B1
公开(公告)日：2003-06-10
申请号：US09724727
申请日：2000-11-28
申请人： Harry Kam Cheng Hong , Hu Ah Lek , Santhiran Nadarajah , Sharon Ko Mei Wan , Chan Peng Yeen , Jaime Bayan , Peter Howard Spalding
发明人： Harry Kam Cheng Hong , Hu Ah Lek , Santhiran Nadarajah , Sharon Ko Mei Wan , Chan Peng Yeen , Jaime Bayan , Peter Howard Spalding
IPC分类号： H01L2302
CPC分类号： H01L23/13 , H01L23/3121 , H01L24/97 , H01L2924/14 , H01L2924/181 , H01L2924/00
摘要： A panel assembly of packaged integrated circuit devices including conductive substrate panel having an array of device areas and a plurality of locking passageways. The locking passageways are positioned about an inactive buffer area which surrounds the periphery of the array of device areas. The locking passageways extend from a topside of the panel toward a bottom side of the panel. The panel assembly also includes a molded cap that is molded over the topside of the panel to encapsulate the array of device areas and the inactive buffer area. The molded cap includes conforming locking stem portions that extend into each of the locking passageways in a manner locking the molded cap to the substrate panel such that during singulation of the device areas, the molded cap will not separate from the substrate panel at the inactive buffer area. In another aspect of the invention, a method for producing the panel assembly having the locking passageways is described. The method involves providing a conductive substrate panel having the locking passageways and applying molding material to the topside of the substrate panel such that the solidified molding material forms stems that conform to the passageways.
摘要翻译：一种封装集成电路器件的面板组件，包括具有一组器件区域和多个锁定通道的导电衬底面板。锁定通道围绕围绕装置区域阵列的周边的非活动缓冲区域定位。锁定通道从面板的顶部朝向面板的底侧延伸。面板组件还包括模制顶盖，其模制在面板的顶部以封装装置区域阵列和非活动缓冲区域。模制帽包括符合锁定杆部分，其以将模制帽锁定到衬底面板的方式延伸到每个锁定通道中，使得在单元化设备区域期间，模制帽不会在非活动缓冲器处与衬底面板分离区。在本发明的另一方面，描述了一种用于制造具有锁定通道的面板组件的方法。该方法包括提供具有锁定通道的导电基板面板，并将模塑材料施加到基板面板的顶侧，使得固化的模制材料形成符合通道的阀杆。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式