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    • 5. 发明授权
    • Systems and methods for controlled wedge spacing in a storage device
    • 存储设备中控制楔形间距的系统和方法
    • US08780476B2
    • 2014-07-15
    • US13242983
    • 2011-09-23
    • Jeffrey P. Grundvig
    • Jeffrey P. Grundvig
    • G11B5/09
    • G11B20/1403G11B5/5965G11B20/10222
    • Various embodiments of the present invention provide systems and methods for data processing. For example, some embodiments of the present invention provide clock generation systems that include: a first clock multiplier circuit, a second clock multiplier circuit, a modulus accumulator circuit, and a data clock phase control circuit. The first clock multiplier circuit is operable to multiply a reference clock by a first multiplier to yield a first domain clock, and the second clock multiplier circuit is operable to multiply the reference clock by a second multiplier to yield a second domain clock. The modulus accumulator circuit is operable to yield a value indicating a fractional amount of the second domain clock that an edge of the second domain clock is offset from a trigger signal. The data clock phase control circuit is operable to phase shift the second domain clock by a phase amount corresponding to the fractional amount.
    • 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,本发明的一些实施例提供了时钟产生系统,其包括:第一时钟乘法器电路,第二时钟乘法器电路,模数累加器电路和数据时钟相位控制电路。 第一时钟乘法器电路可操作以将参考时钟乘以第一乘法器以产生第一域时钟,并且第二时钟乘法器电路可操作以将参考时钟乘以第二乘法器以产生第二域时钟。 模数累加器电路可操作以产生指示第二域时钟的边缘与触发信号偏移的第二域时钟的分数量的值。 数据时钟相位控制电路可操作以将第二域时钟相移相应于分数量的相位量。
    • 7. 发明申请
    • STORAGE DEVICE HAVING CLOCK ADJUSTMENT CIRCUITRY WITH FIRMWARE-BASED PREDICTIVE CORRECTION
    • 具有基于固定预测校正的时钟调整电路的存储设备
    • US20130135766A1
    • 2013-05-30
    • US13306320
    • 2011-11-29
    • Jeffrey P. GrundvigJason D. Byrne
    • Jeffrey P. GrundvigJason D. Byrne
    • G11B27/10
    • G11B20/10509G11B20/10222G11B2220/20
    • A hard disk drive or other disk-based storage device comprises a storage disk, a read/write head configured to read data from and write data to the storage disk, and control circuitry coupled to the read/write head and configured to process data received from and supplied to the read/write head. The control circuitry comprises clock adjustment circuitry configured to generate a control signal for adjusting a parameter of a clock signal based at least in part on timing information obtained by detecting a timing pattern on a surface of the storage disk. The control signal is generated utilizing at least a predictive correction control loop, with the clock adjustment circuitry comprising predictive control firmware that implements at least a portion of the predictive correction control loop.
    • 硬盘驱动器或其他基于磁盘的存储设备包括存储盘,被配置为从存储盘读取数据并将数据写入存储盘的读/写头,以及耦合到读/写头并被配置为处理接收到的数据的控制电路 从读取/写入头提供。 控制电路包括时钟调整电路,其被配置为至少部分地基于通过检测存储盘表面上的定时模式获得的定时信息来产生用于调整时钟信号的参数的控制信号。 控制信号是利用至少一个预测校正控制环来产生的,其中时钟调整电路包括实现预测校正控制环路的至少一部分的预测控制固件。
    • 10. 发明授权
    • Clock synchronization between wireless devices during cradled time
    • 无线设备之间的时钟同步
    • US06587694B1
    • 2003-07-01
    • US09404807
    • 1999-09-24
    • Philip D. MooneyRichard L. McDowellJeffrey P. GrundvigJian Wu
    • Philip D. MooneyRichard L. McDowellJeffrey P. GrundvigJian Wu
    • H04L2730
    • H04M1/72502
    • Clocks between at least two wireless devices are synchronized to reduce the need to transmit synchronization signals over a wireless communication channel therebetween. Two wireless devices synchronize their respective clocks with each other when each are electrically coupled, e.g., during a cradle time when brought into physical contact with each other through charge contacts, e.g., to recharge a remote portable unit. The charge signal appearing at the charge contacts is driven to create a time duration marked by a start transition and an end transition in the charge signal. The number of clock pulses of each of the two wireless devices during the time duration is counted, and compared to determine the difference in clock speeds of the wireless devices. The frequency of the clock of at least one of the wireless devices is adjusted to bring the difference in the clock speeds within a predetermined threshold tolerance level.
    • 在至少两个无线设备之间的时钟被同步以减少通过它们之间的无线通信信道发送同步信号的需要。 两个无线设备在每个电耦合时使其各自的时钟彼此同步,例如在通过充电触点进行物理接触的支架时间期间,例如为远程便携式单元充电。 驱动出现在充电触点处的充电信号以产生由充电信号中的开始转换和结束转换所标记的持续时间。 对持续时间内的两个无线设备中的每一个的时钟脉冲数进行计数,并进行比较以确定无线设备的时钟速度的差异。 调整至少一个无线设备的时钟的频率以使时钟速度的差异在预定的阈值容差水平内。