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1. 发明授权

US08174784B2 Systems and methods for inter-location control of storage access 有权
标题翻译：存储访问的位置间控制的系统和方法
公开(公告)号：US08174784B2
公开(公告)日：2012-05-08
申请号：US12527311
申请日：2007-10-30
申请人： Jeffrey P. Grundvig , Richard Rauschmayer , Timothy T. Ding
发明人： Jeffrey P. Grundvig , Richard Rauschmayer , Timothy T. Ding
IPC分类号： G11B5/09 , G11B5/596
CPC分类号： G11B5/09 , G11B20/10 , G11B20/10222 , G11B2020/1267 , G11B2020/1281 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for controlling access to a magnetic storage medium. As one example, a method for controlling access to a magnetic storage medium is disclosed that includes providing a location count indicating a location between a portion of a first servo data sector of a magnetic storage media and a portion of a second servo data sector of the magnetic storage media, and asserting an enable window signal based upon the location count.
摘要翻译：本发明的各种实施例提供了用于控制对磁存储介质的访问的系统和方法。作为一个示例，公开了一种用于控制对磁存储介质的访问的方法，其包括提供指示磁存储介质的第一伺服数据扇区的一部分与第二伺服数据扇区的部分之间的位置的位置计数磁存储介质，并且基于位置计数来确定使能窗口信号。

2. 发明申请

US20100208377A1 Systems and Methods for Inter-Location Control of Storage Access 有权
标题翻译：存储访问的位置间控制的系统和方法
公开(公告)号：US20100208377A1
公开(公告)日：2010-08-19
申请号：US12527311
申请日：2007-10-30
申请人： Jeffrey P. Grundvig , Richard Rauschmayer , Timothy T. Ding
发明人： Jeffrey P. Grundvig , Richard Rauschmayer , Timothy T. Ding
IPC分类号： G11B5/09
CPC分类号： G11B5/09 , G11B20/10 , G11B20/10222 , G11B2020/1267 , G11B2020/1281 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for controlling access to a magnetic storage medium. As one example, a method for controlling access to a magnetic storage medium is disclosed that includes providing a location count indicating a location between a portion of a first servo data sector of a magnetic storage media and a portion of a second servo data sector of the magnetic storage media, and asserting an enable window signal based upon the location count.
摘要翻译：本发明的各种实施例提供了用于控制对磁存储介质的访问的系统和方法。作为一个示例，公开了一种用于控制对磁存储介质的访问的方法，其包括提供指示磁存储介质的第一伺服数据扇区的一部分与第二伺服数据扇区的部分之间的位置的位置计数磁存储介质，并且基于位置计数来确定使能窗口信号。

3. 发明授权

US07929237B2 Modulated disk lock clock and methods for using such 有权
标题翻译：调制磁盘锁时钟及使用方法
公开(公告)号：US07929237B2
公开(公告)日：2011-04-19
申请号：US12147543
申请日：2008-06-27
申请人： Jeffrey P. Grundvig , Richard Rauschmayer
发明人： Jeffrey P. Grundvig , Richard Rauschmayer
IPC分类号： G11B5/09 , G11B27/36
CPC分类号： G11B20/14 , G11B20/10222 , G11B2020/1476 , G11B2020/1484 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for controlling access to a magnetic storage medium. As one example, a method for controlling access to a storage medium is disclosed that includes calculating a point to point error amount, and generating a incremental error value based at least in part on the point to point error amount. The incremental error value is applied incrementally across a defined number of clock cycles.
摘要翻译：本发明的各种实施例提供了用于控制对磁存储介质的访问的系统和方法。作为一个示例，公开了一种用于控制对存储介质的访问的方法，其包括计算点对点误差量，并且至少部分地基于点对点误差量生成增量误差值。递增错误值在规定数量的时钟周期内逐步应用。

4. 发明申请

US20090323214A1 Modulated Disk Lock Clock and Methods for Using Such 有权
标题翻译：调制磁盘锁定时钟及使用方法
公开(公告)号：US20090323214A1
公开(公告)日：2009-12-31
申请号：US12147543
申请日：2008-06-27
申请人： Jeffrey P. Grundvig , Richard Rauschmayer
发明人： Jeffrey P. Grundvig , Richard Rauschmayer
IPC分类号： G11B5/09 , G11B15/18
CPC分类号： G11B20/14 , G11B20/10222 , G11B2020/1476 , G11B2020/1484 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for controlling access to a magnetic storage medium. As one example, a method for controlling access to a storage medium is disclosed that includes calculating a point to point error amount, and generating a incremental error value based at least in part on the point to point error amount. The incremental error value is applied incrementally across a defined number of clock cycles.
摘要翻译：本发明的各种实施例提供了用于控制对磁存储介质的访问的系统和方法。作为一个示例，公开了一种用于控制对存储介质的访问的方法，其包括计算点对点误差量，并且至少部分地基于点对点误差量生成增量误差值。递增错误值在规定数量的时钟周期内逐步应用。

5. 发明授权

US08875005B2 Systems and methods for low latency media defect detection 有权
公开(公告)号：US08875005B2
公开(公告)日：2014-10-28
申请号：US13368599
申请日：2012-02-08
申请人： Yang Cao , Scott M. Dziak , Nayak Ratnakar Aravind , Richard Rauschmayer , Weijun Tan
发明人： Yang Cao , Scott M. Dziak , Nayak Ratnakar Aravind , Richard Rauschmayer , Weijun Tan
IPC分类号： G06F11/00
摘要： Various embodiments of the present invention provide systems and methods for media defect detection. For example, a media defect detection systems is disclosed that includes a data input derived from a medium, a fast envelope calculation circuit that receives the data input and provides a fast decay envelope value based on the data input, a slow envelope calculation circuit that receives the data input and provides a slow decay envelope value based on the data input, and a media defect detection circuit. The media defect detection circuit receives the slow decay envelope value and the fast decay envelope value, calculates a ratio value of the fast decay envelope value to the slow decay envelope value, and asserts a defect output based at least in part on the comparison of the ratio value to a defect threshold value.

6. 发明授权

US08413029B2 Error correction capability adjustment of LDPC codes for storage device testing 失效
标题翻译：用于存储设备测试的LDPC码的纠错能力调整
公开(公告)号：US08413029B2
公开(公告)日：2013-04-02
申请号：US12402359
申请日：2009-03-11
申请人： Richard Rauschmayer , Hongwei Song
发明人： Richard Rauschmayer , Hongwei Song
IPC分类号： H03M13/03 , G11C29/00
CPC分类号： G11B20/1803 , G11B20/1816 , G11C29/028 , G11C29/42 , G11C2029/0411 , H03M13/1102
摘要： Methods and structure described herein provide for adjusting an error correction capability of an LDPC error correction code. For example, the system of one embodiment includes a decoder adapted to decode data that has been encoded with a LDPC error correction code. The system also includes a detector communicatively coupled to the decoder and adapted to estimate bit values in the data prior to decoding by the decoder. The detector is further adapted to change bit values based on bit value estimations to reduce the error correction capability of the LDPC error correction code. The reduction in error correction capability is adjustable such that sector failure rates of storage devices may be incrementally analyzed.
摘要翻译：本文描述的方法和结构提供了用于调整LDPC纠错码的纠错能力。例如，一个实施例的系统包括适于对已经用LDPC纠错码编码的数据进行解码的解码器。该系统还包括通信地耦合到解码器并且适于在解码器解码之前估计数据中的位值的检测器。检测器还适于基于比特值估计改变比特值，以减少LDPC纠错码的纠错能力。误差校正能力的降低是可调节的，从而可以逐渐分析存储设备的扇区故障率。

7. 发明申请

US20100185906A1 ERROR CORRECTION CAPABILITY ADJUSTMENT OF LDPC CODES FOR STORAGE DEVICE TESTING 失效
标题翻译：用于存储器件测试的LDPC码的错误校正能力调整
公开(公告)号：US20100185906A1
公开(公告)日：2010-07-22
申请号：US12402359
申请日：2009-03-11
申请人： Richard Rauschmayer , Hongwei Song
发明人： Richard Rauschmayer , Hongwei Song
IPC分类号： G11C29/04 , H03M13/35 , G06F11/10 , G06F11/22
CPC分类号： G11B20/1803 , G11B20/1816 , G11C29/028 , G11C29/42 , G11C2029/0411 , H03M13/1102
摘要： Methods and structure described herein provide for adjusting an error correction capability of an LDPC error correction code. For example, the system of one embodiment includes a decoder adapted to decode data that has been encoded with a LDPC error correction code. The system also includes a detector communicatively coupled to the decoder and adapted to estimate bit values in the data prior to decoding by the decoder. The detector is further adapted to change bit values based on bit value estimations to reduce the error correction capability of the LDPC error correction code. The reduction in error correction capability is adjustable such that sector failure rates of storage devices may be incrementally analyzed.
摘要翻译：本文描述的方法和结构提供了用于调整LDPC纠错码的纠错能力。例如，一个实施例的系统包括适于对已经用LDPC纠错码编码的数据进行解码的解码器。该系统还包括通信地耦合到解码器并且适于在解码器解码之前估计数据中的位值的检测器。检测器还适于基于比特值估计改变比特值，以减少LDPC纠错码的纠错能力。误差校正能力的降低是可调节的，从而可以逐渐分析存储设备的扇区故障率。

8. 发明申请

US20100123962A1 SINGLE-PASS DEFECT DETECTION FOR HARD-DISK DRIVE SYSTEMS 有权
标题翻译：硬盘驱动系统的单通道缺陷检测
公开(公告)号：US20100123962A1
公开(公告)日：2010-05-20
申请号：US12272255
申请日：2008-11-17
申请人： Keenan T. O'Brien , Richard Rauschmayer
发明人： Keenan T. O'Brien , Richard Rauschmayer
IPC分类号： G11B27/36
CPC分类号： G11B20/1879 , G11B19/048 , G11B20/10037 , G11B20/10296 , G11B20/10314 , G11B20/1037 , G11B20/10379 , G11B20/10416 , G11B20/10425 , G11B20/1217 , G11B20/182 , G11B20/1833 , G11B2020/1277 , G11B2020/1281 , G11B2020/1287 , G11B2020/1289 , G11B2020/1823 , G11B2020/1826 , G11B2020/1836 , G11B2020/1863 , G11B2020/1896 , G11B2220/2516
摘要： In one embodiment, defects are detected on the face of a hard-disk drive platter. A preamble, a sync mark, user or pseudorandom data, and a data pad are written to every sector on a track of the platter. Inter-sector gaps that separate consecutive sectors are overwritten with a fixed data pattern such that consecutive sectors are in phase lock with one another. After the track has been written, the track is read back and analyzed. Consecutive sectors are analyzed continuously without stopping. The preambles, sync marks, data pads, and overwritten inter-sector gaps are analyzed using suitable flaw-scan techniques. The user or pseudorandom data is analyzed using both data-integrity checks and suitable flaw-scan techniques. This process is repeated for all tracks on the disk, and defect detection is completed when all tracks have been analyzed.
摘要翻译：在一个实施例中，在硬盘驱动器盘的表面上检测到缺陷。前导码，同步标记，用户或伪随机数据以及数据焊盘被写入盘片的轨道上的每个扇区。使用固定数据模式覆盖分开连续扇区的扇区间间隙，使得连续的扇区彼此相位锁定。轨道写入后，回读和分析轨迹。不间断连续分析连续部门。使用合适的缺陷扫描技术分析前导码，同步标记，数据块和覆盖的扇区间间隙。使用数据完整性检查和合适的缺陷扫描技术分析用户或伪随机数据。对磁盘上的所有轨道重复此过程，并且在分析了所有轨道时完成缺陷检测。

9. 发明授权

US07248549B2 System for locking a clock onto the frequency of data recorded on a storage medium 失效
标题翻译：用于将时钟锁定在记录在存储介质上的数据的频率上的系统
公开(公告)号：US07248549B2
公开(公告)日：2007-07-24
申请号：US10903659
申请日：2004-07-30
申请人： Richard Rauschmayer
发明人： Richard Rauschmayer
IPC分类号： G11B27/10
CPC分类号： G11B20/1403 , H03L7/06 , H04L7/0331
摘要： A circuit locks onto a frequency of data encoded on a medium, taking frequency variations in the physical travel of the medium into account. The circuit includes a disk locked clock (DLC) circuit having a synthesizer operating under digital control based on a feedback signal to produce a servo reference clock and a read reference clock that track frequency variations in the physical travel of the medium. A recovered clock signal is produced based on the servo reference clock and the read reference clock. A digital phase locked loop maintains a frequency lock of the recovered clock signal. An error measurement circuit is connected to the digital phase locked loop. The error measurement circuit produces the feedback signal for digitally controlling the digital logic circuit synthesizer to produce the servo reference clock and the read reference clock that track frequency variations in the physical travel of the medium.
摘要翻译：电路锁定在介质上编码的数据的频率，考虑介质的物理行程的频率变化。该电路包括具有合成器的盘锁定时钟（DLC）电路，该合成器基于反馈信号进行数字控制，以产生伺服参考时钟，以及跟踪介质物理行程的频率变化的读取参考时钟。基于伺服参考时钟和读取的参考时钟产生恢复的时钟信号。数字锁相环保持恢复的时钟信号的频率锁定。误差测量电路连接到数字锁相环。误差测量电路产生用于数字控制数字逻辑电路合成器的反馈信号，以产生伺服参考时钟和跟踪介质物理行程中的频率变化的读取参考时钟。

10. 发明授权

US08250434B2 Systems and methods for codec usage control during storage pre-read 有权
标题翻译：存储预读过程中编解码器使用控制的系统和方法
公开(公告)号：US08250434B2
公开(公告)日：2012-08-21
申请号：US12487638
申请日：2009-06-18
申请人： Shaohua Yang , Yuan Xing Lee , Changyou Xu , Richard Rauschmayer , Harley Burger , Kapil Gaba
发明人： Shaohua Yang , Yuan Xing Lee , Changyou Xu , Richard Rauschmayer , Harley Burger , Kapil Gaba
IPC分类号： H03M13/00
CPC分类号： G11B20/10527 , G11B20/10194 , G11B2020/10694 , G11B2020/10805 , G11B2220/2516 , H03M13/1102 , H03M13/2957 , H03M13/6343
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is disclosed that includes an increased iteration enable signal, a first detector circuit, a second detector circuit, and a data decoding circuit. The first detector circuit receives a data set and performs a data detection on the data set to provide a detected data set. The data decoding circuit receives a derivative of the detected data set and performs a decoding process to provide a decoded data set. The decoded data set is provided to the second detector circuit based at least in part on an assertion level of the increased iteration enable signal.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，公开了一种数据处理电路，其包括增加的迭代使能信号，第一检测器电路，第二检测器电路和数据解码电路。第一检测器电路接收数据组并对数据集执行数据检测以提供检测数据集。数据解码电路接收检测数据组的导数，并进行解码处理，提供解码数据组。解码数据集至少部分地基于增加的迭代使能信号的断言电平被提供给第二检测器电路。

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