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1. 发明授权

US08860599B1 Analog-to-digital conversion apparatus and method capable of achieving fast settling 有权
标题翻译：能够实现快速稳定的模数转换装置和方法
公开(公告)号：US08860599B1
公开(公告)日：2014-10-14
申请号：US13911082
申请日：2013-06-06
申请人： Mediatek Inc.
发明人： Yuan-Ching Lien
IPC分类号： H03M1/34
CPC分类号： H03M1/462 , H03M1/001 , H03M1/144 , H03M1/34 , H03M1/466
摘要： A method utilized in an analog-to-digital conversion apparatus, for converting an analog input signal into a digital output signal including a first portion and a second portion, includes: using a comparator circuit to compare the analog input signal with at least one first reference level to generate a preliminary comparison result, the at least one first reference level being used for determining the first portion; estimating the first portion according to the preliminary comparison result; based on the preliminary comparison result, performing the successive approximation procedure to obtain a posterior comparison result according to a plurality of second reference levels, the second reference levels being used for determining the second portion; and, estimating the second portion according to the posterior comparison result. The preliminary and posterior comparison results are generated by the comparator circuit.
摘要翻译：一种用于将模拟输入信号转换成包括第一部分和第二部分的数字输出信号的模拟 - 数字转换装置中使用的方法包括：使用比较器电路将模拟输入信号与至少一个第一参考电平以产生初步比较结果，所述至少一个第一参考电平用于确定所述第一部分; 根据初步比较结果估算第一部分; 基于初步比较结果，执行逐次逼近程序以根据多个第二参考电平获得后验比较结果，第二参考电平用于确定第二部分; 以及根据后验比较结果估计第二部分。初步和后期比较结果由比较器电路产生。

2. 发明授权

US09362914B2 Sampling circuit for sampling signal input and related control method 有权
标题翻译：采样信号输入采样电路及相关控制方法
公开(公告)号：US09362914B2
公开(公告)日：2016-06-07
申请号：US14275896
申请日：2014-05-13
申请人： MEDIATEK INC.
发明人： Yuan-Ching Lien
IPC分类号： G11C27/02 , H03K19/0175 , H03M1/08 , H03M1/12
CPC分类号： H03K19/0175 , G11C27/02 , G11C27/024 , H03M1/0836 , H03M1/121 , H03M1/1225
摘要： A sampling circuit for sampling a signal input includes a signal generation circuit, a sampling switch and a control circuit. The signal generation circuit is arranged for generating a first control signal. The sampling switch has a control node, and is arranged for determining a sampling time of the signal input according to a signal level at the control node. The control circuit is arranged for controlling the signal level at the control node, wherein when the signal level at the control node corresponds to a first level, and before a signal level of the first control signal is changed in order to adjust the signal level at the control node to a second level, the control circuit couples the first control signal to the control node.
摘要翻译：用于对信号输入进行采样的采样电路包括信号发生电路，采样开关和控制电路。信号发生电路被布置用于产生第一控制信号。采样开关具有控制节点，并且被配置为根据控制节点处的信号电平确定信号输入的采样时间。控制电路被布置为控制控制节点处的信号电平，其中当控制节点处的信号电平对应于第一电平时，并且在第一控制信号的信号电平改变之前，以便调整信号电平在控制节点到第二电平，控制电路将第一控制信号耦合到控制节点。

3. 发明申请

US20150333755A1 SAMPLING CIRCUIT FOR SAMPLING SIGNAL INPUT AND RELATED CONTROL METHOD 有权
标题翻译：采样信号采样电路及相关控制方法
公开(公告)号：US20150333755A1
公开(公告)日：2015-11-19
申请号：US14275896
申请日：2014-05-13
申请人： MEDIATEK INC.
发明人： Yuan-Ching Lien
IPC分类号： H03K19/0175
CPC分类号： H03K19/0175 , G11C27/02 , G11C27/024 , H03M1/0836 , H03M1/121 , H03M1/1225
摘要： A sampling circuit for sampling a signal input includes a signal generation circuit, a sampling switch and a control circuit. The signal generation circuit is arranged for generating a first control signal. The sampling switch has a control node, and is arranged for determining a sampling time of the signal input according to a signal level at the control node. The control circuit is arranged for controlling the signal level at the control node, wherein when the signal level at the control node corresponds to a first level, and before a signal level of the first control signal is changed in order to adjust the signal level at the control node to a second level, the control circuit couples the first control signal to the control node.
摘要翻译：用于对信号输入进行采样的采样电路包括信号发生电路，采样开关和控制电路。信号发生电路被布置用于产生第一控制信号。采样开关具有控制节点，并且被配置为根据控制节点处的信号电平确定信号输入的采样时间。控制电路被布置为控制控制节点处的信号电平，其中当控制节点处的信号电平对应于第一电平时，并且在第一控制信号的信号电平改变之前，以便调整信号电平在控制节点到第二电平，控制电路将第一控制信号耦合到控制节点。

4. 发明授权

US09106240B1 Multiplying digital-to-analog converter and pipeline analog-to-digital converter using the same 有权
标题翻译：将数模转换器和流水线模数转换器相乘
公开(公告)号：US09106240B1
公开(公告)日：2015-08-11
申请号：US14508234
申请日：2014-10-07
申请人： MediaTek Inc.
发明人： Yuan-Ching Lien
IPC分类号： H03M1/66 , H03M1/00 , H03M1/06 , H03M1/18 , H03M1/46 , H03M1/70 , H03M1/72
CPC分类号： H03M1/002 , H03M1/468
摘要： A multiplying digital-to-analog converter (MDAC) with high slew rate and a pipeline Analog-to-digital converter using the same. The first set of capacitors for a first input terminal of the operational amplifier (op-amp) includes active capacitors coupling the first input terminal of the op-amp to a first enhanced reference voltage or a common mode terminal in accordance with first digital bits in an amplifying phase of the MDAC, and includes a feedback capacitor coupling the first input terminal of the op-amp to a first output terminal of the op-amp in the amplifying phase. The first set of capacitors contains M capacitor cells. The feedback capacitor between the first set of capacitors contains at most M/(2n) capacitor cells, where n is a number of effective bits provided by a first analog-to-digital converter generating the first digital bits for the active capacitors.
摘要翻译：具有高压摆率的倍增数模转换器（MDAC）和使用该数模转换器的管线模数转换器。用于运算放大器（运算放大器）的第一输入端的第一组电容器包括有源电容器，其根据第一数字位将运算放大器的第一输入端耦合到第一增强参考电压或共模终端 MDAC的放大相位，并且包括将放大器的运算放大器的第一输入端子耦合到运算放大器的第一输出端子的反馈电容器。第一组电容器包含M个电容器单元。第一组电容器之间的反馈电容器包含至多M /（2n）个电容器单元，其中n是由有源电容器产生第一数字位的第一模数转换器提供的有效位数。

5. 发明授权

US09041575B2 Analog-to-digital conversion apparatus and method capable of achieving fast settling 有权
标题翻译：能够实现快速稳定的模数转换装置和方法
公开(公告)号：US09041575B2
公开(公告)日：2015-05-26
申请号：US14480651
申请日：2014-09-09
申请人： MEDIATEK INC.
发明人： Yuan-Ching Lien
IPC分类号： H03M3/00 , H03M1/12 , H03M1/46 , H03M1/34 , H03M1/00
CPC分类号： H03M1/462 , H03M1/001 , H03M1/144 , H03M1/34 , H03M1/466
摘要： A method utilized in an analog-to-digital conversion apparatus, for converting an analog input signal into a digital output signal including a first portion and a second portion, includes: using a comparator circuit to compare the analog input signal with at least one first reference level to generate a preliminary comparison result, the at least one first reference level being used for determining the first portion; estimating the first portion according to the preliminary comparison result; based on the preliminary comparison result, performing the successive approximation procedure to obtain a posterior comparison result according to a plurality of second reference levels, the second reference levels being used for determining the second portion; and, estimating the second portion according to the posterior comparison result. The preliminary and posterior comparison results are generated by the comparator circuit.
摘要翻译：一种用于将模拟输入信号转换成包括第一部分和第二部分的数字输出信号的模拟 - 数字转换装置中使用的方法包括：使用比较器电路将模拟输入信号与至少一个第一参考电平以产生初步比较结果，所述至少一个第一参考电平用于确定所述第一部分; 根据初步比较结果估算第一部分; 基于初步比较结果，执行逐次逼近程序以根据多个第二参考电平获得后验比较结果，第二参考电平用于确定第二部分; 以及根据后验比较结果估计第二部分。初步和后期比较结果由比较器电路产生。

6. 发明申请

US20140375489A1 ANALOG-TO-DIGITAL CONVERSION APPARATUS AND METHOD CAPABLE OF ACHIEVING FAST SETTLING 有权
标题翻译：模拟数字转换装置和可实现快速定位的方法
公开(公告)号：US20140375489A1
公开(公告)日：2014-12-25
申请号：US14480651
申请日：2014-09-09
申请人： MEDIATEK INC.
发明人： Yuan-Ching Lien
IPC分类号： H03M1/46 , H03M1/00
CPC分类号： H03M1/462 , H03M1/001 , H03M1/144 , H03M1/34 , H03M1/466
摘要： A method utilized in an analog-to-digital conversion apparatus, for converting an analog input signal into a digital output signal including a first portion and a second portion, includes: using a comparator circuit to compare the analog input signal with at least one first reference level to generate a preliminary comparison result, the at least one first reference level being used for determining the first portion; estimating the first portion according to the preliminary comparison result; based on the preliminary comparison result, performing the successive approximation procedure to obtain a posterior comparison result according to a plurality of second reference levels, the second reference levels being used for determining the second portion; and, estimating the second portion according to the posterior comparison result. The preliminary and posterior comparison results are generated by the comparator circuit.
摘要翻译：一种用于将模拟输入信号转换成包括第一部分和第二部分的数字输出信号的模拟 - 数字转换装置中使用的方法包括：使用比较器电路将模拟输入信号与至少一个第一参考电平以产生初步比较结果，所述至少一个第一参考电平用于确定所述第一部分; 根据初步比较结果估算第一部分; 基于初步比较结果，执行逐次逼近程序以根据多个第二参考电平获得后验比较结果，第二参考电平用于确定第二部分; 以及根据后验比较结果估计第二部分。初步和后期比较结果由比较器电路产生。

7. 发明授权

US10033420B2 Wireless communication receiver 有权
公开(公告)号：US10033420B2
公开(公告)日：2018-07-24
申请号：US15469690
申请日：2017-03-27
申请人： MEDIATEK Inc.
发明人： Yuan-Ching Lien , Eric Klumperink , Bram Nauta
IPC分类号： H04B1/26 , H04B1/28 , H04B1/10 , H04B1/16 , H03H11/12
摘要： Provided is a wireless communication receiver including an antenna for receiving an RF signal; a first mixer, coupled to the antenna, for performing frequency conversion on the RF signal from the antenna by mixing the RF signal with a local oscillator signal to provide a first intermediate frequency (IF) signal; and a first filter, coupled to the first mixer, configured to pass a predetermined band of frequencies of the first IF signal and to generate a first channel signal. The first filter includes a negative feedback loop coupled to the first mixer for performing negative feedback loop control on the first IF signal; and a positive capacitive feedback loop coupled to the first mixer for performing positive capacitive feedback loop control on the first IF signal, the negative feedback loop and the positive capacitive feedback loop being coupled in parallel.

8. 发明申请

US20170373710A1 WIRELESS COMMUNICATION RECEIVER 审中-公开
公开(公告)号：US20170373710A1
公开(公告)日：2017-12-28
申请号：US15469690
申请日：2017-03-27
申请人： MEDIATEK Inc.
发明人： Yuan-Ching Lien , Eric Klumperink , Bram Nauta
IPC分类号： H04B1/16 , H04B1/10 , H03H11/12
CPC分类号： H04B1/16 , H03H11/1204 , H03H11/126 , H04B1/1018 , H04B1/30
摘要： Provided is a wireless communication receiver including an antenna for receiving an RF signal; a first mixer, coupled to the antenna, for performing frequency conversion on the RF signal from the antenna by mixing the RF signal with a local oscillator signal to provide a first intermediate frequency (IF) signal; and a first filter, coupled to the first mixer, configured to pass a predetermined band of frequencies of the first IF signal and to generate a first channel signal. The first filter includes a negative feedback loop coupled to the first mixer for performing negative feedback loop control on the first IF signal; and a positive capacitive feedback loop coupled to the first mixer for performing positive capacitive feedback loop control on the first IF signal, the negative feedback loop and the positive capacitive feedback loop being coupled in parallel.

9. 发明授权

US09160360B1 Multiplying digital-to-analog converter and pipeline analog-to-digital converter using the same 有权
标题翻译：将数模转换器和流水线模数转换器相乘
公开(公告)号：US09160360B1
公开(公告)日：2015-10-13
申请号：US14508208
申请日：2014-10-07
申请人： MediaTek Inc.
发明人： Yuan-Ching Lien
IPC分类号： H03M1/06 , H03M1/44 , H03M1/00 , H03M1/12
CPC分类号： H03M1/442 , H03M1/00 , H03M1/0697 , H03M1/12 , H03M1/1215 , H03M1/164 , H03M1/468
摘要： A multiplying digital-to-analog converter (MDAC) with capacitive load reset on an operational amplifier and a pipeline analog-to-digital converter using the MDAC are disclosed. The MDAC includes an operational amplifier and first and second switched-capacitor networks sharing the operational amplifier. The operational amplifier is further coupled with first capacitive load cells when the first switched-capacitor network is coupled to the operational amplifier, and the first capacitive load cells are reset when the first switched-capacitor network is disconnected from the operational amplifier. The operational amplifier is further coupled with second capacitive load cells when the second switched-capacitor network is coupled to the operational amplifier, and the second capacitive load cells are reset when the second switched-capacitor network is disconnected from the operational amplifier.
摘要翻译：公开了一种在运算放大器上具有容性负载复位的乘法数模转换器（MDAC）和使用MDAC的流水线模数转换器。 MDAC包括运算放大器和共享运算放大器的第一和第二开关电容网络。当第一开关电容器网络耦合到运算放大器时，运算放大器还与第一电容性负载单元耦合，并且当第一开关电容器网络与运算放大器断开时，第一电容性负载单元被复位。当第二开关电容器网络耦合到运算放大器时，运算放大器还与第二电容性负载单元耦合，并且当第二开关电容器网络与运算放大器断开时，第二电容性负载单元被复位。

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