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    • 1. 发明授权
    • Digital phase locked loop
    • 数字锁相环
    • US08362815B2
    • 2013-01-29
    • US12978221
    • 2010-12-23
    • Nenad PavlovicJozef Reinerus Maria Bergervoet
    • Nenad PavlovicJozef Reinerus Maria Bergervoet
    • H03L7/06
    • H03L7/18H03L7/081H03L7/0991
    • A digital phase locked loop (300) configured to receive a reference clock signal (302) and a channel control word (308), and to generate an output clock signal (304). The digital phase locked loop comprising an adjustable delay component (306) configured to: receive the reference clock signal (302), apply a time delay to the reference clock signal (302) in accordance with a time delay control signal (316); and provide a delayed reference clock signal (318). The digital phase locked loop further comprising a timing component (320) configured to process the delayed reference clock signal (318) and the output clock signal (304), and generate a first control signal (322) representative of the phase of the output clock signal (304); a reference accumulator (310) configured to receive the channel command word (308) and generate: a second control signal (312) representative of the phase of an intended output clock signal; and the time delay control signal (316) such that the delayed reference clock signal (318) is delayed by a period of time representative of a first portion of the phase of the intended output clock signal. The digital phase locked loop also comprising a controller (314) configured to process the first and second control signals (322, 312), and generate a DCO control signal (326) for setting the frequency of a digitally controlled oscillator (328) in accordance with the first and second control signals (322, 312); and a digitally controlled oscillator (328) configured to generate the output clock signal (304) in accordance with the DCO control signal (326).
    • 数字锁相环(300),被配置为接收参考时钟信号(302)和信道控制字(308),并产生输出时钟信号(304)。 数字锁相环包括可调节延迟部件(306),其被配置为:接收参考时钟信号(302),根据时间延迟控制信号(316)对参考时钟信号(302)施加时间延迟; 并提供延迟的参考时钟信号(318)。 数字锁相环还包括被配置为处理延迟的参考时钟信号(318)和输出时钟信号(304)的定时组件(320),并且产生表示输出时钟的相位的第一控制信号(322) 信号(304); 参考累加器(310),被配置为接收所述信道命令字(308)并产生:表示预期输出时钟信号的相位的第二控制信号(312); 和时间延迟控制信号(316),使得延迟的参考时钟信号(318)被延迟表示期望输出时钟信号的相位的第一部分的时间段。 数字锁相环还包括被配置为处理第一和第二控制信号(322,312)的控制器(314),并且产生用于根据数字控制振荡器(328)的频率设置的DCO控制信号(326) 具有第一和第二控制信号(322,312); 和配置成根据DCO控制信号(326)产生输出时钟信号(304)的数控振荡器(328)。
    • 2. 发明授权
    • Electronic circuit frequency generation
    • 电子电路频率发生
    • US08198943B2
    • 2012-06-12
    • US12964396
    • 2010-12-09
    • Remco Cornelis Herman van de BeekJozef Reinerus Maria Bergervoet
    • Remco Cornelis Herman van de BeekJozef Reinerus Maria Bergervoet
    • H03L7/18
    • H04B1/7136H03L7/093H03L7/183H04B2001/71365
    • An oscillation signal with a selectable frequency is generated with a phase locked loop (10, 12, 14). The oscillator (10) of the loop receives a feedback signal, to which an offset is added in order to reduce transient effects when a frequency modification is made. A first and second offset control value are used to control the offset successively. The first offset control value is controlled by a combination of the frequency settings before and after the modification. The second offset control value is controlled by the frequency settings after the modification. The first and second offset control values are used to control an offset of applying to a frequency control signal of an oscillator (10) of the phase locked loop (10, 12, 14). The offset controlled by the first control offset value is applied during a predetermined time interval before the offset controlled by the second control offset value is applied.
    • 利用锁相环(10,12,14)产生具有可选频率的振荡信号。 回路的振荡器(10)接收反馈信号,为了减少进行频率修改时的瞬变效应,添加偏移量。 使用第一和第二偏移控制值来连续地控制偏移。 第一偏移控制值由修改之前和之后的频率设置的组合来控制。 第二偏移控制值由修改后的频率设置控制。 第一和第二偏移控制值用于控制施加到锁相环(10,12,14)的振荡器(10)的频率控制信号的偏移。 在施加由第二控制偏移值控制的偏移之前的预定时间间隔期间,施加由第一控制偏移值控制的偏移。
    • 3. 发明授权
    • Device for ultra wide band frequency generating
    • 超宽带频率发生装置
    • US07567131B2
    • 2009-07-28
    • US11574916
    • 2005-09-05
    • Remco Cornelis Herman Van De BeekDominicus Martinus Wilhelmus LeenaertsGerard Van Der WeideJozef Reinerus Maria Bergervoet
    • Remco Cornelis Herman Van De BeekDominicus Martinus Wilhelmus LeenaertsGerard Van Der WeideJozef Reinerus Maria Bergervoet
    • H03L7/00
    • H03D3/009
    • Devices (1) for exchanging ultra wide band signals comprise frequency translating stages (20,30) for frequency translating signals and oscillating stages (40) for supplying main inphase/quadrature oscillation signals to the frequency translating stages (20,30). By providing the oscillating stages (40) with polyphase filters (43,44) for reducing harmonics in oscillation signals, the main oscillation signals will be sufficiently clean. The oscillating stages (40) comprise mixers (46) for converting first inphase/quadrature oscillation signals and second inphase/quadrature oscillation signals into the main oscillation signals. The polyphase filters (43,44) may be located before and after the mixers (46). Frequency selectors (45) replace prior art multiplexers located after the mixers (46). Such frequency selectors (45) comprise multiplexers (126,127) for supplying the second inphase/quadrature oscillation signals, with a combination of these second oscillation signals corresponding with a positive frequency, a negative frequency or a zero frequency, and comprise coders (125) for controlling the multiplexers (126,127).
    • 用于交换超宽带信号的装置(1)包括用于频率转换信号的频率转换级(20,30)和用于将主相位/正交振荡信号提供给频率转换级(20,30)的振荡级(40)。 通过为振荡级(40)提供多相滤波器(43,44)以减少振荡信号中的谐波,主振荡信号将足够清洁。 振荡级(40)包括用于将第一同相/正交振荡信号和第二同相/正交振荡信号转换成主振荡信号的混频器(46)。 多相过滤器(43,44)可以位于混合器(46)之前和之后。 频率选择器(45)代替位于混频器(46)之后的现有技术的多路复用器。 这种频率选择器(45)包括用于提供第二同相/正交振荡信号的多路复用器(126,127)以及与正频率,负频率或零频率对应的这些第二振荡信号的组合,并且包括编码器(125),用于 控制多路复用器(126,127)。
    • 4. 发明授权
    • Wide band transceiver and data receiving method using a tunable notch filter and pre-estimated optimal notch filter parameters
    • 宽带收发器和数据接收方法使用可调陷波滤波器和预估最佳陷波滤波器参数
    • US08374210B2
    • 2013-02-12
    • US13058565
    • 2009-08-06
    • Ajay KapoorMaurice StassenJozef Reinerus Maria BergervoetHarish Kundur Subramaniyan
    • Ajay KapoorMaurice StassenJozef Reinerus Maria BergervoetHarish Kundur Subramaniyan
    • H04B1/00
    • H04L27/2601H04B1/1036
    • Data is received with a transceiver circuit with a receiver branch (14) that comprises a notch filter (140) and a digital Fourier transformer (146). Furthermore the transceiver circuit has a transmitter branch (16) comprising an inverse digital Fourier transformer (160). Prior to reception the transceiver circuit is switched to a calibration mode, wherein an output of the transmitter branch (16) is coupled to an input of the notch filter (140). The inverse digital Fourier transformer (160) of the transmitter is used to compute an inverse transform of a spectrum with a frequency component at a selected position. A signal derived from the inverse transform is applied to an input of the notch filter (140) in the calibration mode. The digital Fourier transformer (146) is used to Fourier transform an output signal of the notch filter (140). A control setting of the notch filter to suppress the frequency component from an output of the digital Fourier transformer (146) is determined. A parameter derived from said control setting is stored in a memory (149a). After the transceiver circuit is switched to a reception mode, a received interfering signal and an interference frequency of the received interfering signal are detected. The stored parameter to translate the detected interference frequency into a control setting of the notch filter (140).
    • 用具有包括陷波滤波器(140)和数字付里叶变换器(146)的接收器支路(14)的收发器电路接收数据。 此外,收发器电路具有包括逆数字傅立叶变换器(160)的发射机分支(16)。 在接收之前,收发器电路被切换到校准模式,其中发射器支路(16)的输出耦合到陷波滤波器(140)的输入端。 发射机的逆数字傅里叶变换器(160)用于计算在选定位置具有频率分量的频谱的逆变换。 在校准模式中,将从逆变换得到的信号应用于陷波滤波器(140)的输入端。 数字傅立叶变换器(146)用于傅里叶变换陷波滤波器(140)的输出信号。 确定用于抑制来自数字付里叶变换器(146)的输出的频率分量的陷波滤波器的控制设置。 从所述控制设置导出的参数被存储在存储器(149a)中。 在收发器电路切换到接收模式之后,检测接收到的干扰信号和接收到的干扰信号的干扰频率。 所存储的参数将检测到的干扰频率转换成陷波滤波器(140)的控制设置。
    • 5. 发明申请
    • FREQUENCY HOPPING RECEIVER CIRCUIT
    • 频率接收接收机电路
    • US20110150043A1
    • 2011-06-23
    • US13060694
    • 2009-08-18
    • Jozef Reinerus Maria BergervoetHarish Kundur SubramaniyanRemco Cornelis Herman Van De Beek
    • Jozef Reinerus Maria BergervoetHarish Kundur SubramaniyanRemco Cornelis Herman Van De Beek
    • H04B1/00
    • H03G3/3052H03G3/3068H04B1/715H04B2001/7152
    • A frequency hopping receiver circuit has a frequency converter (12) and a hopping control circuit (14) coupled to the frequency converter (12), and configured to control frequency hopping of the received frequency, by controlling changes in frequency shift applied by the frequency converter (12). The frequency change is applied in combination with a temporary reduction in conversion gain of the frequency converter (12) during the change in frequency shift. The frequency converter may contain a mixer (122), a local oscillator circuit (120) and a controllable amplifier (124) coupled between the input of the frequency converter (12) and the mixer (122) or between the mixer (122) and the output of the frequency converter (12), or between the local oscillator circuit (120) and the local oscillator input of the mixer (122). In this case the hopping control circuit (14) has outputs coupled to a gain control input of the controllable amplifier (124) and a frequency control input of the local oscillator circuit (120), to control the reduction in conversion gain and the change in frequency shift respectively.
    • 跳频接收机电路具有频率转换器(12)和耦合到变频器(12)的跳频控制电路(14),用于通过控制频率施加的频移的变化来控制接收频率的跳频 转换器(12)。 频率变化与频移变化期间的频率转换器(12)的转换增益的暂时降低一起应用。 变频器可以包括混频器(122),本地振荡器电路(120)和耦合在变频器(12)的输入端和混频器(122)之间或混频器(122)和 变频器(12)的输出,或本地振荡器电路(120)和混频器(122)的本地振荡器输入之间。 在这种情况下,跳频控制电路(14)具有耦合到可控放大器(124)的增益控制输入和本地振荡器电路(120)的频率控制输入的输出,以控制转换增益的降低和 频移。
    • 7. 发明授权
    • Frequency hopping receiver circuit
    • 跳频接收机电路
    • US08737449B2
    • 2014-05-27
    • US13060694
    • 2009-08-18
    • Jozef Reinerus Maria BergervoetHarish Kundur SubramaniyanRemco Cornelis Herman Van De Beek
    • Jozef Reinerus Maria BergervoetHarish Kundur SubramaniyanRemco Cornelis Herman Van De Beek
    • H04B1/00
    • H03G3/3052H03G3/3068H04B1/715H04B2001/7152
    • A frequency hopping receiver circuit has a frequency converter (12) and a hopping control circuit (14) coupled to the frequency converter (12), and configured to control frequency hopping of the received frequency, by controlling changes in frequency shift applied by the frequency converter (12). The frequency change is applied in combination with a temporary reduction in conversion gain of the frequency converter (12) during the change in frequency shift. The frequency converter may contain a mixer (122), a local oscillator circuit (120) and a controllable amplifier (124) coupled between the input of the frequency converter (12) and the mixer (122) or between the mixer (122) and the output of the frequency converter (12), or between the local oscillator circuit (120) and the local oscillator input of the mixer (122). In this case the hopping control circuit (14) has outputs coupled to a gain control input of the controllable amplifier (124) and a frequency control input of the local oscillator circuit (120), to control the reduction in conversion gain and the change in frequency shift respectively.
    • 跳频接收机电路具有频率转换器(12)和耦合到变频器(12)的跳频控制电路(14),用于通过控制频率施加的频移的变化来控制接收频率的跳频 转换器(12)。 频率变化与频移变化期间的频率转换器(12)的转换增益的暂时降低一起应用。 变频器可以包括混频器(122),本地振荡器电路(120)和耦合在变频器(12)的输入端和混频器(122)之间或混频器(122)和 变频器(12)的输出,或本地振荡器电路(120)和混频器(122)的本地振荡器输入之间。 在这种情况下,跳频控制电路(14)具有耦合到可控放大器(124)的增益控制输入和本地振荡器电路(120)的频率控制输入的输出,以控制转换增益的降低和 频移。
    • 8. 发明申请
    • WIDE BAND TRANSCEIVER AND DATA RECEIVING METHOD USING A TUNABLE NOTCH FILTER AND PRE-ESTIMATED OPTIMAL NOTCH FILTER PARAMETERS
    • 宽带收发器和数据接收方法使用可调节插槽滤波器和预先估计的最佳插槽滤波器参数
    • US20110206100A1
    • 2011-08-25
    • US13058565
    • 2009-08-06
    • Ajay KapoorMaurice StassenJozef Reinerus Maria BergervoetHarish Kundur Subramaniyan
    • Ajay KapoorMaurice StassenJozef Reinerus Maria BergervoetHarish Kundur Subramaniyan
    • H04B1/38H04L27/06
    • H04L27/2601H04B1/1036
    • Data is received with a transceiver circuit with a receiver branch (14) that comprises a notch filter (140) and a digital Fourier transformer (146). Furthermore the transceiver circuit has a transmitter branch (16) comprising an inverse digital Fourier transformer (160). Prior to reception the transceiver circuit is switched to a calibration mode, wherein an output of the transmitter branch (16) is coupled to an input of the notch filter (140). The inverse digital Fourier transformer (160) of the transmitter is used to compute an inverse transform of a spectrum with a frequency component at a selected position. A signal derived from the inverse transform is applied to an input of the notch filter (140) in the calibration mode. The digital Fourier transformer (146) is used to Fourier transform an output signal of the notch filter (140). A control setting of the notch filter to suppress the frequency component from an output of the digital Fourier transformer (146) is determined. A parameter derived from said control setting is stored in a memory (149a). After the transceiver circuit is switched to a reception mode, a received interfering signal and an interference frequency of the received interfering signal are detected. The stored parameter to translate the detected interference frequency into a control setting of the notch filter (140).
    • 用具有包括陷波滤波器(140)和数字付里叶变换器(146)的接收器支路(14)的收发器电路接收数据。 此外,收发器电路具有包括逆数字傅立叶变换器(160)的发射机分支(16)。 在接收之前,收发器电路被切换到校准模式,其中发射器支路(16)的输出耦合到陷波滤波器(140)的输入端。 发射机的逆数字傅里叶变换器(160)用于计算在选定位置具有频率分量的频谱的逆变换。 在校准模式中,将从逆变换得到的信号应用于陷波滤波器(140)的输入端。 数字傅立叶变换器(146)用于傅里叶变换陷波滤波器(140)的输出信号。 确定用于抑制来自数字付里叶变换器(146)的输出的频率分量的陷波滤波器的控制设置。 从所述控制设置导出的参数被存储在存储器(149a)中。 在收发器电路切换到接收模式之后,检测接收到的干扰信号和接收到的干扰信号的干扰频率。 所存储的参数将检测到的干扰频率转换成陷波滤波器(140)的控制设置。
    • 10. 发明申请
    • Parasitic elements diversity antenna
    • 寄生元件分集天线
    • US20050064824A1
    • 2005-03-24
    • US10497338
    • 2002-11-26
    • Jozef Reinerus Maria BergervoetWilhelmus DolmansLukas Leyten
    • Jozef Reinerus Maria BergervoetWilhelmus DolmansLukas Leyten
    • H01Q21/28H01Q3/24H01Q21/29H04B7/06H04B7/08H04B1/02
    • H04B7/0802H01Q3/24H01Q21/29H04B7/0602
    • The invention relates to an antenna diversity comprising a first and a second antenna element one of which is operated in an active mode whereas the other one of which is operated in a parasitic mode. It is the object of the present invention to further minimize the amount of mismatch by still being able to maximize a predetermined signal quality criterion for the electromagnetic signal on the active path between the active antenna and the transceiver. This object is solved by a switching unit 120 for either operating the first antenna element in the parasitic mode and simultaneously operating the second antenna element in the active mode or vice versa and by providing a pre-selection unit 130 as well as a selection unit 140 for selecting an optimal configuration for the antenna diversity ensuring that the amount of said mismatch is below a predetermined threshold value and that simultaneously a predetermined quality criterion for the transceived electromagnetic signal is fulfilled best. The antenna diversity further comprises a control unit 150 for adjusting said selected configuration. The invention further relates to a method for operating such an antenna diversity.
    • 本发明涉及一种包括第一和第二天线元件的天线分集,其中一个天线元件以有源模式工作,而另一个以寄生模式工作。 本发明的目的是通过仍然能够使有源天线和收发器之间的有源路径上的电磁信号的预定信号质量标准最大化来进一步最小化失配量。 该目的由切换单元120解决,用于以寄生模式操作第一天线元件,并且以活动模式或反之亦然地操作第二天线元件,并且通过提供预选单元130以及选择单元140 用于选择用于天线分集的最佳配置,确保所述不匹配的量低于预定阈值,并且最好地满足用于收发的电磁信号的预定质量标准。 天线分集还包括用于调整所选择的配置的控制单元150。 本发明还涉及一种用于操作这种天线分集的方法。