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1. 发明申请

US20150280668A1 CAPACITIVE PROGRAMMABLE GAIN AMPLIFIER 有权
标题翻译：电容可编程增益放大器
公开(公告)号：US20150280668A1
公开(公告)日：2015-10-01
申请号：US14242285
申请日：2014-04-01
申请人： QUALCOMM Incorporated
发明人： Wenchang Huang , Peter Jivan Shah , Meysam Azin , Arash Mehrabi
IPC分类号： H03G3/00 , H03F3/45 , H03F3/00
CPC分类号： H03G3/008 , H03F3/45475 , H03F2200/129 , H03F2200/267 , H03F2203/45118 , H03F2203/45156 , H03F2203/45514 , H03G1/0088 , H03G3/001
摘要： An apparatus includes an operational amplifier and a plurality of capacitors coupled to an input terminal of the operational amplifier and configured to be selectively coupled to receive one of an input voltage signal and an output voltage signal of the operational amplifier.
摘要翻译：一种装置包括运算放大器和耦合到运算放大器的输入端的多个电容器，并被配置为选择性地耦合以接收运算放大器的输入电压信号和输出电压信号中的一个。

2. 发明申请

US20150002228A1 AMPLIFIER WITH IMPROVED NOISE REDUCTION 有权
标题翻译：具有改进噪声降噪功能的放大器
公开(公告)号：US20150002228A1
公开(公告)日：2015-01-01
申请号：US14078050
申请日：2013-11-12
申请人： QUALCOMM Incorporated
发明人： Wenchang Huang , Vijayakumar Dhanasekaran
IPC分类号： H03F1/30
CPC分类号： H03F1/305 , H03F3/187 , H03F3/3022 , H03F3/72 , H03F2200/03 , H03F2200/381 , H03F2200/411 , H03F2200/453 , H03F2200/456 , H03F2203/45136 , H03F2203/7236 , H03G3/348
摘要： An amplifier with improved noise reduction is disclosed. In an exemplary embodiment, an apparatus includes at least one capacitor configured to receive an adjustable current and generate a corresponding ramp voltage configured to control coupling between a main amplifier output and a secondary amplifier output. The apparatus also includes at least one comparator configured to adjust the adjustable current to generate the ramp voltage with selected ramp-up or ramp-down voltage characteristics.
摘要翻译：公开了一种具有改进的降噪功能的放大器。在示例性实施例中，一种装置包括至少一个电容器，其配置成接收可调电流并产生相应的斜坡电压，该斜坡电压被配置为控制主放大器输出和辅助放大器输出之间的耦合。该装置还包括至少一个比较器，配置成调整可调电流以产生具有选定的斜升或斜降电压特性的斜坡电压。

3. 发明授权

US09225294B2 Amplifier with improved noise reduction 有权
标题翻译：具有改善降噪功能的放大器
公开(公告)号：US09225294B2
公开(公告)日：2015-12-29
申请号：US14078050
申请日：2013-11-12
申请人： QUALCOMM Incorporated
发明人： Wenchang Huang , Vijayakumar Dhanasekaran
IPC分类号： H03F1/14 , H03F1/30 , H03F3/187 , H03F3/30 , H03F3/72
CPC分类号： H03F1/305 , H03F3/187 , H03F3/3022 , H03F3/72 , H03F2200/03 , H03F2200/381 , H03F2200/411 , H03F2200/453 , H03F2200/456 , H03F2203/45136 , H03F2203/7236 , H03G3/348
摘要： An amplifier with improved noise reduction is disclosed. In an exemplary embodiment, an apparatus includes at least one capacitor configured to receive an adjustable current and generate a corresponding ramp voltage configured to control coupling between a main amplifier output and a secondary amplifier output. The apparatus also includes at least one comparator configured to adjust the adjustable current to generate the ramp voltage with selected ramp-up or ramp-down voltage characteristics.
摘要翻译：公开了一种具有改进的降噪功能的放大器。在示例性实施例中，一种装置包括至少一个电容器，其配置成接收可调电流并产生相应的斜坡电压，该斜坡电压被配置为控制主放大器输出和辅助放大器输出之间的耦合。该装置还包括至少一个比较器，配置成调整可调电流以产生具有选定的斜升或斜降电压特性的斜坡电压。

4. 发明授权

US09419639B1 Low distortion sample and hold switch 有权
标题翻译：低失真采样保持开关
公开(公告)号：US09419639B1
公开(公告)日：2016-08-16
申请号：US14973437
申请日：2015-12-17
申请人： QUALCOMM Incorporated
发明人： Weibo Hu , Wenchang Huang
IPC分类号： H03M1/00 , H03M1/12
CPC分类号： H03M1/1245 , G11C27/024 , G11C27/026
摘要： Devices and methods for analog to digital conversion are provided. The device can have a supply voltage coupled to a bootstrap circuit operable to provide a boosted voltage during a first period defined by a sample phase (Ps) signal and a hold phase (Ph) signal. The device can also have a sampling circuit having an input node and operable to sample an input signal supplied to the input node. The device can also have a switching circuit having a first switch and a second switch. The switching circuit can be coupled to the bootstrap circuit and to the sampling circuit. The switching circuit can be configured to isolate the input node from shorting currents to the supply voltage for a portion of the first period.
摘要翻译：提供了模数转换的设备和方法。该装置可以具有耦合到自举电路的电源电压，该自举电路可操作以在由采样相位（Ps）信号和保持相位（Ph）信号定义的第一周期期间提供升压电压。该装置还可以具有具有输入节点的采样电路，并可操作以对提供给输入节点的输入信号进行采样。该装置还可以具有具有第一开关和第二开关的开关电路。开关电路可以耦合到自举电路和采样电路。开关电路可以被配置为在第一周期的一部分期间将输入节点与短路电流隔离到电源电压。

5. 发明申请

US20150304137A1 TRANSMISSION GATE FOR BIAS VOLTAGE GENERATION 审中-公开
标题翻译：用于偏置电压发生的变速箱
公开(公告)号：US20150304137A1
公开(公告)日：2015-10-22
申请号：US14257425
申请日：2014-04-21
申请人： QUALCOMM Incorporated
发明人： Meysam Azin , Wenchang Huang , Le Wang
IPC分类号： H04L25/08 , H04L27/04
CPC分类号： H04L25/0276 , H03F3/245 , H03F3/45475 , H03F2203/45514 , H03K5/2481 , H03K17/063 , H04L25/0272
摘要： An apparatus includes a transmission gate configured to generate a signal based on a first differential input signal and a second differential input signal. The apparatus further includes biasing circuitry responsive to the transmission gate and configured to output a bias voltage based on the signal.
摘要翻译：一种装置包括：传输门，被配置为基于第一差分输入信号和第二差分输入信号产生信号。该装置还包括响应于传输门并被配置为基于该信号输出偏置电压的偏置电路。

6. 发明申请

US20170054425A1 COMMON-MODE COMPENSATION TECHNIQUE FOR PROGRAMMABLE GAIN AMPLIFIERS 审中-公开
标题翻译：可编程增益放大器的共模补偿技术
公开(公告)号：US20170054425A1
公开(公告)日：2017-02-23
申请号：US14982612
申请日：2015-12-29
申请人： QUALCOMM Incorporated
发明人： Srinidhi Koushik Kanagal Ramesh , Wenchang Huang , Meysam Azin
IPC分类号： H03G3/30 , H03F3/185
CPC分类号： H03G3/3005 , H03F1/0272 , H03F1/48 , H03F3/185 , H03F3/3011 , H03F3/45475 , H03F3/45941 , H03F2200/03 , H03F2200/36 , H03F2203/30031 , H03F2203/45074 , H03F2203/45082 , H03F2203/45418 , H03F2203/45424 , H03F2203/45434 , H03F2203/45512 , H03F2203/45528 , H03F2203/45534 , H03F2203/45536 , H03F2203/45544 , H03G3/001 , H03G5/28
摘要： Certain aspects of the present disclosure provide methods and apparatus for adjusting a bandwidth of an amplifier (e.g., a programmable gain amplifier (PGA)). In certain aspects, the PGA generally includes at least one amplification stage having an input and an output, a plurality of compensation capacitors, and at least one first switch configured to selectively couple at least one capacitor of the plurality of compensation capacitors between the input and the output of the at least one amplification stage. In certain aspects, the amplifier includes at least one second switch configured to selectively couple the at least one capacitor to a node such that the at least one capacitor is coupled to only one of the output or the node, where a voltage at the node is a differential mode (DM) reference potential for the amplification stage.
摘要翻译：本公开的某些方面提供了用于调整放大器（例如，可编程增益放大器（PGA））的带宽的方法和装置。在某些方面，PGA通常包括具有输入和输出的至少一个放大级，多个补偿电容器以及至少一个第一开关，其被配置为选择性地将多个补偿电容器中的至少一个电容器耦合在输入和所述至少一个放大级的输出。在某些方面，放大器包括至少一个第二开关，其被配置为选择性地将至少一个电容器耦合到节点，使得至少一个电容器仅耦合到输出或节点中的一个，其中节点处的电压为用于放大级的差分模式（DM）参考电位。

7. 发明授权

US09391569B2 Multi-stage switched-capacitor DC blocking circuit for audio frontend 有权
标题翻译：用于音频前端的多级开关电容器直流阻塞电路
公开(公告)号：US09391569B2
公开(公告)日：2016-07-12
申请号：US14230909
申请日：2014-03-31
申请人： QUALCOMM Incorporated
发明人： Meysam Azin , Arash Mehrabi , Wenchang Huang
IPC分类号： H03F1/02 , H03F3/185 , H03F3/45 , H03F3/00 , H03F3/181 , H03F3/187 , H03H19/00 , H04R3/00
CPC分类号： H03F3/185 , H03F3/005 , H03F3/181 , H03F3/187 , H03F3/45179 , H03F3/45183 , H03F2200/03 , H03F2203/45016 , H03F2203/45514 , H03H19/004 , H04R3/00
摘要： An integrated DC blocking amplifier circuit, including: an operational amplifier configured in a differential amplifier; and at least first and second two-stage switched-capacitor circuits, each two stage switched-capacitor circuit including a first-stage circuit and a second-stage circuit, wherein the first two-stage switched capacitor circuit is connected to a positive side feedback path of the operational amplifier and the second two-stage switched capacitor circuit is connected to a negative side feedback path of the operational amplifier, wherein the first-stage circuit is switched at a relatively low switching frequency, while the second-stage circuit is switched at a relatively high switching frequency.
摘要翻译：一种集成的DC阻塞放大器电路，包括：配置在差分放大器中的运算放大器; 以及至少第一和第二两级开关电容器电路，每个两级开关电容器电路包括第一级电路和第二级电路，其中所述第一两级开关电容器电路连接到正侧反馈运算放大器和第二两级开关电容电路的路径连接到运算放大器的负侧反馈路径，其中第一级电路以相对低的开关频率切换，而第二级电路被切换在相对高的开关频率。

8. 发明申请

US20170040952A1 CIRCUITS AND METHODS PROVIDING AMPLIFICATION WITH INPUT COMMON MODE VOLTAGE FOLLOWING 审中-公开
标题翻译：具有输入公共模式电压放大的电路和方法以下
公开(公告)号：US20170040952A1
公开(公告)日：2017-02-09
申请号：US14816622
申请日：2015-08-03
申请人： QUALCOMM Incorporated
发明人： Zongyu Dong , Matthew David Sienko , Vijayakumar Dhanasekaran , Mayur Kantharaj Siddanna , Wenchang Huang
IPC分类号： H03F1/32 , H03F3/45
CPC分类号： H03F1/3211 , H03F3/45 , H03F3/45237 , H03F3/45479 , H03F3/4565 , H03F2200/372 , H03F2203/45022 , H03F2203/45072 , H03F2203/45112
摘要： Methods, systems, and circuits for providing low-noise amplification with input common mode voltage following are disclosed. A circuit includes: an amplifier configured to receive a voltage input having an input common mode voltage and configured to generate a differential voltage output having an output common mode voltage; a feedback circuit in communication with the amplifier, the feedback circuit configured to receive the input common mode voltage and the differential voltage output and to generate a feedback voltage in response to the input common mode voltage and the differential voltage output; and an adjustable current source of the amplifier configured to receive the feedback voltage and to adjust a tail current of the amplifier in response to the feedback voltage.
摘要翻译：公开了用于提供具有输入共模电压跟随的低噪声放大的方法，系统和电路。电路包括：放大器，被配置为接收具有输入共模电压的电压输入并被配置为产生具有输出共模电压的差分电压输出; 与所述放大器通信的反馈电路，所述反馈电路被配置为接收所述输入共模电压和所述差分电压输出，并且响应于所述输入共模电压和所述差分电压输出而产生反馈电压; 以及放大器的可调电流源，被配置为接收反馈电压并且响应于反馈电压来调节放大器的尾电流。

9. 发明授权

US09558845B2 Sampling network and clocking scheme for a switched-capacitor integrator 有权
标题翻译：开关电容积分器的采样网络和时钟方案
公开(公告)号：US09558845B2
公开(公告)日：2017-01-31
申请号：US14700696
申请日：2015-04-30
申请人： QUALCOMM Incorporated
发明人： Wenchang Huang , Ramkumar Sivakumar
IPC分类号： G06F7/64 , G06G7/18 , G06G7/19 , G11C27/02 , H03H19/00
CPC分类号： G11C27/026 , H03H19/004 , H03M3/342
摘要： Certain aspects of the present disclosure generally relate to a sampling network of a switched-capacitor integrator and a clocking scheme associated therewith, which may be used in an analog-to-digital converter (ADC), for example. The integrator generally includes five sets of switches which allow for a decreased switching frequency (e.g., halved) at an input stage of the integrator compared to conventional double sampling networks. As a result, the input impedance of the integrator may be increased (e.g., doubled), resulting in lower power consumption and reduced strain on driving circuitry.
摘要翻译：本公开的某些方面通常涉及开关电容积分器的采样网络和与其相关联的时钟方案，其可以例如在模数转换器（ADC）中使用。积分器通常包括五组开关，其允许与常规双采样网络相比在积分器的输入级降低开关频率（例如，减半）。结果，积分器的输入阻抗可以增加（例如，加倍），导致较低的功率消耗和减小的驱动电路的应变。

10. 发明授权

US09438192B2 Capacitive programmable gain amplifier 有权
标题翻译：电容式可编程增益放大器
公开(公告)号：US09438192B2
公开(公告)日：2016-09-06
申请号：US14242285
申请日：2014-04-01
申请人： QUALCOMM Incorporated
发明人： Wenchang Huang , Peter Jivan Shah , Meysam Azin , Arash Mehrabi
IPC分类号： H03F1/02 , H03G3/00 , H03G1/00 , H03F3/45
CPC分类号： H03G3/008 , H03F3/45475 , H03F2200/129 , H03F2200/267 , H03F2203/45118 , H03F2203/45156 , H03F2203/45514 , H03G1/0088 , H03G3/001
摘要： An apparatus includes an operational amplifier and a plurality of capacitors coupled to an input terminal of the operational amplifier and configured to be selectively coupled to receive one of an input voltage signal and an output voltage signal of the operational amplifier.
摘要翻译：一种装置包括运算放大器和耦合到运算放大器的输入端的多个电容器，并被配置为选择性地耦合以接收运算放大器的输入电压信号和输出电压信号中的一个。

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