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    • 1. 发明授权
    • Apparatus and method for synthesizing and generating an SSC modulated signal
    • 用于合成和产生SSC调制信号的装置和方法
    • US08165184B2
    • 2012-04-24
    • US12321379
    • 2009-01-17
    • Ramachandra CvMark L. GuentherJohn C. Calvin
    • Ramachandra CvMark L. GuentherJohn C. Calvin
    • H04B1/00
    • H04B1/69
    • An Arbitrary Waveform Generator (AWG) synthesizes and generates an SSC modulated signal by generating a modulating waveform with a frequency of an SSC modulation frequency, calculating the number of samples per data bit (SPUI) as a ratio of an upsampling frequency to a data rate of a data stream, calculating an amplification factor as the ratio of SSC deviation frequency to data rate of the data stream, generating the array of SSC Edges containing the edge variation with respect to single sample per bit, multiplying the amplification factor to the modulating waveform, generating an array of SSC Edges Upsampled, containing edge variations with respect to an Upsample factor per bit, and multiplying SSC Edges with SPUI; calculating the resultant bit duration SSC Bit Duration as the sum of SSC Edges Upsampled and SPU, and calculating the successive summation of SSC Bit Duration, to get SSC Bit Position.
    • 任意波形发生器(AWG)通过产生具有SSC调制频率的频率的调制波形来合成并产生SSC调制信号,将每个数据比特的采样数(SPUI)计算为上采样频率与数据速率的比率 计算一个放大系数作为数据流的SSC偏差频率与数据速率的比率,生成包含相对于每个单个样本的边缘变化的SSC边缘阵列,将放大系数乘以调制波形 产生一个SSC Edges的上行阵列,其中包含相对于每位Upsample因子的边缘变化,并将SSC边与SPUI相乘; 计算结果位持续时间SSC位持续时间作为上升采样和SPU的SSC边的和,并计算SSC位持续时间的连续求和,以获得SSC位位置。
    • 3. 发明授权
    • Oscilloscope having advanced triggering capability
    • 示波器具有先进的触发能力
    • US07191079B2
    • 2007-03-13
    • US11089883
    • 2005-03-23
    • Patrick A. SmithQue Thuy TranJohn C. DelacyDaniel G. KnierimDavid L. KellyJohn C. Calvin
    • Patrick A. SmithQue Thuy TranJohn C. DelacyDaniel G. KnierimDavid L. KellyJohn C. Calvin
    • G01R13/00
    • G01R13/32G01R13/0254
    • An advanced trigger circuit includes two trigger decoders, each triggering on one of respective pluralities of continuous-time trigger events. In one embodiment, a programmable timer begins timing in response to an output signal of the first trigger decoder and generates an end-of-time signal at the expiration of its time period. A reset circuit resets the first trigger decoder if the second selected continuous-time trigger event failed to occur before the end-of-time signal was generated. In another embodiment, a reset decoder generates a reset signal in response to an occurrence of a selected continuous-time trigger event. The reset circuit is responsive to the reset signal for resetting the first trigger decoder if the second selected continuous-time trigger event failed to occur before the reset signal was generated. In other embodiments, the advanced trigger circuit triggers on a serial lane skew violation or on a beacon width violation.
    • 高级触发电路包括两个触发解码器,每个触发解码器在相应的多个连续时间触发事件之一上触发。 在一个实施例中,可编程定时器响应于第一触发解码器的输出信号开始定时,并且在其时间段期满时产生结束时间信号。 如果在生成结束时间信号之前第二次选择的连续时间触发事件不能发生,则复位电路复位第一触发解码器。 在另一个实施例中,复位解码器响应于所选择的连续时间触发事件的发生而产生复位信号。 如果在产生复位信号之前第二选择的连续时间触发事件不能发生,则复位电路响应于复位信号来复位第一触发解码器。 在其他实施例中,高级触发电路在串行通道偏斜违规或信标宽度冲突时触发。
    • 4. 发明授权
    • Transport delay and jitter measurements
    • 传输延迟和抖动测量
    • US07912117B2
    • 2011-03-22
    • US11529856
    • 2006-09-28
    • Kan TanJohn C. CalvinKalev Sepp
    • Kan TanJohn C. CalvinKalev Sepp
    • H04B3/46
    • H04L1/205G01R29/26G01R31/31709
    • A method of measuring transport delay and jitter with a realtime oscilloscope using cross-correlation acquires waveforms from two test points in a system under test. Clock recovery is run on both waveforms to obtain respective rates and offsets. A time offset between the two waveforms is computed. The jitter from the two test points is filtered and a mean-removed cross-correlation coefficient is computed from the filtered jitters. A fractional delay is computed using interpolation based on LMS error, and the respective computational components are summed to compute a transport delay between the two test points. The transport delay may be used to adjust clock edges from one waveform for comparison with data transition edges of the other waveform to measure jitter.
    • 使用互相关的实时示波器测量传输延迟和抖动的方法从被测系统的两个测试点获取波形。 在两个波形上运行时钟恢复以获得相应的速率和偏移量。 计算两个波形之间的时间偏移。 对两个测试点的抖动进行滤波,并从滤波的抖动中计算平均去除的互相关系数。 使用基于LMS误差的插值计算分数延迟,并将相应的计算组件相加以计算两个测试点之间的传输延迟。 传输延迟可用于从一个波形调整时钟边沿,以便与其他波形的数据转换边沿进行比较,以测量抖动。
    • 6. 发明申请
    • Apparatus and Method for Generating a Waveform Test Signal Having Crest Factor Emulation of Random Jitter
    • 用于产生具有随机抖动的峰值因数仿真的波形测试信号的装置和方法
    • US20110235694A1
    • 2011-09-29
    • US12973709
    • 2010-12-20
    • Ransom W. StephensMuralidharan KarapattuSampathkumar R. DesaiJohn C. Calvin
    • Ransom W. StephensMuralidharan KarapattuSampathkumar R. DesaiJohn C. Calvin
    • H04B17/00
    • G01R31/31709
    • A signal generating device has a display and a central processing unit for setting parameters for a serial data pattern and parameters for deterministic and random jitter impairments, and a displacement crest factor emulation impairment to be applied to the serial data pattern. A waveform record file is generated using the serial data pattern parameters, the impairment parameters for the deterministic jitter and random jitter, and the displacement crest factor emulation impairment. The displacement crest factor emulation impairment is selectively positioned in the impaired serial data pattern. A waveform generation circuit receives the waveform record file and generates an impaired serial data pattern analog output signal based on the serial data pattern, deterministic and random jitter impairments, and the displacement crest factor emulation impairment with the displacement crest factor emulation impairment being selectively positioned in the impaired serial data pattern analog output signal.
    • 信号发生装置具有显示器和中央处理单元,用于设置用于串行数据模式的参数和用于确定性和随机抖动损伤的参数,以及应用于串行数据模式的位移波峰因数仿真损害。 使用串行数据模式参数生成波形记录文件,确定性抖动和随机抖动的损伤参数以及位移波峰因数仿真损伤。 位移波峰因数仿真损伤有选择地位于受损的串行数据模式中。 波形发生电路接收波形记录文件,并基于串行数据模式,确定性和随机抖动损伤产生受损的串行数据模式模拟输出信号,并且位移波峰因数仿真损伤被选择性地定位在 受损的串行数据模式模拟输出信号。
    • 7. 发明申请
    • Transport delay and jitter measurements
    • 传输延迟和抖动测量
    • US20080080605A1
    • 2008-04-03
    • US11529856
    • 2006-09-28
    • Kan TanJohn C. CalvinKalev Sepp
    • Kan TanJohn C. CalvinKalev Sepp
    • H04B3/46
    • H04L1/205G01R29/26G01R31/31709
    • A method of measuring transport delay and jitter with a realtime oscilloscope using cross-correlation acquires waveforms from two test points in a system under test. Clock recovery is run on both waveforms to obtain respective rates and offsets. A time offset between the two waveforms is computed. The jitter from the two test points is filtered and a mean-removed cross-correlation coefficient is computed from the filtered jitters. A fractional delay is computed using interpolation based on LMS error, and the respective computational components are summed to compute a transport delay between the two test points. The transport delay may be used to adjust clock edges from one waveform for comparison with data transition edges of the other waveform to measure jitter.
    • 使用互相关的实时示波器测量传输延迟和抖动的方法从被测系统的两个测试点获取波形。 在两个波形上运行时钟恢复以获得相应的速率和偏移量。 计算两个波形之间的时间偏移。 对两个测试点的抖动进行滤波,并从滤波的抖动中计算平均去除的互相关系数。 使用基于LMS误差的插值计算分数延迟,并将相应的计算组件相加以计算两个测试点之间的传输延迟。 传输延迟可用于从一个波形调整时钟边沿,以便与其他波形的数据转换边沿进行比较,以测量抖动。
    • 10. 发明授权
    • Encoded serial data bit error detector
    • 编码串行数据位错误检测器
    • US07801206B2
    • 2010-09-21
    • US11415800
    • 2006-05-01
    • John C. CalvinMichael J. Wadzita
    • John C. CalvinMichael J. Wadzita
    • H04B3/46H04B17/00H04Q1/20
    • H04L1/243G01R1/025G01R13/0254G01R31/3171H04B17/23H04L1/245
    • An encoded serial data bit error analyzer captures the actual waveform of an encoded serial data stream associated with a bit error so that a user may readily validate the cause of the bit error. An encoded serial data stream decoder in the analyzer is modified to provide a signal for a trigger system when a characteristic of a bit error failure is detected. A power splitter produces a pair of incident encoded serial data streams from a programmable test signal, one of which is input to a device under test and the other is input to the analyzer. A re-transmitted encoded serial data stream from the device under test is input to another channel of the analyzer. The encoded serial data stream decoder provides an “error detected” output when a condition occurs in the re-transmitted encoded serial data stream indicative of a bit error. The “error detected” output is used as a trigger signal to capture the incident and re-transmitted encoded serial data waveforms surrounding the detected bit error.
    • 编码的串行数据位错误分析器捕获与位错误相关联的编码串行数据流的实际波形,使得用户可以容易地验证位错误的原因。 当检测到位错误故障的特性时,分析器中的经编码的串行数据流解码器被修改为提供用于触发系统的信号。 功率分配器从可编程测试信号产生一对事件编码的串行数据流,其中一个输入到被测器件,另一个输入到分析器。 将来自被测器件的重新发送的编码串行数据流输入到分析仪的另一个通道。 编码的串行数据流解码器在重新发送的指示位错误的编码串行数据流中出现条件时提供“检测到错误”。 “检测到错误”输出用作触发信号,用于捕获围绕检测到的位错误的事件和重新发送的编码串行数据波形。