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    • 3. 发明授权
    • Real-time gap free time domain density histogram display with arbitrary sample rate
    • 实时无间隙时域密度直方图显示,任意采样率
    • US09589377B1
    • 2017-03-07
    • US13974531
    • 2013-08-23
    • Keysight Technologies, Inc.
    • Robin A. Bordow
    • G06T11/20
    • G01R23/18G01R13/0254G01R13/0272
    • A real-time spectrum analyzer for measuring time domain data of an input signal includes an ADC, a resampler and a density histogram memory unit. The ADC has a first sample rate and is configured to acquire and digitize the input signal at the first sample rate to provide first samples. The resampler has a second sample rate and is configured to acquire the first samples at the second sample rate to provide second samples grouped in sample sets, where the second sample rate is selected so that each sample set includes an integer number of second samples per an integer number of periods at a frequency of interest of the input signal. The density histogram memory unit is configured to store at least a portion of the second samples output by the resampler for generating a continuous real-time gap-free density histogram corresponding to the time domain data.
    • 用于测量输入信号的时域数据的实时频谱分析仪包括ADC,重采样器和密度直方图存储器单元。 ADC具有第一采样率,并被配置为以第一采样率采集和数字化输入信号以提供第一采样。 重采样器具有第二采样率并且被配置为以第二采样率获取第一采样以提供分组在采样集中的第二采样,其中选择第二采样率,使得每个采样集包括每一个采样率的第二采样的整数个 输入信号感兴趣频率的整数个周期数。 密度直方图存储单元被配置为存储由重采样器输出的第二采样的至少一部分,用于产生对应于时域数据的连续实时无间隙密度直方图。
    • 6. 发明申请
    • SAMPLING CIRCUIT, SAMPLING METHOD, SAMPLING OSCILLOSCOPE, AND WAVEFORM DISPLAY METHOD
    • 采样电路,采样方法,采样振荡器和波形显示方法
    • US20160363614A1
    • 2016-12-15
    • US15082332
    • 2016-03-28
    • ANRITSU CORPORATION
    • Ken MochizukiTakashi MurakamiSeiya Suzuki
    • G01R13/02H03L7/18
    • G01R13/0272G01R13/0254
    • A frequency synthesizer 11a outputs a periodic signal r(t) at a frequency detuned by a predetermined frequency Δf [Hz] from a frequency of 1/integer of a frequency of a reference clock signal f0 synchronized with a signal to be measured ws. A first sampler unit 12 samples the signal to be measured ws at a timing of the trigger signal CLK. A second sampler unit 13a samples an I signal I(t) at the timing of the trigger signal CLK. A phase shifter 13b outputs a Q signal Q(t) obtained by shifting a phase of the reference clock signal f0 by 90°. A third sampler unit 13c samples the Q signal at the timing of the trigger signal CLK. A correction value calculation unit 13d calculates a correction value Δt(n) based on sampling data I(n) and Q(n) and a set value t(n) of a sampling time.
    • 频率合成器11a以与要测量的信号ws同步的参考时钟信号f0的频率的1 /整数的频率,输出以预定频率Δf[Hz]失谐的频率的周期信号r(t)。 第一采样单元12在触发信号CLK的定时对采样的信号ws进行采样。 第二取样器单元13a在触发信号CLK的定时对I信号I(t)进行采样。 移相器13b输出通过将参考时钟信号f0的相位偏移90°而获得的Q信号Q(t)。 第三取样器单元13c在触发信号CLK的定时对Q信号进行采样。 校正值计算单元13d基于采样数据I(n)和Q(n)和采样时间的设定值t(n)来计算校正值Δt(n)。
    • 9. 发明申请
    • Real Time Trigger Using A Finite State Machine Having A Counting State
    • 具有计数状态的有限状态机实时触发
    • US20160179073A1
    • 2016-06-23
    • US14578198
    • 2014-12-19
    • Keysight Technologies, Inc.
    • Andrew Robert LehaneAntony J. A. Kirkham
    • G05B19/045
    • G01R13/0254G05B2219/23289
    • An apparatus that searches for a pattern in a signal is disclosed. The apparatus can be used to implement a real time trigger in an instrument such as a high speed oscilloscope. The apparatus includes a symbol generator and a finite state machine (FSM). The symbol generator receives an ordered sequence of signal values and converts the ordered sequence of signal values into an ordered sequence of symbols, each symbol having a plurality of states. The FSM receives the ordered sequence of symbols and generates a match signal if the ordered sequence of symbols includes a target sequence specified by a regular expression that includes a counting limitation on one of the symbol states. The FSM includes a counting state that includes a counter that counts instances of the one of the symbol states.
    • 公开了一种在信号中搜索图案的装置。 该装置可用于在诸如高速示波器的仪器中实现实时触发。 该装置包括符号发生器和有限状态机(FSM)。 符号发生器接收信号值的有序序列,并且将有序序列的信号值转换成有序的符号序列,每个符号具有多个状态。 FSM接收有序的符号序列,并且如果有序的符号序列包括由包括对符号状态之一的计数限制的正则表达式指定的目标序列,则产生匹配信号。 FSM包括计数状态,其包括计数符号状态之一的计数器。
    • 10. 发明授权
    • Synchronizer for a data acquisition system
    • 用于数据采集系统的同步器
    • US09285395B2
    • 2016-03-15
    • US12605964
    • 2009-10-26
    • Nelson Hall
    • Nelson Hall
    • G01R13/02G01R31/12G01R31/14
    • G01R13/0254G01R31/1272G01R31/14
    • A data acquisition system is provided that in one example comprises a sensor electrically coupled to a data acquisition unit via a signal splitter. In use, the sensor senses one or more signals transmitted over a “live” power cable carrying, for example, 50 Hz or 60 Hz, medium voltage power. The one or more signals are then transmitted to the data acquisition unit to be stored, displayed, and/or analyzed. The data acquisition system includes a synchronizer that allows the data acquisition unit to synchronize the storage of the sensed signals to the frequency of the power transmitted over the tested power cable or system. In one embodiment, the synchronizer provides an accurate phase angle reference or trigger signal for accurate phase resolved data acquisition and testing.
    • 提供了一种数据采集系统,其在一个示例中包括经由信号分离器电耦合到数据采集单元的传感器。 在使用中,传感器感测通过承载例如50Hz或60Hz的中等电压功率的“带电”电力电缆传输的一个或多个信号。 然后将一个或多个信号发送到数据获取单元以进行存储,显示和/或分析。 数据采集​​系统包括同步器,其允许数据采集单元将感测到的信号的存储与通过测试的电力电缆或系统传输的功率的频率同步。 在一个实施例中,同步器提供精确的相位角参考或触发信号,用于精确的相位解析数据采集和测试。