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1. 发明授权

US07675966B2 On-chip detection and measurement of data lock in a high-speed serial data link 有权
标题翻译：在高速串行数据链路中片内检测和测量数据锁定
公开(公告)号：US07675966B2
公开(公告)日：2010-03-09
申请号：US11537053
申请日：2006-09-29
申请人： Robert M. Bunce , William R. Kelly , Kevin G. Kramer , Dinesh B. Nair
发明人： Robert M. Bunce , William R. Kelly , Kevin G. Kramer , Dinesh B. Nair
IPC分类号： H04B3/46
CPC分类号： G06F17/30985
摘要： A method for on-chip detection of data lock and measurement of data lock time in a high-speed serial data link, including: permitting one or more incoming data streams into the high-speed data link; establishing a pattern to be searched in the one or more incoming data streams; comparing patterns in the one or more incoming data streams to a programmable data pattern; holding a repetitive pattern of bits in the one or more incoming data streams by one or more programmable data pattern registers, wherein when one or more occurrences of a byte are detected, an appropriate bit in the one or more programmable data pattern registers is set to indicate the byte's relative position; and filtering false indications in the repetitive pattern by using a byte detection state machine, the state machine controlling and keeping track of a search progress.
摘要翻译：一种用于在高速串行数据链路中片内检测数据锁定和数据锁定时间的测量的方法，包括：允许一个或多个输入数据流进入高速数据链路; 在所述一个或多个输入数据流中建立要搜索的模式; 将一个或多个输入数据流中的模式与可编程数据模式进行比较; 通过一个或多个可编程数据模式寄存器保持所述一个或多个输入数据流中的位的重复模式，其中当检测到一个或多个字节出现时，所述一个或多个可编程数据模式寄存器中的适当位被设置为表示字节的相对位置; 并通过使用字节检测状态机对重复模式中的错误指示进行过滤，状态机控制并跟踪搜索进度。

2. 发明申请

US20080080603A1 ON-CHIP DETECTION AND MEASUREMENT OF DATA LOCK IN A HIGH SPEED SERIAL DATA LINK 有权
标题翻译：数据锁定在高速串行数据链路中的片上检测和测量
公开(公告)号：US20080080603A1
公开(公告)日：2008-04-03
申请号：US11537053
申请日：2006-09-29
申请人： Robert M. Bunce , William R. Kelly , Kevin G. Kramer , Dinesh B. Nair
发明人： Robert M. Bunce , William R. Kelly , Kevin G. Kramer , Dinesh B. Nair
IPC分类号： H04B17/00
CPC分类号： G06F17/30985
摘要： A method for on-chip detection of data lock and measurement of data lock time in a high-speed serial data link, including: permitting one or more incoming data streams into the high-speed data link; establishing a pattern to be searched in the one or more incoming data streams; comparing patterns in the one or more incoming data streams to a programmable data pattern; holding a repetitive pattern of bits in the one or more incoming data streams by one or more programmable data pattern registers, wherein when one or more occurrences of a byte are detected, an appropriate bit in the one or more programmable data pattern registers is set to indicate the byte's relative position; and filtering false indications in the repetitive pattern by using a byte detection state machine, the state machine controlling and keeping track of a search progress.
摘要翻译：一种用于在高速串行数据链路中片内检测数据锁定和数据锁定时间的测量的方法，包括：允许一个或多个输入数据流进入高速数据链路; 在所述一个或多个输入数据流中建立要搜索的模式; 将一个或多个输入数据流中的模式与可编程数据模式进行比较; 通过一个或多个可编程数据模式寄存器保持所述一个或多个输入数据流中的位的重复模式，其中当检测到一个或多个字节出现时，所述一个或多个可编程数据模式寄存器中的适当位被设置为表示字节的相对位置; 并通过使用字节检测状态机对重复模式中的错误指示进行过滤，状态机控制并跟踪搜索进度。

3. 发明授权

US08767531B2 Dynamic fault detection and repair in a data communications mechanism 有权
标题翻译：数据通信机制中的动态故障检测和修复
公开(公告)号：US08767531B2
公开(公告)日：2014-07-01
申请号：US13159580
申请日：2011-06-14
申请人： Frank D. Ferraiolo , William R. Kelly , Robert J. Reese , Susan M. Rubow , Michael B. Spear
发明人： Frank D. Ferraiolo , William R. Kelly , Robert J. Reese , Susan M. Rubow , Michael B. Spear
IPC分类号： G06C15/00 , H04L12/56 , H04L29/14
CPC分类号： H04L45/28 , H04L1/22 , H04L1/24 , H04L7/0025 , H04L7/0337 , H04L25/14 , H04L45/22 , H04L69/40
摘要： A communications link of multiple parallel communications lines includes at least one redundant line. In a first aspect, the lines are periodically recalibrated one at a time while the others carry functional data. If a fault is detected, the faulty line is disabled and the remaining previously calibrated lines transmit functional data. In a second aspect, impending line malfunction is detected from anomalies during calibration. In a third aspect, line malfunction is detected from receiver circuit output by determining a logical lane upon which each detected error occurs, and by mapping the logical lane to a physical line currently carrying the logical lane data.
摘要翻译：多个并行通信线路的通信链路包括至少一个冗余线路。在第一方面，线路一次一个地重新校准，而其他线路携带功能数据。如果检测到故障，故障线路被禁用，其余的已校准线路传输功能数据。在第二方面，在校准期间从异常检测到即将发生的线路故障。在第三方面，通过确定发生每个检测到的错误的逻辑通道，并且将逻辑通道映射到当前携带逻辑车道数据的物理线路，从接收器电路输出检测线路故障。

4. 发明申请

US20110188566A1 POST-EQUALIZATION AMPLITUDE LATCH-BASED CHANNEL CHARACTERISTIC MEASUREMENT 有权
标题翻译：均衡放大器基于锁存器的通道特性测量
公开(公告)号：US20110188566A1
公开(公告)日：2011-08-04
申请号：US12698629
申请日：2010-02-02
申请人： Troy J. Beukema , William R. Kelly , Michael A. Sorna , Daniel W. Storaska
发明人： Troy J. Beukema , William R. Kelly , Michael A. Sorna , Daniel W. Storaska
IPC分类号： H04L27/01
CPC分类号： H04L27/01
摘要： A serial data receiver includes an amplitude path including a first signal conditioner that adds a first offset or subtracts a second offset based on a selection input, a preamp configured to receive a signal from a transmitter and provide an input signal to the amplitude path, an amplitude latch coupled to the amplitude path, a data latch having a data output and a decision feedback equalization (DFE) logic block coupled to the first conditioning element and the data output and configured to generate the selection output based on the data output of the data latch.
摘要翻译：串行数据接收器包括幅度路径，该幅度路径包括基于选择输入添加第一偏移或减去第二偏移的第一信号调节器，被配置为从发送器接收信号并且向幅度路径提供输入信号的前置放大器，耦合到振幅路径的振幅锁存器，具有数据输出的数据锁存器和耦合到第一调理元件和数据输出的判定反馈均衡（DFE）逻辑块，并且被配置为基于数据的数据输出生成选择输出锁定。

5. 发明授权

US07869544B2 System for measuring an eyewidth of a data signal in an asynchronous system 有权
标题翻译：用于测量异步系统中数据信号的眼线宽度的系统
公开(公告)号：US07869544B2
公开(公告)日：2011-01-11
申请号：US11968872
申请日：2008-01-03
申请人： Michael A. Sorna , William R. Kelly , Daniel W. Storaska
发明人： Michael A. Sorna , William R. Kelly , Daniel W. Storaska
IPC分类号： H04L27/00
CPC分类号： H04L1/205
摘要： An eyewidth of a data signal is determined by steps including: (a) recovering a phase of a clock from a data signal as a sampling clock; (b) shifting the phase of the sampling clock away from the first phase by a count multiplied by predetermined phase amount; (c) sampling the data signal with the shifted sampling clock phase to obtain sample data; d) determining whether the sample data contains error; (e) when the sample data does not contain error, recovering the phase of the clock from the data signal again for use as the first phase of the sampling clock, increasing the count value and repeating steps (b) through (e); and f) when the sample data contains error, determining the eyewidth based on the last shifted phase of the sampling clock prior to determining that the sample data contains error.
摘要翻译：数据信号的眼线宽度由以下步骤决定，包括：（a）从作为采样时钟的数据信号中恢复时钟的相位; （b）使采样时钟的相位离开第一相位移动乘以预定相位量; （c）用移位的采样时钟相位对数据信号进行采样，以获得采样数据; d）确定样本数据是否包含错误; （e）当采样数据不包含错误时，再次从数据信号中恢复时钟的相位以用作采样时钟的第一相位，增加计数值并重复步骤（b）至（e）; 以及f）当样本数据包含错误时，在确定样本数据包含错误之前，基于采样时钟的最后移位的相位来确定眼宽。

6. 发明申请

US20090175325A1 SYSTEM FOR MEASURING AN EYEWIDTH OF A DATA SIGNAL IN AN ASYNCHRONOUS SYSTEM 有权
标题翻译：用于测量异常系统中的数据信号的方法的系统
公开(公告)号：US20090175325A1
公开(公告)日：2009-07-09
申请号：US11968872
申请日：2008-01-03
申请人： Michael A. Sorna , William R. Kelly , Daniel W. Storaska
发明人： Michael A. Sorna , William R. Kelly , Daniel W. Storaska
IPC分类号： H04L1/00
CPC分类号： H04L1/205
摘要： An eyewidth of a data signal is determined by steps including: (a) recovering a phase of a clock from a data signal as a sampling clock; (b) shifting the phase of the sampling clock away from the first phase by a count multiplied by predetermined phase amount; (c) sampling the data signal with the shifted sampling clock phase to obtain sample data; d) determining whether the sample data contains error; (e) when the sample data does not contain error, recovering the phase of the clock from the data signal again for use as the first phase of the sampling clock, increasing the count value and repeating steps (b) through (e); and f) when the sample data contains error, determining the eyewidth based on the last shifted phase of the sampling clock prior to determining that the sample data contains error.
摘要翻译：数据信号的眼线宽度由以下步骤决定，包括：（a）从作为采样时钟的数据信号中恢复时钟的相位; （b）使采样时钟的相位离开第一相位移动乘以预定相位量; （c）用移位的采样时钟相位对数据信号进行采样，以获得采样数据; d）确定样本数据是否包含错误; （e）当采样数据不包含错误时，再次从数据信号中恢复时钟的相位以用作采样时钟的第一相位，增加计数值并重复步骤（b）至（e）; 以及f）当样本数据包含错误时，在确定样本数据包含错误之前，基于采样时钟的最后移位的相位来确定眼宽。

7. 发明授权

US07361300B2 Method of making extended area filter 有权
标题翻译：扩展区域过滤器的制作方法
公开(公告)号：US07361300B2
公开(公告)日：2008-04-22
申请号：US10639367
申请日：2003-08-12
申请人： William R. Kelly , Larry Moore
发明人： William R. Kelly , Larry Moore
IPC分类号： B22F7/06
CPC分类号： B01D39/2034 , B29C47/0014 , B29C47/687 , D01D1/106 , D01D4/06
摘要： Methods are provided for making a porous filter that is useful in polymer melt spinning. The methods include pressing particles, such as a metal powder, to form a filter having a filter body integrally formed with a top cap and a bottom cap. The filter body and caps are formed as a single component or, alternatively, are formed as two or three separate parts that are fitted and pressed together to form a single component having blind inlet and outlet cavities. After pressing, the component is sintered to form the porous filter. The particles are pressed and cohere to form the caps and filter body without the use of a polymeric binder, and the inlet and outlet cavities are formed substantially without machining.
摘要翻译：提供了制备可用于聚合物熔融纺丝的多孔过滤器的方法。所述方法包括压制颗粒如金属粉末，以形成具有与顶盖和底盖一体形成的过滤体的过滤器。过滤器主体和盖子形成为单个部件，或者形成为两个或三个分开的部件，其被装配并压在一起以形成具有盲进入口和出口腔的单个部件。压制后，将组分烧结以形成多孔过滤器。颗粒被压制并固定以形成盖和过滤体，而不使用聚合物粘合剂，并且入口和出口腔基本上不加工而形成。

8. 发明授权

US06680681B1 High speed FIR transmitter 有权
标题翻译：高速FIR发射机
公开(公告)号：US06680681B1
公开(公告)日：2004-01-20
申请号：US10249795
申请日：2003-05-08
申请人： Louis L. Hsu , William R. Kelly , Joseph Natonio , Karl D. Selander , Michael A. Sorna
发明人： Louis L. Hsu , William R. Kelly , Joseph Natonio , Karl D. Selander , Michael A. Sorna
IPC分类号： H03M110
CPC分类号： H04L25/0288 , H03M1/661 , H03M1/742
摘要： A transmitter for driving a transmission medium employs pre-distortion to predistort the signals leaving the driver so that they will have an acceptable shape when they reach their destination and have been distorted by imperfections in the transmission medium. The change to pulse height is accomplished by means of a current steering unit that directs a controllable amount of current into the line for each pulse while maintaining the total sum of current that is generated constant in order to reduce noise. Control coefficients for the current steering unit are manipulated in an nxm register that automatically maintains the total number of bits constant while bits are moved from a location that controls a first current driver to a location that controls a second current driver with different properties.
摘要翻译：用于驱动传输介质的发射机使用预失真来预先离开驾驶员的信号，使得当它们到达其目的地并且由于传输介质中的缺陷而变形时，它们将具有可接受的形状。脉冲高度的改变是通过一个电流转向单元实现的，该电流转向单元将可控量的电流引导到每个脉冲的线中，同时保持恒定的电流的总和以减少噪声。用于当前转向单元的控制系数在nxm寄存器中进行操作，该nxm寄存器自动维持总位数恒定，而位从控制第一当前驱动器的位置移动到控制具有不同属性的第二当前驱动器的位置。

9. 发明授权

US06413070B1 System for manufacturing reinforced three-zone microporous membrane 有权
标题翻译：制造增强型三区微孔膜系统
公开(公告)号：US06413070B1
公开(公告)日：2002-07-02
申请号：US09522452
申请日：2000-03-09
申请人： Mark T. Meyering , William R. Kelly , Jack H. Vining , C. Thomas Baddenhop , Joseph G. Wallace
发明人： Mark T. Meyering , William R. Kelly , Jack H. Vining , C. Thomas Baddenhop , Joseph G. Wallace
IPC分类号： B01D1300
CPC分类号： D06N3/125 , B01D67/0009 , B01D67/0011 , B01D67/0013 , B01D69/02 , B01D69/10 , B01D69/12 , B01D71/56 , B01D2323/12 , B01D2325/022 , B01D2325/34 , B29B15/122 , B29K2105/0061 , B29K2105/04 , B29K2313/02 , B32B5/22 , B32B37/153 , B32B38/08 , B32B2305/026 , B32B2309/02 , B32B2309/12 , B32B2309/70 , B32B2419/06 , D06N3/0088 , D06N2211/30
摘要： Systems and methods for the manufacture of reinforced, three-zone, microporous phase inversion membrane having any one of a plurality of different possible pore sizes in any of the three zones from at least a single mother dope batch is disclosed. The systems and methods include formulating at least a single mother batch of dope in a vessel preferably maximizing the non-solvent to solvent ratio for a given weight percentage of polymer for use in a microporous phase inversion membrane production operation to produce three-zone phase inversion membranes having one of a plurality of different predetermined pore sizes in any or all of the three zones. The at least one mother dope batch is controllably formulated in at least one vessel such that the temperature of the dope does not exceed a predetermined maximum mixing temperature and is maintained at a relatively low temperature (lower than the mixing temperature) suitable for storage.
摘要翻译：公开了用于制造在至少一个母胶浆批次的三个区域中的任何一个区域中具有多个不同可能孔径中的任何一种的增强的三区微孔相转换膜的系统和方法。这些系统和方法包括在容器中配制至少一个单一的母料批次，优选最大化给定重量百分比的聚合物的非溶剂与溶剂比，用于微孔相转化膜生产操作以产生三区相转化膜在三个区域的任何一个或全部具有多个不同的预定孔径中的一个。将至少一种母体涂料批料可控地配制在至少一个容器中，使得涂料的温度不超过预定的最大混合温度并保持在适合储存的相对低的温度（低于混合温度）。

10. 发明申请

US20120151247A1 Dynamic Fault Detection and Repair in a Data Communications Mechanism 有权
标题翻译：数据通信机制中的动态故障检测与修复
公开(公告)号：US20120151247A1
公开(公告)日：2012-06-14
申请号：US13159580
申请日：2011-06-14
申请人： Frank D. Ferraiolo , William R. Kelly , Robert J. Reese , Susan M. Rubow , Michael B. Spear
发明人： Frank D. Ferraiolo , William R. Kelly , Robert J. Reese , Susan M. Rubow , Michael B. Spear
IPC分类号： G06F11/20
CPC分类号： H04L45/28 , H04L1/22 , H04L1/24 , H04L7/0025 , H04L7/0337 , H04L25/14 , H04L45/22 , H04L69/40
摘要： A communications link of multiple parallel communications lines includes at least one redundant line. In a first aspect, the lines are periodically recalibrated one at a time while the others carry functional data. If a fault is detected, the faulty line is disabled and the remaining previously calibrated lines transmit functional data. In a second aspect, impending line malfunction is detected from anomalies during calibration. In a third aspect, line malfunction is detected from receiver circuit output by determining a logical lane upon which each detected error occurs, and by mapping the logical lane to a physical line currently carrying the logical lane data.
摘要翻译：多个并行通信线路的通信链路包括至少一个冗余线路。在第一方面，线路一次一个地重新校准，而其他线路携带功能数据。如果检测到故障，故障线路被禁用，其余的已校准线路传输功能数据。在第二方面，在校准期间从异常检测到即将发生的线路故障。在第三方面，通过确定发生每个检测到的错误的逻辑通道，并且将逻辑通道映射到当前携带逻辑车道数据的物理线路，从接收器电路输出检测线路故障。

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