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1. 发明授权

US08166355B2 System and method for mitigating memory requirements 有权
标题翻译：减轻内存需求的系统和方法
公开(公告)号：US08166355B2
公开(公告)日：2012-04-24
申请号：US11884033
申请日：2006-02-12
申请人： Ronen Jashek , Roy Oren , Alon Ironi , Dror Meiri
发明人： Ronen Jashek , Roy Oren , Alon Ironi , Dror Meiri
IPC分类号： H03M13/15 , H03M13/29 , H03M13/17
CPC分类号： H04L1/0045 , H04L1/0057
摘要： A receiver is provided, which is adapted to receive MPE-FEC frames and to correct erroneous sections within a received MPE-FEC frame by detecting unreliable sections and storing in an erasure list (“ESL”) table compressed data that includes the base address of each detected erroneous section, together with the respective section's size. The size of the ESL table may be fixed, or it may correlate, or dynamically change according to the actual number of detected erroneous sections. The data stored in the erasure list may then be forwarded to a decoder to correct erroneous sections. The erroneous sections may be detected by using CRC, and the decoder may be a Reed-Solomon decoder. If the application data table of the MPE-FEC is error-free (or full or errors), in which case the erasure structure list is empty (or full of errors), in which case the erasure structure list is empty (or full), this means that no FEC reception and error corrections are required, because there are no sections to correct in the first case and the decoder is incapable of correcting too many sections in the second case. Therefore, the receiving circuitry, or at least the decoder, may be disabled to save battery power.
摘要翻译：提供接收机，其适于接收MPE-FEC帧并且通过检测不可靠部分来校正接收的MPE-FEC帧内的错误部分并将其存储在包括基站地址的擦除列表（“ESL”）表压缩数据中每个检测到错误部分，以及相应部分的大小。 ESL表的尺寸可以是固定的，或者它可以相关联，或者根据检测到的错误部分的实际数量动态地改变。存储在擦除列表中的数据然后可以被转发到解码器以校正错误的部分。可以通过使用CRC来检测错误部分，并且解码器可以是Reed-Solomon解码器。如果MPE-FEC的应用程序数据表无错误（或全部或错误），在这种情况下，擦除结构列表为空（或错误），在这种情况下，擦除结构列表为空（或满），这意味着不需要FEC接收和纠错，因为在第一种情况下没有要校正的部分，并且在第二种情况下解码器不能校正太多的部分。因此，接收电路或至少解码器可被禁用以节省电池电量。

2. 发明申请

US20090055715A1 System and Method for Mitigating Memory Requirements 有权
标题翻译：缓解内存需求的系统和方法
公开(公告)号：US20090055715A1
公开(公告)日：2009-02-26
申请号：US11884033
申请日：2006-02-12
申请人： Ronen Jashek , Roy Oren , Alon Ironi , Dror Meiri
发明人： Ronen Jashek , Roy Oren , Alon Ironi , Dror Meiri
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： H04L1/0045 , H04L1/0057
摘要： A receiver is provided, which is adapted to receive MPE-FEC frames and to correct erroneous sections within a received MPE-FEC frame by detecting unreliable sections and storing in an erasure list (“ESL”) table compressed data that includes the base address of each detected erroneous section, together with the respective section's size. The size of the ESL table may be fixed, or it may correlate, or dynamically change according to the actual number of detected erroneous sections. The data stored in the erasure list may then be forwarded to a decoder to correct erroneous sections. The erroneous sections may be detected by using CRC, and the decoder may be a Reed-Solomon decoder. If the application data table of the MPE-FEC is error-free (or full or errors), in which case the erasure structure list is empty (or full of errors), in which case the erasure structure list is empty (or full), this means that no FEC reception and error corrections are required, because there are no sections to correct in the first case and the decoder is incapable of correcting too many sections in the second case. Therefore, the receiving circuitry, or at least the decoder, may be disabled to save battery power.
摘要翻译：提供接收机，其适于接收MPE-FEC帧并且通过检测不可靠部分来校正接收的MPE-FEC帧内的错误部分并将其存储在包括基站地址的擦除列表（“ESL”）表压缩数据中每个检测到错误部分，以及相应部分的大小。 ESL表的尺寸可以是固定的，或者它可以相关联，或者根据检测到的错误部分的实际数量动态地改变。存储在擦除列表中的数据然后可以被转发到解码器以校正错误的部分。可以通过使用CRC来检测错误部分，并且解码器可以是Reed-Solomon解码器。如果MPE-FEC的应用程序数据表无错误（或全部或错误），在这种情况下，擦除结构列表为空（或错误），在这种情况下，擦除结构列表为空（或满），这意味着不需要FEC接收和纠错，因为在第一种情况下没有要校正的部分，并且在第二种情况下解码器不能校正太多的部分。因此，接收电路或至少解码器可被禁用以节省电池电量。

3. 发明申请

US20070296873A1 System Circuit Method for Utilizing Digital Memory Associated with a Host Device for Received Data 审中-公开
标题翻译：使用与接收数据的主机相关的数字存储器的系统电路方法
公开(公告)号：US20070296873A1
公开(公告)日：2007-12-27
申请号：US11662548
申请日：2007-03-12
申请人： Alon Ironi , Dror Meiri
发明人： Alon Ironi , Dror Meiri
IPC分类号： H04N5/455 , H04N5/44
CPC分类号： H04N21/41407 , H04N5/4401 , H04N21/414 , H04N21/4435 , H04N21/4436
摘要： The present invention is a system, circuit and method of utilizing digital memory associated with a computing and/or communication device (c g. mobile or handheld phone or video based communication and presentation device). According to some embodiments of the present invention, a receiver or receiver sub-system functionally associated with the computing and/or communication device (c g a data receiving circuit, sub-system or module) may store data on a digital memory also functionally associated with the device. According to some embodiments of the present invention, the sub-system may include a receiver demodulator and may store data received from outside the device, either in a processed or in an unprocessed state, where the term processed may include functions like demodulated, decoded, error detected and/or error corrected. According to some embodiments of the present invention, preprocessed data stored by the sub-system on the digital memory may be read hack by the sub-system and processed.
摘要翻译：本发明是利用与计算和/或通信设备（例如，移动或手持电话或基于视频的通信和呈现设备）相关联的数字存储器的系统，电路和方法。根据本发明的一些实施例，与计算和/或通信设备（cga数据接收电路，子系统或模块）功能相关联的接收器或接收器子系统可以将数据存储在数字存储器上，该数字存储器也与功能上相关联设备。根据本发明的一些实施例，子系统可以包括接收机解调器，并且可以存储从设备外部接收到的数据，处理或未处理状态，其中处理的项可以包括诸如解调，解码，检测到错误和/或纠错。根据本发明的一些实施例，由子系统存储在数字存储器上的预处理数据可以由子系统读取并被处理。

4. 发明授权

US07174415B2 Specialized memory device 有权
标题翻译：专用存储设备
公开(公告)号：US07174415B2
公开(公告)日：2007-02-06
申请号：US10166042
申请日：2002-06-11
申请人： Alon Ironi , Shachaf Zak
发明人： Alon Ironi , Shachaf Zak
IPC分类号： G06F12/00
CPC分类号： G06F13/1647 , G06F9/3877 , G06F15/7821
摘要： A specialized memory chip which includes an embedded application specific signal processing unit ASSPU. The ASSPU handles one or more predetermined tasks instead of a main processing unit. The ASSPU and the main processing unit can access memory on the memory chip simultaneously.
摘要翻译：专用存储器芯片，其包括嵌入式专用信号处理单元ASSPU。 ASSPU处理一个或多个预定任务而不是主处理单元。 ASSPU和主处理单元可以同时访问存储芯片上的存储器。

5. 发明授权

US06198773B1 Video memory management for MPEG video decode and display system 失效
标题翻译： MPEG视频解码和显示系统的视频内存管理
公开(公告)号：US06198773B1
公开(公告)日：2001-03-06
申请号：US08993796
申请日：1997-12-18
申请人： Aharon Gill , Elan Rosenthal , Miri Fraenkel , Ram Ofir , David Anisman , Alon Ironi , Paul R. Goldberg
发明人： Aharon Gill , Elan Rosenthal , Miri Fraenkel , Ram Ofir , David Anisman , Alon Ironi , Paul R. Goldberg
IPC分类号： H04N736
CPC分类号： H04N19/428 , H04N19/423 , H04N19/427 , H04N19/61
摘要： A system and method for decoding and displaying a video bitstream representing video images and displaying the video images. The present invention discloses a split memory manager design which is particularly adapted to display MPEG-2 format video images. In addition, the present invention discloses a novel way of managing the video memory used in a video decode and display system. Finally, an intraframe video data compression system and method is disclosed to complement the disclosed video decoding and displaying system.
摘要翻译：一种用于解码和显示表示视频图像并显示视频图像的视频比特流的系统和方法。本发明公开了一种特别适用于显示MPEG-2格式视频图像的分割存储器管理器设计。此外，本发明公开了一种管理在视频解码和显示系统中使用的视频存储器的新颖方式。最后，公开了一种帧内视频数据压缩系统和方法，以补充所公开的视频解码和显示系统。

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