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1. 发明授权

US09336892B1 Reducing hot electron injection type of read disturb in 3D non-volatile memory 有权
标题翻译：在3D非易失性存储器中减少热电子注入类型的读取干扰
公开(公告)号：US09336892B1
公开(公告)日：2016-05-10
申请号：US14728615
申请日：2015-06-02
申请人： SanDisk Technologies Inc.
发明人： Hong-Yan Chen , Yingda Dong , Charles Kwong
IPC分类号： G11C11/34 , G11C16/04 , G11C16/34 , G11C16/26
CPC分类号： G11C16/3427 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/08 , G11C16/26 , G11C16/3459 , G11C2211/5621
摘要： Read disturb due to hot electron injection is reduced in a 3D memory device by controlling the magnitude and timing of word line and select gate ramp down voltages at the end of a sensing operation. In an example read operation, the magnitude of a selected word line voltage is increased to be equal to pass voltages of unselected word lines, and the selected and unselected word line are ramped down at the same time, to avoid creating a channel gradient. In an example verify operation, the above procedure can be followed when the selected word line is at a source-side or middle range among all word lines. When the selected word line is at a drain-side among all word lines, a source-side select gate can be ramped down before the selected word line and a drain-side select gate can be ramped down after the selected word line.
摘要翻译：通过控制字线的幅度和时序并在感测操作结束时选择栅极斜坡下降电压，在3D存储器件中减少了由于热电子注入引起的读取干扰。在示例性读取操作中，所选择的字线电压的大小增加到等于未选择字线的通过电压，并且所选择的和未选择的字线同时斜降，以避免产生通道梯度。在示例验证操作中，当所选字线在所有字线之间的源侧或中间范围时，可以遵循上述过程。当所选择的字线位于所有字线之间的漏极侧时，在选择的字线之前可以使源极选择栅极向下斜坡，并且在选择的字线之后，可以将漏极侧选择栅极向下斜坡。

2. 发明授权

US09911500B2 Dummy voltage to reduce first read effect in memory 有权
公开(公告)号：US09911500B2
公开(公告)日：2018-03-06
申请号：US15131392
申请日：2016-04-18
申请人： SanDisk Technologies Inc.
发明人： Liang Pang , Pao-ling Koh , Jiahui Yuan , Charles Kwong , Yingda Dong
IPC分类号： G11C16/06 , G11C16/28 , G11C16/10 , G11C16/26 , G11C16/04 , G11C16/34
CPC分类号： G11C16/28 , G11C7/14 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/26 , G11C16/32 , G11C16/3436 , G11C16/3445 , G11C16/3459 , G11C29/021 , G11C29/028 , G11C2211/5621
摘要： Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage (Vth) of a memory cell can shift depending on when the read operation occurs. In one aspect, a dummy voltage is applied to the word lines to cause a coupling up of the word lines and weak programming. This can occur when a specified amount of time has elapsed since a last program or read operation, or when a power on event is detected for the memory device. A number of read errors can also be considered. The dummy voltage is similar to a pass voltage of a program or read operation but no sensing is performed. The word line voltages are therefore provided at a consistently up-coupled level so that read operations are consistent. The coupling up occurs due to capacitive coupling between the word line and the channel.

3. 发明申请

US20170301403A1 Dummy Voltage To Reduce First Read Effect In Memory 有权
公开(公告)号：US20170301403A1
公开(公告)日：2017-10-19
申请号：US15131392
申请日：2016-04-18
申请人： SanDisk Technologies Inc.
发明人： Liang Pang , Pao-ling Koh , Jiahui Yuan , Charles Kwong , Yingda Dong
IPC分类号： G11C16/28 , G11C16/26 , G11C16/10 , G11C16/34 , G11C16/04
CPC分类号： G11C16/28 , G11C7/14 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/08 , G11C16/10 , G11C16/26 , G11C16/32 , G11C16/3436 , G11C16/3445 , G11C16/3459 , G11C29/021 , G11C29/028 , G11C2211/5621
摘要： Techniques are provided for improving the accuracy of read operations of memory cells, where the threshold voltage (Vth) of a memory cell can shift depending on when the read operation occurs. In one aspect, a dummy voltage is applied to the word lines to cause a coupling up of the word lines and weak programming. This can occur when a specified amount of time has elapsed since a last program or read operation, or when a power on event is detected for the memory device. A number of read errors can also be considered. The dummy voltage is similar to a pass voltage of a program or read operation but no sensing is performed. The word line voltages are therefore provided at a consistently up-coupled level so that read operations are consistent. The coupling up occurs due to capacitive coupling between the word line and the channel.

4. 发明授权

US09349478B2 Read with look-back combined with programming with asymmetric boosting in memory 有权
标题翻译：读取结合编程与内存不对称提升
公开(公告)号：US09349478B2
公开(公告)日：2016-05-24
申请号：US14500660
申请日：2014-09-29
申请人： SanDisk Technologies Inc.
发明人： Jiahui Yuan , Yingda Dong , Charles Kwong , Hong-Yan Chen , Liang Pang
IPC分类号： G11C16/34 , G11C16/26 , G11C16/04 , G11C16/10 , G06F11/10 , G11C29/52
CPC分类号： G11C16/3427 , G06F11/1068 , G11C11/5628 , G11C11/5642 , G11C11/5671 , G11C16/0466 , G11C16/0483 , G11C16/10 , G11C16/26 , G11C16/3418 , G11C16/3459 , G11C29/52
摘要： A read operation compensates for program disturb when distinguishing between an erased-state and a lowest programmed data state, where the program disturb is a function of the data state of an adjacent, previously-programmed memory cell on a common charge-trapping layer. A programming operation avoids program disturb of the programmed data states by using asymmetric pass voltages. Before reading the memory cells on a selected word line (WLn), the memory cells on the adjacent, previously-programmed word line (WLn−1) are read. The read operation for WLn uses multiple read voltages—one for each data state on WLn−1, and one of the read results is selected based on the data state of the adjacent memory cell. Other read operations distinguish between each pair of adjacent programmed data states using a read voltage which is independent of the data state of the adjacent memory cell.
摘要翻译：当识别擦除状态和最低编程数据状态时，读取操作补偿程序干扰，其中程序干扰是公共电荷俘获层上相邻的预先编程的存储器单元的数据状态的函数。编程操作通过使用不对称通过电压来避免编程数据状态的程序干扰。在读取所选字线（WLn）上的存储单元之前，读取相邻的预先编程的字线（WLn-1）上的存储单元。 WLn的读取操作使用多个读取电压 - 一个用于WLn-1上的每个数据状态，并且基于相邻存储器单元的数据状态选择一个读取结果。其他读取操作使用独立于相邻存储器单元的数据状态的读取电压来区分每对相邻的编程数据状态。

5. 发明授权

US09230676B1 Weak erase of a dummy memory cell to counteract inadvertent programming 有权
标题翻译：虚拟存储器单元的弱擦除以抵消无意编程
公开(公告)号：US09230676B1
公开(公告)日：2016-01-05
申请号：US14612561
申请日：2015-02-03
申请人： SanDisk Technologies Inc.
发明人： Liang Pang , Yingda Dong , Charles Kwong
IPC分类号： G11C16/06 , G11C16/34 , G11C16/04 , G11C16/14 , G11C16/16 , G11C16/26
CPC分类号： G11C16/3427 , G11C16/0483 , G11C16/14 , G11C16/16 , G11C16/26 , G11C16/349
摘要： A NAND string includes dummy memory cells between data memory cells and source-side and drain-side select gates. A gradual increase in threshold voltage (Vth) for the dummy memory cells which occurs due to program-erase cycles is periodically detected by a read operation at an upper checkpoint voltage. If the Vth has increased beyond the checkpoint, the control gate voltage of the dummy memory cells is decreased during subsequent erase operations of program-erase cycles, causing a gradual weak erase. A decrease in the Vth is later detected by a read operation at a lower checkpoint voltage. If the Vth has decreased too much, the control gate voltage is raised during subsequent erase operations, causing a gradual weak programming. The process can be repeated to keep the Vth within a desired range and avoid disturbs due to an increase in a channel voltage gradient which would otherwise occur.
摘要翻译： NAND串包括数据存储单元与源极侧和漏极侧选择栅之间的虚拟存储单元。由于编程擦除周期而发生的虚拟存储器单元的阈值电压（Vth）的逐渐增加通过上检查点电压的读取操作周期性地检测。如果Vth增加到检查点以上，则在随后的编程擦除周期的擦除操作期间，虚拟存储单元的控制栅极电压降低，导致逐渐的弱擦除。稍后通过在较低检查点电压下的读取操作来检测Vth的减小。如果Vth降低太多，则在随后的擦除操作期间控制栅极电压升高，导致逐渐变弱的编程。可以重复该过程以将Vth保持在期望的范围内，并且避免由于否则将发生的沟道电压梯度的增加而导致的干扰。

6. 发明授权

US09361993B1 Method of reducing hot electron injection type of read disturb in memory 有权
标题翻译：减少存储器中热电子注入类型读取干扰的方法
公开(公告)号：US09361993B1
公开(公告)日：2016-06-07
申请号：US14601531
申请日：2015-01-21
申请人： SanDisk Technologies Inc.
发明人： Hong-Yan Chen , Yingda Dong , Wei Zhao , Charles Kwong
IPC分类号： G11C19/08 , G11C16/26 , G11C16/04
CPC分类号： G11C16/26 , G11C16/0483 , G11C16/14 , G11C16/3422
摘要： Read disturb is reduced in a charge-trapping memory device such as a 3D memory device by optimizing the channel boosting voltage in an unselected NAND string. A pass voltage applied to the unselected word lines can cause a large gradient in the channel which leads to electron-hole formation and a hot electron injection (HEI) type of read disturb. When the selected word line is close to the source-side of the NAND string, HEI disturb occurs on the drain-side of the selected word line. To avoid this disturb, a spike is provided in the control gate voltage of a drain-side selected gate transistor to temporarily connect the channel to the bit line, lowering the voltage of the associated channel region. A similar approach is used for a drain-side selected word line. The spike may be omitted when the selected word line is mid-range.
摘要翻译：通过优化未选择的NAND串中的通道升压电压，在诸如3D存储器件的电荷捕获存储器件中减少读取干扰。施加到未选字线的通过电压可能导致通道中的大梯度，这导致电子空穴形成和热电子注入（HEI）类型的读取干扰。当所选字线接近NAND串的源极侧时，在所选字线的漏极侧发生HEI干扰。为了避免这种干扰，在漏极侧选择的栅极晶体管的控制栅极电压中提供尖峰以暂时将沟道连接到位线，降低相关沟道区的电压。漏极侧选择的字线也采用类似的方法。当选定的字线为中档时，可省略尖峰。

7. 发明授权

US09355735B1 Data recovery in a 3D memory device with a short circuit between word lines 有权
标题翻译：在字线之间短路的3D存储器件中的数据恢复
公开(公告)号：US09355735B1
公开(公告)日：2016-05-31
申请号：US14627575
申请日：2015-02-20
申请人： SanDisk Technologies Inc.
发明人： Jian Chen , Jiahui Yuan , Yingda Dong , Charles Kwong
IPC分类号： G11C29/04 , G11C16/34 , G11C16/10 , G11C16/26
CPC分类号： G11C16/34 , G11C8/14 , G11C16/08 , G11C16/10 , G11C16/3404 , G11C16/3418 , G11C16/3459 , G11C29/025 , G11C29/44 , G11C29/88 , G11C2029/0409 , G11C2029/1202 , G11C2213/71
摘要： Techniques for detecting word line layers which are shorted together due to a defect in a three-dimensional stack memory device, and for recovering data. The memory device comprises blocks of memory cells in which each block has a separate stack of word line layers but the word line layers at a common height in the different stacks are connected. A process to detect a short circuit occurs when an nth word line layer (WLn) in an ith block fails to successfully complete programming. A determination is made as to whether WLn is shorted to WLn−1 and/or WLn+1. If WLn is shorted to WLn+1 but not WLn−1 in the ith block, a recovery read process is performed to read the data which has been programmed into the memory cells of WLn of the previously-programmed blocks. The recovery read process uses upshifted control gate read voltages due to the short circuit.
摘要翻译：用于检测由于三维堆栈存储器件中的缺陷而短路在一起并用于恢复数据的字线层的技术。存储器件包括存储单元块，其中每个块具有单独的字线层堆叠，但是连接不同堆栈中公共高度的字线层。当第i个块中的第n个字线层（WLn）无法成功完成编程时，会发生检测短路的过程。确定WLn是否短接到WLn-1和/或WLn + 1。如果WLn与第i个块中的WLn + 1而不是WLn-1短接，则执行恢复读取处理以读取已编程到先前编程块的WLn的存储单元中的数据。恢复读取过程由于短路而使用升高的控制栅极读取电压。

8. 发明申请

US20160093390A1 Read With Look-Back Combined With Programming With Asymmetric Boosting In Memory 有权
标题翻译：阅读与回想结合编程与不对称提升在内存
公开(公告)号：US20160093390A1
公开(公告)日：2016-03-31
申请号：US14500660
申请日：2014-09-29
申请人： SanDisk Technologies Inc.
发明人： Jiahui Yuan , Yingda Dong , Charles Kwong , Hong-Yan Chen , Liang Pang
IPC分类号： G11C16/26 , G11C29/52 , G11C16/34 , G06F11/10 , G11C16/04 , G11C16/10
CPC分类号： G11C16/3427 , G06F11/1068 , G11C11/5628 , G11C11/5642 , G11C11/5671 , G11C16/0466 , G11C16/0483 , G11C16/10 , G11C16/26 , G11C16/3418 , G11C16/3459 , G11C29/52
摘要： A read operation compensates for program disturb when distinguishing between an erased-state and a lowest programmed data state, where the program disturb is a function of the data state of an adjacent, previously-programmed memory cell on a common charge-trapping layer. The read operation occurs in connection with a programming operation which avoids program disturb of the programmed data states by using asymmetric pass voltages. Before reading the memory cells on a selected word line (WLn), the memory cells on the adjacent, previously-programmed word line (WLn−1) are read. The read operation for WLn uses multiple read voltages—one for each data state on WLn−1, and one of the read results is selected based on the data state of the adjacent memory cell. Other read operations distinguish between each pair of adjacent programmed data states using a read voltage which is independent of the data state of the adjacent memory cell.
摘要翻译：当识别擦除状态和最低编程数据状态时，读取操作补偿程序干扰，其中程序干扰是公共电荷俘获层上相邻的预先编程的存储器单元的数据状态的函数。读操作与编程操作相关，通过使用不对称通过电压避免编程数据状态的程序干扰。在读取所选字线（WLn）上的存储单元之前，读取相邻的预先编程的字线（WLn-1）上的存储单元。 WLn的读取操作使用多个读取电压 - 一个用于WLn-1上的每个数据状态，并且基于相邻存储器单元的数据状态选择一个读取结果。其他读取操作使用独立于相邻存储器单元的数据状态的读取电压来区分每对相邻的编程数据状态。

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