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    • 1. 发明授权
    • Echo cancellation circuit
    • 回波消除电路
    • US08526339B2
    • 2013-09-03
    • US13044346
    • 2011-03-09
    • Shinji NakatsukaKazuhiro Oda
    • Shinji NakatsukaKazuhiro Oda
    • H04B3/20
    • H04B3/23
    • An echo cancellation circuit in a full duplex two-way communication system comprising: an input/output terminal; a subtractor having a positive and a negative input terminals, in which a first transmission signal is inputted to the negative input terminal as a pseudo echo signal, the first transmission signal is inputted through an output buffer to the positive input terminal as an echo signal, the pseudo echo signal inputted to the negative input terminal is subtracted from the echo signal inputted to the positive input terminal; and a result of the subtraction is outputted; and an echo cancellation error reducing unit having a D/A converter at an input side or an output side of the subtractor.
    • 一种全双工双向通信系统中的回波消除电路,包括:输入/输出端; 具有正输入端和负输入端的减法器,其中第一传输信号作为伪回波信号输入到负输入端,第一传输信号通过输出缓冲器输入到正输入端作为回波信号, 从输入到正输入端的回波信号中减去输入到负输入端的伪回波信号; 并输出减法的结果; 以及在减法器的输入侧或输出侧具有D / A转换器的回波消除误差减小单元。
    • 2. 发明申请
    • ECHO CANCELLATION CIRCUIT
    • ECHO CANCELLATION电路
    • US20110222446A1
    • 2011-09-15
    • US13044346
    • 2011-03-09
    • Shinji NakatsukaKazuhiro Oda
    • Shinji NakatsukaKazuhiro Oda
    • H04B3/20
    • H04B3/23
    • An echo cancellation circuit in a full duplex two-way communication system comprising: an input/output terminal; a subtractor having a positive and a negative input terminals, in which a first transmission signal is inputted to the negative input terminal as a pseudo echo signal, the first transmission signal is inputted through an output buffer to the positive input terminal as an echo signal, the pseudo echo signal inputted to the negative input terminal is subtracted from the echo signal inputted to the positive input terminal; and a result of the subtraction is outputted; and an echo cancellation error reducing unit having a D/A converter at an input side or an output side of the subtractor.
    • 一种全双工双向通信系统中的回波消除电路,包括:输入/输出端; 具有正输入端和负输入端的减法器,其中第一传输信号作为伪回波信号输入到负输入端,第一传输信号通过输出缓冲器输入到正输入端作为回波信号, 从输入到正输入端的回波信号中减去输入到负输入端的伪回波信号; 并输出减法的结果; 以及在减法器的输入侧或输出侧具有D / A转换器的回波消除误差减小单元。
    • 3. 发明授权
    • Hitless switching system and transmission apparatus
    • 无源切换系统和传输设备
    • US07382723B2
    • 2008-06-03
    • US10376262
    • 2003-03-03
    • Atsushi SutohKazuhiro Oda
    • Atsushi SutohKazuhiro Oda
    • H04J1/16
    • H04J3/0602H04J3/062H04J3/14H04J2203/0094H04L1/22
    • A hitless switching system includes a sending apparatus and a receiving apparatus. The sending apparatus includes: a distributing part for dividing an original signal into a plurality of signals; and a transmitting part for transmitting the divided signals over one or a plurality of transmission lines with redundancy. The receiving apparatus includes: a phase difference detection part for detecting phase differences between signals sent from the sending apparatus; a phase difference absorbing part for absorbing phase differences detected by the phase difference detection part; selectors each of which selects one signal from a plurality of signals; and a restoring part for restoring the original signal from the signals output from the selectors.
    • 无中断切换系统包括发送装置和接收装置。 发送装置包括:分配部分,用于将原始信号分割成多个信号; 以及用于通过冗余的一条或多条传输线路发送划分的信号的发送部分。 接收装置包括:相位差检测部,用于检测从发送装置发送的信号之间的相位差; 相位差吸收部,用于吸收由所述相位差检测部检测出的相位差; 每个选择器从多个信号中选择一个信号; 以及恢复部件,用于从从选择器输出的信号中恢复原始信号。
    • 7. 发明申请
    • Aluminum alloy for casting, having high rigidity and low liner expansion coefficiant
    • 用于铸造的铝合金,具有高刚性和低内衬膨胀系数
    • US20070193663A1
    • 2007-08-23
    • US10593338
    • 2005-03-23
    • Kazuhiro OdaMasahiko Shioda
    • Kazuhiro OdaMasahiko Shioda
    • C22C21/04
    • B22D11/124B22D11/0605C22C21/02C22F1/05
    • An aluminum alloy for casting with excellent rigidity and having a low coefficient of linear expansion containing 13-25% by mass of silicon, 2-8% by mass of copper, 0.5-3% by mass of iron, 0.3-3% by mass of manganese, 0.001-0.02% by mass of phosphorus, and the remainder comprising aluminum and inevitable impurities, wherein the total amount of iron and manganese is 3.0% by mass or greater. Said alloy may further contain 0.5-6% by mass of nickel, and the total amount of iron, manganese, and nickel may be 3.0% by mass or greater. Further, said alloy may further contain one or more of 0.1-1.0% by mass of chromium, 0.05-1.5% by mass of magnesium, 0.01-1.0% by mass of titanium, 0.0001-1.0% by mass of boron, 0.1-1.0% by mass of zirconium, 0.1-1.0% by mass of vanadium, or 0.01-1.0% by mass of molybdenum.
    • 一种铸造用铝合金,具有优异的线膨胀系数,含有13-25质量%的硅,2-8质量%的铜,0.5-3质量%的铁,0.3-3质量% 的锰,0.001-0.02质量%的磷,其余为铝和不可避免的杂质,其中铁和锰的总量为3.0质量%以上。 所述合金还可以含有0.5-6质量%的镍,铁,锰和镍的总量可以为3.0质量%以上。 此外,所述合金还可以含有0.1〜1.0质量%的铬,0.05〜1.5质量%的镁,0.01〜1.0质量%的钛,0.0001〜1.0质量%的硼,0.1〜1.0质量% 锆,质量百分比为0.1〜1.0质量%,钼为0.01〜1.0质量%。
    • 8. 发明授权
    • Comparator circuit
    • 比较器电路
    • US5969546A
    • 1999-10-19
    • US55900
    • 1998-04-07
    • Naoyuki HamanishiKazuhiro Oda
    • Naoyuki HamanishiKazuhiro Oda
    • H03K5/08H03F3/45H03K5/24H03K5/22
    • H03F3/45941H03F3/45659H03F3/45753H03K5/2481H03K5/249
    • In a comparator circuit comprised of a feedback amplifier and a differential amplifier AMP1, the feedback amplifier includes input transistors Tr1 to Tr4. Gates of the transistors Tr1 and Tr2 are respectively inputted with first and second inverted inputs, and gates of the transistors Tr3 and Tr4 are inputted with first and second non-inverted inputs. First ends of current paths of the transistors Tr3 and Tr4 are connected in common, and ends of current paths of transistors Tr1 and Tr2 are connected in common. Second ends of the current paths of the transistors Tr1 to Tr4 are connected in common to a constant current source. The first and second inverted inputs are supplied with a reference voltage, and the first and second non-inverted inputs are respectively supplied with the non-inverted and inverted outputs of the differential amplifier AMP1. A signal from a connection point common to the first ends of the current paths of the transistors Tr3 and Tr4 is supplied as a feedback output to the differential amplifier AMP1 to control operation of the differential amplifier AMP1. The timing when feedback is performed to stabilize the operating point of the differential amplifier AMP1 is the timing when the non-inverted and inverted outputs of the differential amplifier AMP1 have a small potential difference therebetween or are substantially equal to each other.
    • 在由反馈放大器和差分放大器AMP1组成的比较器电路中,反馈放大器包括输入晶体管Tr1至Tr4。 晶体管Tr1和Tr2的栅极分别输入第一和第二反相输入,晶体管Tr3和Tr4的栅极被输入第一和第二非反相输入。 晶体管Tr3和Tr4的电流路径的第一端共同连接,并且晶体管Tr1和Tr2的电流路径的端部共同连接。 晶体管Tr1至Tr4的电流通路的第二端共同连接到恒流源。 第一和第二反相输入端被提供参考电压,并且第一和第二非反相输入分别被提供有差分放大器AMP1的非反相和反相输出。 来自与晶体管Tr3和Tr4的电流路径的第一端共同的连接点的信号作为反馈输出被提供给差分放大器AMP1,以控制差分放大器AMP1的操作。 执行反馈以稳定差分放大器AMP1的工作点的定时是当差分放大器AMP1的非反相和反相输出之间具有小的电位差或者彼此基本相等时的定时。