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    • 4. 发明申请
    • Reducing Distortion In An Analog-To-Digital Converter
    • 减少模数转换器中的失真
    • US20160380643A1
    • 2016-12-29
    • US15188272
    • 2016-06-21
    • Silicon Laboratories Inc.
    • Abdulkerim L. CobanMustafa H. Koroglu
    • H03M1/00H03M1/10H03M1/12
    • H03M1/002H03M1/0626H03M1/1009H03M1/124H03M1/60
    • In one embodiment, an apparatus includes: a first voltage controlled oscillator (VCO) analog-to-digital converter (ADC) unit to receive a first portion of a differential analog signal and convert the first portion of the differential analog signal into a first digital value; a second VCO ADC unit to receive a second portion of the differential analog signal and convert the second portion of the differential analog signal into a second digital value; a combiner to form a combined digital signal from the first and second digital values; a decimation circuit to receive the combined digital signal and filter the combined digital signal into a filtered combined digital signal; and a cancellation circuit to receive the filtered combined digital signal and generate a distortion cancelled digital signal, based at least in part on a coefficient value.
    • 在一个实施例中,一种装置包括:第一压控振荡器(VCO)模数转换器(ADC)单元,用于接收差分模拟信号的第一部分,并将差分模拟信号的第一部分转换成第一数字 值; 第二VCO ADC单元,用于接收差分模拟信号的第二部分,并将差分模拟信号的第二部分转换为第二数字值; 组合器,用于从第一和第二数字值形成组合的数字信号; 一个抽取电路,用于接收组合的数字信号,并将组合的数字信号滤波成经滤波的组合数字信号; 以及抵消电路,用于至少部分地基于系数值接收经滤波的组合数字信号并产生失真消除的数字信号。
    • 5. 发明授权
    • Multi-tuner using interpolative dividers
    • 多调谐器使用内插分频器
    • US09106867B2
    • 2015-08-11
    • US14505701
    • 2014-10-03
    • Silicon Laboratories Inc.
    • Mustafa H. KorogluAbdulkerim L. Coban
    • H04N5/50H04N5/445H04N5/44H04N5/455H04N21/426H04N21/438
    • H04N5/4401H04N5/455H04N5/50H04N21/4263H04N21/4382
    • An apparatus includes a splitter to receive a radio frequency (RF) signal and to provide the RF signal to multiple channels of a tuner. Each channel may include an amplifier to amplify the RF signal, a mixer to downconvert the amplified RF signal to a second frequency signal using a local oscillator (LO) signal, where each of the channels is configured to receive a different LO signal, a filter to filter the downconverted second frequency signal, and a digitizer to digitize the downconverted second frequency signal. A clock generation circuit has multiple interpolative dividers and a frequency synthesizer to generate a reference clock signal. Each of the interpolative dividers is configured to receive the reference clock signal, generate a corresponding LO signal, and provide the corresponding LO signal to the mixer of at least one of the channels.
    • 一种装置包括用于接收射频(RF)信号并将RF信号提供给调谐器的多个信道的分离器。 每个通道可以包括用于放大RF信号的放大器,使用本地振荡器(LO)信号将放大的RF信号下变频到第二频率信号的混频器,其中每个信道被配置为接收不同的LO信号,滤波器 对下变频的第二频率信号进行滤波,以及数字转换器,对下变频的第二频率信号进行数字化。 时钟发生电路具有多个内插分频器和频率合成器,以产生参考时钟信号。 每个内插分频器被配置为接收参考时钟信号,产生相应的LO信号,并将相应的LO信号提供给至少一个信道的混频器。