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1. 发明申请

US20070195949A1 Encryption processing method and encryption processing device 有权
标题翻译：加密处理方法和加密处理装置
公开(公告)号：US20070195949A1
公开(公告)日：2007-08-23
申请号：US11653879
申请日：2007-01-17
申请人： Toshio Okochi , Takashi Endo , Takashi Watanabe , Tatsuya Kameyama , Shunsuke Ota
发明人： Toshio Okochi , Takashi Endo , Takashi Watanabe , Tatsuya Kameyama , Shunsuke Ota
IPC分类号： H04L9/28
CPC分类号： H04L9/003 , G06F21/72 , G06F21/75 , G06F21/755 , H04L2209/122
摘要： An increase in safety from attacks by use of hardware-like methods by small-sized hardware is achieved. An encryption processing device includes a logical circuit capable of programmably setting logics for executing cipher processing, a memory that stores plural pieces of logical configuration information corresponding to an identical cipher processing algorithm, and a CPU that selectively sets plural logics corresponding to an identical cipher processing algorithm in the logical circuit. Even in processing using an identical cipher key, by changing the logic of the logical circuit for each processing, power consumption in cipher processing can be varied, and places a timing in which malfunctions occur can be varied. Moreover, an increase in the scale of hardware for realizing plural logics can be curbed.
摘要翻译：实现了通过使用小型硬件的类似硬件的方法的攻击来提高安全性。加密处理装置包括能够可编程地设置用于执行密码处理的逻辑的逻辑电路，存储与相同密码处理算法相对应的多条逻辑配置信息的存储器，以及选择性地设置与相同的密码处理对应的多个逻辑的CPU 算法在逻辑电路中。即使在使用相同的加密密钥的处理中，通过改变每个处理的逻辑电路的逻辑，可以改变密码处理中的功耗，并且可以改变发生故障的定时。此外，可以抑制用于实现多个逻辑的硬件规模的增加。

2. 发明授权

US07664939B2 Method and apparatus for detecting false operation of computer 有权
标题翻译：检测计算机虚假操作的方法和装置
公开(公告)号：US07664939B2
公开(公告)日：2010-02-16
申请号：US11734361
申请日：2007-04-12
申请人： Takashi Endo , Toshio Okochi , Takashi Watanabe , Shunsuke Ota , Tatsuya Kameyama
发明人： Takashi Endo , Toshio Okochi , Takashi Watanabe , Shunsuke Ota , Tatsuya Kameyama
IPC分类号： G06F11/30 , G06F12/14 , G06F7/38 , G06F9/00
CPC分类号： G06F11/28 , G06F21/52
摘要： A program to be executed by a computer is divided into a plurality of code blocks, and, a unique code block ID is allotted to each code block. At the moment when the execution of the program is started, the code block ID corresponding to the execution start address is written in a memory, and in the case when the control transits from the code block to other code block, by use of code block operation values obtained beforehand from these two code block IDs thereof, the code block ID in the memory is updated, and it is judged whether the updated code block ID in the memory and the code block ID allotted to the code block as the execution objective are identical or not so that a control flow error is detected.
摘要翻译：要由计算机执行的程序被分成多个代码块，并且将唯一的代码块ID分配给每个代码块。在开始执行程序的时刻，与执行开始地址相对应的代码块ID被写入存储器中，并且在控制从代码块转移到其他代码块的情况下，通过使用代码块从这两个代码块ID预先获得的操作值，存储器中的代码块ID被更新，并且判断存储器中更新的代码块ID和作为执行目标分配给代码块的代码块ID是否是相同或不相同，从而检测到控制流量错误。

3. 发明申请

US20070255980A1 METHOD AND APPARATUS FOR DETECTING FALSE OPERATION OF COMPUTER 有权
标题翻译：用于检测计算机虚拟操作的方法和装置
公开(公告)号：US20070255980A1
公开(公告)日：2007-11-01
申请号：US11734361
申请日：2007-04-12
申请人： Takashi ENDO , Toshio Okochi , Takashi Watanabe , Shunsuke Ota , Tatsuya Kameyama
发明人： Takashi ENDO , Toshio Okochi , Takashi Watanabe , Shunsuke Ota , Tatsuya Kameyama
IPC分类号： G06F11/00
CPC分类号： G06F11/28 , G06F21/52
摘要： A program to be executed by a computer is divided into a plurality of code blocks, and, a unique code block ID is allotted to each code block. At the moment when the execution of the program is started, the code block ID corresponding to the execution start address is written in a memory, and in the case when the control transits from the code block to other code block, by use of code block operation values obtained beforehand from these two code block IDs thereof, the code block ID in the memory is updated, and it is judged whether the updated code block ID in the memory and the code block ID allotted to the code block as the execution objective are identical or not so that a control flow error is detected.
摘要翻译：要由计算机执行的程序被分成多个代码块，并且将唯一的代码块ID分配给每个代码块。在开始执行程序的时刻，与执行开始地址相对应的代码块ID被写入存储器中，并且在控制从代码块转移到其他代码块的情况下，通过使用代码块从这两个代码块ID预先获得的操作值被更新，存储器中的代码块ID被更新，并且判断存储器中更新的代码块ID和作为执行目标分配给代码块的代码块ID是否是相同或不相同，从而检测到控制流量错误。

4. 发明授权

US08009827B2 Encryption processing method and encryption processing device 有权
标题翻译：加密处理方法和加密处理装置
公开(公告)号：US08009827B2
公开(公告)日：2011-08-30
申请号：US11653879
申请日：2007-01-17
申请人： Toshio Okochi , Takashi Endo , Takashi Watanabe , Tatsuya Kameyama , Shunsuke Ota
发明人： Toshio Okochi , Takashi Endo , Takashi Watanabe , Tatsuya Kameyama , Shunsuke Ota
IPC分类号： H04L9/28
CPC分类号： H04L9/003 , G06F21/72 , G06F21/75 , G06F21/755 , H04L2209/122
摘要： An increase in safety from attacks by use of hardware-like methods by small-sized hardware is achieved. An encryption processing device includes a logical circuit capable of programmably setting logics for executing cipher processing, a memory that stores plural pieces of logical configuration information corresponding to an identical cipher processing algorithm, and a CPU that selectively sets plural logics corresponding to an identical cipher processing algorithm in the logical circuit. Even in processing using an identical cipher key, by changing the logic of the logical circuit for each processing, power consumption in cipher processing can be varied, and places a timing in which malfunctions occur can be varied. Moreover, an increase in the scale of hardware for realizing plural logics can be curbed.
摘要翻译：实现了通过使用小型硬件的类似硬件的方法的攻击来提高安全性。加密处理装置包括能够可编程地设置用于执行密码处理的逻辑的逻辑电路，存储与相同密码处理算法相对应的多条逻辑配置信息的存储器，以及选择性地设置与相同的密码处理对应的多个逻辑的CPU 算法在逻辑电路中。即使在使用相同的加密密钥的处理中，通过改变每个处理的逻辑电路的逻辑，可以改变密码处理中的功耗，并且可以改变发生故障的定时。此外，可以抑制用于实现多个逻辑的硬件规模的增加。

5. 发明授权

US07284133B2 Information processing unit 失效
标题翻译：信息处理单元
公开(公告)号：US07284133B2
公开(公告)日：2007-10-16
申请号：US10153616
申请日：2002-05-24
申请人： Takashi Watanabe , Masahiro Kaminaga , Takashi Endo , Seiichi Kumano
发明人： Takashi Watanabe , Masahiro Kaminaga , Takashi Endo , Seiichi Kumano
IPC分类号： G06F12/14
CPC分类号： H04L63/0428 , G06F21/75 , G06Q20/341 , G07F7/082 , G07F7/1008 , H04L9/003 , H04L63/06 , H04L2209/12
摘要： An information processing unit and methods therefore which render it more difficult to infer information being processed within an information processing unit by observing the unit's current consumption or electromagnetic radiation. Specifically, the information processing unit preferably encrypts and decrypts data when the data is read from/written to memories within the unit. The encryption/decryption process may include the use of multiple cryptographic keys, permutated data storage locations, randomly generated keys, and permutated data processing steps.
摘要翻译：因此，信息处理单元和因此通过观察单元的电流消耗或电磁辐射而使信息处理单元内处理信息变得更加困难的方法。具体地说，信息处理单元优选地在数据被读取/写入到单元内的存储器时对数据进行加密和解密。加密/解密过程可以包括使用多个加密密钥，置换数据存储位置，随机生成的密钥以及置换的数据处理步骤。

6. 发明授权

US07254718B2 Tamper-resistant processing method 失效
标题翻译：防篡改加工方法
公开(公告)号：US07254718B2
公开(公告)日：2007-08-07
申请号：US09940985
申请日：2001-08-29
申请人： Masahiro Kaminaga , Takashi Endo , Takashi Watanabe , Masaru Ohki
发明人： Masahiro Kaminaga , Takashi Endo , Takashi Watanabe , Masaru Ohki
IPC分类号： G06F12/14 , H04L9/30
CPC分类号： G06F7/723 , G06F9/3001 , G06F9/30181 , G06F2207/7252 , H04L9/003 , H04L9/302 , H04L2209/08 , H04L2209/127
摘要： The subject of the disclosed technology is, when a crypto-processing is performed utilizing an information processing device buried in an IC card, etc., to decrease the relationship between the waveform of the consumption current and the contents of the crypto-processing as a countermeasure against a tamper which observes the waveform of a consumption current.A solution means is shown in the following. When a decryption processing of an RSA cryptogram is performed according to CRT, in step 608, for every unit bit block of XP a modular exponentiation calculation is performed, and the partial result of CP up to the calculated bit block is stored in a memory. In step 609, for every unit bit block of XQ a modular exponentiation calculation is performed and the partial result of CQ up to the calculated bit block is stored in a memory. In step 606, a random number is generated, and in step 607, it is decided that step 608 is to be executed or step 609 is to be executed corresponding to the value of the random number.
摘要翻译：所公开的技术的主题是，当利用埋在IC卡等中的信息处理装置进行密码处理时，将消耗电流的波形与密码处理的内容之间的关系降低为针对观察消耗电流波形的篡改的对策。解决方案如下所示。当根据CRT执行RSA密码的解密处理时，在步骤608中，对于XP的每个单位比特块进行模幂运算，并将CP的部分结果存储到存储器中。在步骤609中，对于XQ的每个单位比特块，执行模幂运算，并将CQ的部分结果存储到存储器中。在步骤606中，产生随机数，并且在步骤607中，确定要执行步骤608或者对应于随机数的值来执行步骤609。

7. 发明授权

US07451485B2 Information processing unit having tamper-resistant system 有权
标题翻译：信息处理单元具有防篡改系统
公开(公告)号：US07451485B2
公开(公告)日：2008-11-11
申请号：US10124576
申请日：2002-04-18
申请人： Takashi Watanabe , Takashi Endo , Masahiro Kaminaga , Kunihiko Nakada , Yuuichirou Nariyoshi , Chiaki Tanimoto
发明人： Takashi Watanabe , Takashi Endo , Masahiro Kaminaga , Kunihiko Nakada , Yuuichirou Nariyoshi , Chiaki Tanimoto
IPC分类号： G06F9/00 , G06F11/00
CPC分类号： G06F21/52 , G06F21/556
摘要： A malfunction detection system is provided that can continue or terminate processing appropriately even if a malfunction occurs in an information processing unit. In this regard, the information processing unit receives branch direction information, carries out a conditional branch depending on the branch direction information, and performs an applicable operation on data I. At this time, the information processing unit performs an applicable operation on data J, other than the operated data I, in the conditional branch path and outputs the result for examination, thereby enabling validation of the conditional branch.
摘要翻译：提供了即使在信息处理单元中发生故障也可以适当地继续或终止处理的故障检测系统。在这方面，信息处理单元接收分支方向信息，根据分支方向信息执行条件分支，并且对数据I执行适用的操作。此时，信息处理单元对数据J执行适用的操作，在条件分支路径中除了操作数据I之外，并输出结果进行检查，从而能够验证条件分支。

8. 发明授权

US06691921B2 Information processing device 有权
标题翻译：信息处理装置
公开(公告)号：US06691921B2
公开(公告)日：2004-02-17
申请号：US10217565
申请日：2002-08-14
申请人： Takashi Endo , Masahiro Kaminaga , Takashi Watanabe , Kunihiko Nakada , Takashi Tsukamoto
发明人： Takashi Endo , Masahiro Kaminaga , Takashi Watanabe , Kunihiko Nakada , Takashi Tsukamoto
IPC分类号： G06K1906
CPC分类号： G06F7/501 , G06F7/48 , G06F21/72 , G06F21/755 , G06F2207/7219 , H04L9/002 , H04L9/0861 , H04L9/0894
摘要： An object of the present invention is to prevent secret information that is being internally processed from being inferred through operational information of a secured device, including the current consumption information. One solution is provided by an information processing device having at least a key generation apparatus that generates key data automatically, an encryption unit that encrypts data with the corresponding key data, a register that stores a plurality of encrypted data items with the corresponding encryption key data items, and an arithmetic unit that performs operations using data expressed with the corresponding encryption key data and new key data as the input, encrypts the operation result with new input key data, and outputs the result, thereby being capable of performing internal processing on an encrypted data expression. Accordingly, only encrypted data is transferred on the internal or external data bus line.
摘要翻译：本发明的目的是通过包括当前消费信息的安全设备的操作信息来防止内部处理的秘密信息被推断。一种解决方案由至少具有自动生成密钥数据的密钥生成装置的信息处理装置提供，使用相应的密钥数据对数据进行加密的加密单元，存储多个加密的数据项与相应的加密密钥数据的寄存器项目，以及使用由对应的加密密钥数据和新密钥数据表示的数据作为输入进行操作的算术单元，用新的输入密钥数据对运算结果进行加密，并输出结果，从而能够对加密数据表达式。因此，仅在内部或外部数据总线上传送加密数据。

9. 发明授权

US07454017B2 Information processing unit 失效
标题翻译：信息处理单元
公开(公告)号：US07454017B2
公开(公告)日：2008-11-18
申请号：US10990977
申请日：2004-11-18
申请人： Masahiro Kaminaga , Takashi Watanabe , Takashi Endo
发明人： Masahiro Kaminaga , Takashi Watanabe , Takashi Endo
IPC分类号： H04L9/00
CPC分类号： G06F12/1408 , H04L9/003 , H04L9/004 , H04L2209/127
摘要： An object of the present invention is to a provide tamper resistant information processing unit that is used as an IC card with a high level of security.To achieve the above-mentioned object, the information unit of the present invention comprises: a program container part for storing a program; a memory for storing data; an arithmetic unit for performing specified processing according to the program; a data bus for connecting the memory to the arithmetic unit; and a transform function for transforming a logical address and a physical address of the memory, said logical address being used for arithmetic operation by the arithmetic unit, said physical address being set at random corresponding to the logical address at each arithmetic operation or every time the information processing unit is started up.
摘要翻译：本发明的目的是提供一种用于具有高安全级别的IC卡的防篡改信息处理单元。为了实现上述目的，本发明的信息单元包括：用于存储程序的程序容器部分; 用于存储数据的存储器; 用于根据程序执行指定处理的算术单元; 用于将存储器连接到运算单元的数据总线; 以及用于变换存储器的逻辑地址和物理地址的变换函数，所述逻辑地址用于由算术单元进行算术运算，所述物理地址在每个算术运算时或每次运算时被设置为与逻辑地址对应的随机对应信息处理单元启动。

10. 发明授权

US07201326B2 Information processing device 有权
标题翻译：信息处理装置
公开(公告)号：US07201326B2
公开(公告)日：2007-04-10
申请号：US10745540
申请日：2003-12-29
申请人： Takashi Endo , Masahiro Kaminaga , Takashi Watanabe , Kunihiko Nakada , Takashi Tsukamoto
发明人： Takashi Endo , Masahiro Kaminaga , Takashi Watanabe , Kunihiko Nakada , Takashi Tsukamoto
IPC分类号： G06K19/06
CPC分类号： G06F7/501 , G06F7/48 , G06F21/72 , G06F21/755 , G06F2207/7219 , H04L9/002 , H04L9/0861 , H04L9/0894
摘要： An object of the present invention is to prevent secret information that is being internally processed from being inferred through operational information of a secured device, including the current consumption information. One solution is provided by an information processing device having at least a key generation apparatus that generates key data automatically, an encryption unit that encrypts data with the corresponding key data, a register that stores a plurality of encrypted data items with the corresponding encryption key data items, and an arithmetic unit that performs operations using data expressed with the corresponding encryption key data and new key data as the input, encrypts the operation result with new input key data, and outputs the result, thereby being capable of performing internal processing on an encrypted data expression. Accordingly, only encrypted data is transferred on the internal or external data bus line.
摘要翻译：本发明的目的是通过包括当前消费信息的安全设备的操作信息来防止内部处理的秘密信息被推断。一种解决方案由至少具有自动生成密钥数据的密钥生成装置的信息处理装置提供，使用相应的密钥数据对数据进行加密的加密单元，存储多个加密的数据项与相应的加密密钥数据的寄存器项目，以及使用由对应的加密密钥数据和新密钥数据表示的数据作为输入进行操作的算术单元，用新的输入密钥数据对运算结果进行加密，并输出结果，从而能够对加密数据表达式。因此，仅在内部或外部数据总线上传送加密数据。

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