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    • 6. 发明授权
    • Packet transfer apparatus
    • 分组传送装置
    • US07876778B2
    • 2011-01-25
    • US12073951
    • 2008-03-12
    • Masayuki TakaseHideki EndoTakayuki KannoAkihiko TanakaYoshihiro AshiNobuyuki Yamamoto
    • Masayuki TakaseHideki EndoTakayuki KannoAkihiko TanakaYoshihiro AshiNobuyuki Yamamoto
    • H04J3/16
    • H04L69/08H04L12/5601H04L45/74H04L2012/5654H04L2012/5658H04L2012/5667H04L2012/5669H04L2012/5671
    • A packet transfer apparatus connects two networks of different protocols. The packet transfer apparatus, connected to a first communication network and a second communication network, performs the steps of: storing first destination correspondence information; receiving a packet of the first communication protocol; based on the first destination correspondence information, determining destination information of a packet of the second communication protocol corresponding to destination information of the received packet of the first communication protocol; generating the header of the packet of the second communication protocol, based on the determined destination information of the packet of the second communication protocol; converting the received one or more packets of the first communication protocol into one or more packets of the third communication protocol; and adding the generated header of the packet of the second communication protocol to the packets of the third communication protocol.
    • 分组传送装置连接不同协议的两个网络。 连接到第一通信网络和第二通信网络的分组传送装置执行以下步骤:存储第一目的地对应信息; 接收第一通信协议的分组; 基于所述第一目的地对应信息,确定与所述第一通信协议的接收分组的目的地信息相对应的所述第二通信协议的分组的目的地信息; 基于所确定的第二通信协议的分组的目的地信息,生成第二通信协议的分组的报头; 将所接收的第一通信协议的一个或多个分组转换成第三通信协议的一个或多个分组; 以及将生成的第二通信协议的分组的报头添加到第三通信协议的分组。
    • 10. 发明申请
    • Bit synchronization circuit with phase tracking function
    • 位同步电路具有相位跟踪功能
    • US20070030937A1
    • 2007-02-08
    • US11299819
    • 2005-12-13
    • Yusuke YajimaTohru KazawaYoshihiro Ashi
    • Yusuke YajimaTohru KazawaYoshihiro Ashi
    • H03D3/24
    • H04L7/0337H03L7/0814H03L7/087H03L7/091H04L7/0004H04L7/046
    • A bit synchronization circuit comprising an initial phase determining unit for rapidly determining, during a period of receiving a preamble of burst data, a clock with a phase synchronized with received burst data from among multi-phase clocks having the same frequency as an internal reference clock and a phase tracking unit for modifying the synchronized phase clock responsive to phase variation of received data during a period of receiving a payload of burst data by taking the synchronized phase clock determined by the initial phase determining unit as an initial phase. The bit synchronization circuit retimes burst data with a data retiming clock having a predetermined phase relation with the synchronized phase clock and outputs the burst data in synchronization with the internal reference clock.
    • 一种位同步电路,包括初始相位确定单元,用于在从脉冲串数据的前导码接收周期内快速确定具有与内部参考时钟相同频率的多相位时钟中的接收脉冲串数据同步的时钟 以及相位跟踪单元,用于通过将由初始相位确定单元确定的同步相位时钟作为初始相位,在接收到突发数据的有效载荷的周期期间响应于接收数据的相位变化来修正同步相位时钟。 位同步电路使用具有与同步相位时钟具有预定相位关系的数据重新定时时钟重新匹配突发数据,并且与内部参考时钟同步输出脉冲串数据。