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1. 发明授权

US08191026B2 Semiconductor integrated circuit and switch arranging and wiring method 有权
标题翻译：半导体集成电路和开关布置及布线方法
公开(公告)号：US08191026B2
公开(公告)日：2012-05-29
申请号：US12314111
申请日：2008-12-04
申请人： Tetsuo Motomura
发明人： Tetsuo Motomura
IPC分类号： G06F17/50
CPC分类号： H01L27/092 , H01L27/0207 , H01L27/11807 , H01L2924/0002 , H03K19/0016 , H01L2924/00
摘要： A semiconductor integrated circuit includes: a circuit block having a first power supply line to which one of a power supply voltage and a reference voltage is applied, an internal voltage line, and a circuit cell connected between the first power supply line and the internal voltage line; and a plurality of switch cells each including two voltage cell lines each connected electrically to the internal voltage line, two power cell lines each connected electrically to a second power supply line to which another of the power supply voltage and the reference voltage is applied, a control cell line electrically connected to a switch control line, and a transistor electrically connected between the internal voltage line and the second power supply line.
摘要翻译：一种半导体集成电路包括：电路块，具有施加电源电压和参考电压中的一个的第一电源线，内部电压线和连接在第一电源线和内部电压之间的电路单元线; 以及多个开关单元，每个开关单元包括各自与内部电压线电连接的两个电压单元线，两个电源单元电路各自与施加另一个电源电压和参考电压的第二电源线相连，电连接到开关控制线的控制电池线，以及电连接在内部电压线和第二电源线之间的晶体管。

2. 发明申请

US20080258789A1 Flip-flop and semiconductor integrated circuit 失效
标题翻译：触发器和半导体集成电路
公开(公告)号：US20080258789A1
公开(公告)日：2008-10-23
申请号：US11976244
申请日：2007-10-23
申请人： Tetsuo Motomura
发明人： Tetsuo Motomura
IPC分类号： H03K3/289
CPC分类号： H03K3/012 , H03K3/356156
摘要： A flip-flop is disclosed which includes: a clock supply circuit configured to output or fix a clock signal alternating between two predetermined states in accordance with a sleep signal; a first holding circuit configured to fetch or hold an input signal in accordance with a state the clock signal indicates; a second holding circuit configured to fetch or hold a first signal output by the first holding circuit in accordance with a state the clock signal indicates; an input switching circuit configured to supply as the input signal a second signal output by the second holding circuit or to supply an external signal as the input signal in accordance with the hold signal; and a power supply control circuit configured to supply or not to supply power to the first holding circuit and the input switching circuit in accordance with a power supply control signal.
摘要翻译：公开了一种触发器，其包括：时钟供给电路，被配置为根据睡眠信号输出或固定在两个预定状态之间交替的时钟信号; 第一保持电路，被配置为根据时钟信号指示的状态获取或保持输入信号; 第二保持电路，被配置为根据时钟信号指示的状态获取或保持由第一保持电路输出的第一信号; 输入切换电路，被配置为将由第二保持电路输出的第二信号作为输入信号提供，或者根据保持信号提供外部信号作为输入信号; 以及电源控制电路，被配置为根据电源控制信号提供或不向第一保持电路和输入开关电路供电。

3. 发明授权

US07151862B2 Image processing apparatus and method, storage medium, and program 失效
公开(公告)号：US07151862B2
公开(公告)日：2006-12-19
申请号：US10299297
申请日：2002-11-19
申请人： Tanio Nagasaki , Hideaki Tomikawa , Seigo Iwasaki , Tetsuo Motomura , Masahiro Igarashi
发明人： Tanio Nagasaki , Hideaki Tomikawa , Seigo Iwasaki , Tetsuo Motomura , Masahiro Igarashi
IPC分类号： G06K9/32 , G06K9/36
CPC分类号： G06T15/04 , G06T2210/36
摘要： Texture data filtered according to each of different reduction ratio are stored in a texture buffer. A texture mapping apparatus (an lod calculating apparatus) calculates an lod (Level Of Detail) which represents a reduction ratio of each pixel of a polygon. The calculation does not include a divisional calculation. In other words, the lod calculating apparatus does not need many multipliers, as compared with a case in which an operation including a divisional calculation, thereby enabling the down-sizing of the lod calculating apparatus.

4. 发明申请

US20090309418A1 Semiconductor integrated circuit 有权
标题翻译：半导体集成电路
公开(公告)号：US20090309418A1
公开(公告)日：2009-12-17
申请号：US12453498
申请日：2009-05-13
申请人： Tetsuo Motomura
发明人： Tetsuo Motomura
IPC分类号： H02J3/14
CPC分类号： H01L27/11807 , G06F1/3287 , H01L23/5286 , H01L27/0207 , H01L27/088 , H01L2924/0002 , H03K19/0016 , Y02B70/126 , Y02D10/171 , Y10T307/461 , H01L2924/00
摘要： Disclosed herein is a semiconductor integrated circuit including: a cell layout region including circuit cells subject to power control the supply and interruption of power to which is controlled by a power switch, and always-on circuit cell groups which are always powered after the activation; a main line laid out in the cell layout region and applied with a source or reference voltage; and first and second branch lines which branch from the main line in the cell layout region.
摘要翻译：本发明公开了一种半导体集成电路，包括：电池布局区域，包括受电源控制的电路单元，电源电源由电源开关控制，以及总是在激活之后始终供电的电路单元组; 布置在电池布局区域并施加源极或参考电压的主线; 以及从单元布局区域中的主线分支的第一和第二分支线。

5. 发明申请

US20090184758A1 Semiconductor integrated circuit and switch arranging and wiring method apparatus 有权
标题翻译：半导体集成电路和开关布置及布线方法设备
公开(公告)号：US20090184758A1
公开(公告)日：2009-07-23
申请号：US12314111
申请日：2008-12-04
申请人： Tetsuo Motomura
发明人： Tetsuo Motomura
IPC分类号： G05F3/02
CPC分类号： H01L27/092 , H01L27/0207 , H01L27/11807 , H01L2924/0002 , H03K19/0016 , H01L2924/00
摘要： A semiconductor integrated circuit includes: a circuit block having a first power supply line to which one of a power supply voltage and a reference voltage is applied, an internal voltage line, and a circuit cell connected between the first power supply line and the internal voltage line; and a plurality of switch cells each including two voltage cell lines each connected electrically to the internal voltage line, two power cell lines each connected electrically to a second power supply line to which another of the power supply voltage and the reference voltage is applied, a control cell line electrically connected to a switch control line, and a transistor electrically connected between the internal voltage line and the second power supply line.
摘要翻译：一种半导体集成电路包括：电路块，具有施加电源电压和参考电压中的一个的第一电源线，内部电压线和连接在第一电源线和内部电压之间的电路单元线; 以及多个开关单元，每个开关单元包括各自与内部电压线电连接的两个电压单元线，两个电源单元电路各自与施加另一个电源电压和参考电压的第二电源线相连，电连接到开关控制线的控制电池线，以及电连接在内部电压线和第二电源线之间的晶体管。

6. 发明申请

US20090179688A1 Semiconductor integrated circuit and power-supply control method 有权
标题翻译：半导体集成电路和电源控制方法
公开(公告)号：US20090179688A1
公开(公告)日：2009-07-16
申请号：US12318934
申请日：2009-01-13
申请人： Masahiro Igarashi , Tetsuo Motomura , Ryuji Kaneko , Makoto Fujiwara , Yoshinori Tanaka , Hiromi Ogata
发明人： Masahiro Igarashi , Tetsuo Motomura , Ryuji Kaneko , Makoto Fujiwara , Yoshinori Tanaka , Hiromi Ogata
IPC分类号： H03K17/687
CPC分类号： H03K17/164 , H03K17/102 , H03K19/0016
摘要： A semiconductor integrated circuit includes: a first voltage line on which a specific one of a power-supply voltage and a reference voltage appears; a second voltage line; a plurality of circuit cells each receiving power generated as a difference between a voltage appearing on the second voltage line and the other one of the power-supply voltage and the reference voltage; a plurality of switch transistors connected in parallel between the first and second voltage lines to serve as switch transistors including switch transistors each having different conducting-state resistances; and a switch conduction control section for controlling a transition of each of the switch transistors from a non-conducting state to a conducting state by turning on the switch transistors at separate points of time.
摘要翻译：半导体集成电路包括：第一电压线，其中出现电源电压和参考电压中的特定一个; 第二电压线; 多个电路单元，每个电路单元接收作为所述第二电压线上出现的电压和所述电源电压和所述参考电压中的另一个之间的差产生的功率; 多个开关晶体管并联连接在第一和第二电压线之间，用作包括具有不同导通状态电阻的开关晶体管的开关晶体管; 以及开关导通控制部分，用于通过在分开的时间点导通开关晶体管来控制每个开关晶体管从非导通状态到导通状态的转变。

7. 发明授权

US09048140B2 Semiconductor integrated circuit 有权
公开(公告)号：US09048140B2
公开(公告)日：2015-06-02
申请号：US12453498
申请日：2009-05-13
申请人： Tetsuo Motomura
发明人： Tetsuo Motomura
IPC分类号： H02J3/14 , H01L27/118 , G06F1/32 , H01L27/02 , H03K19/00 , H01L23/528
CPC分类号： H01L27/11807 , G06F1/3287 , H01L23/5286 , H01L27/0207 , H01L27/088 , H01L2924/0002 , H03K19/0016 , Y02B70/126 , Y02D10/171 , Y10T307/461 , H01L2924/00
摘要： Disclosed herein is a semiconductor integrated circuit including: a cell layout region including circuit cells subject to power control the supply and interruption of power to which is controlled by a power switch, and always-on circuit cell groups which are always powered after the activation; a main line laid out in the cell layout region and applied with a source or reference voltage; and first and second branch lines which branch from the main line in the cell layout region.

8. 发明授权

US07956677B2 Semiconductor integrated circuit and power-supply control method 有权
标题翻译：半导体集成电路和电源控制方法
公开(公告)号：US07956677B2
公开(公告)日：2011-06-07
申请号：US12318934
申请日：2009-01-13
申请人： Masahiro Igarashi , Tetsuo Motomura , Ryuji Kaneko , Makoto Fujiwara , Yoshinori Tanaka , Hiromi Ogata
发明人： Masahiro Igarashi , Tetsuo Motomura , Ryuji Kaneko , Makoto Fujiwara , Yoshinori Tanaka , Hiromi Ogata
IPC分类号： H03K17/72
CPC分类号： H03K17/164 , H03K17/102 , H03K19/0016
摘要： A semiconductor integrated circuit includes: a first voltage line on which a specific one of a power-supply voltage and a reference voltage appears; a second voltage line; a plurality of circuit cells each receiving power generated as a difference between a voltage appearing on the second voltage line and the other one of the power-supply voltage and the reference voltage; a plurality of switch transistors connected in parallel between the first and second voltage lines to serve as switch transistors including switch transistors each having different conducting-state resistances; and a switch conduction control section for controlling a transition of each of the switch transistors from a non-conducting state to a conducting state by turning on the switch transistors at separate points of time.
摘要翻译：半导体集成电路包括：第一电压线，其中出现电源电压和参考电压中的特定一个; 第二电压线; 多个电路单元，每个电路单元接收作为所述第二电压线上出现的电压和所述电源电压和所述参考电压中的另一个之间的差产生的功率; 多个开关晶体管并联连接在第一和第二电压线之间，用作包括具有不同导通状态电阻的开关晶体管的开关晶体管; 以及开关导通控制部分，用于通过在分开的时间点导通开关晶体管来控制每个开关晶体管从非导通状态到导通状态的转变。

9. 发明授权

US07616040B2 Flip-flop and semiconductor integrated circuit 失效
标题翻译：触发器和半导体集成电路
公开(公告)号：US07616040B2
公开(公告)日：2009-11-10
申请号：US11976244
申请日：2007-10-23
申请人： Tetsuo Motomura
发明人： Tetsuo Motomura
IPC分类号： H03K3/289
CPC分类号： H03K3/012 , H03K3/356156
摘要： A flip-flop is disclosed which includes: a clock supply circuit configured to output or fix a clock signal alternating between two predetermined states in accordance with a sleep signal; a first holding circuit configured to fetch or hold an input signal in accordance with a state the clock signal indicates; a second holding circuit configured to fetch or hold a first signal output by the first holding circuit in accordance with a state the clock signal indicates; an input switching circuit configured to supply as the input signal a second signal output by the second holding circuit or to supply an external signal as the input signal in accordance with the hold signal; and a power supply control circuit configured to supply or not to supply power to the first holding circuit and the input switching circuit in accordance with a power supply control signal.
摘要翻译：公开了一种触发器，其包括：时钟供给电路，被配置为根据睡眠信号输出或固定在两个预定状态之间交替的时钟信号; 第一保持电路，被配置为根据时钟信号指示的状态获取或保持输入信号; 第二保持电路，被配置为根据时钟信号指示的状态获取或保持由第一保持电路输出的第一信号; 输入切换电路，被配置为将由第二保持电路输出的第二信号作为输入信号提供，或者根据保持信号提供外部信号作为输入信号; 以及电源控制电路，被配置为根据电源控制信号提供或不向第一保持电路和输入开关电路供电。

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