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1. 发明授权

US07865012B2 Semiconductor failure analysis apparatus which acquires a failure observed image, failure analysis method, and failure analysis program 有权
标题翻译：获取故障观察图像，故障分析方法和故障分析程序的半导体故障分析装置
公开(公告)号：US07865012B2
公开(公告)日：2011-01-04
申请号：US11586721
申请日：2006-10-26
申请人： Toshiyuki Majima , Akira Shimase , Hirotoshi Terada , Kazuhiro Hotta
发明人： Toshiyuki Majima , Akira Shimase , Hirotoshi Terada , Kazuhiro Hotta
IPC分类号： G06K9/00
CPC分类号： G01N21/95607 , G01N2021/95615
摘要： A failure analysis apparatus 10 is composed of an inspection information acquirer 11 for acquiring a failure observed image P2 of a semiconductor device, a layout information acquirer 12 for acquiring layout information, and a failure analyzer 13 for analyzing a failure. The failure analyzer 13 extracts as a candidate interconnection for a failure, an interconnection passing an analysis region, out of a plurality of interconnections, using interconnection information to describe a configuration of interconnections in the semiconductor device by a pattern data group of interconnection patterns in respective layers, and, for extracting the candidate interconnection, it performs an equipotential trace of the interconnection patterns using the pattern data group, thereby extracting the candidate interconnection. This substantializes a semiconductor failure analysis apparatus, failure analysis method, and failure analysis program capable of securely and efficiently performing the analysis of the failure of the semiconductor device using the failure observed image.
摘要翻译：故障分析装置10由用于获取半导体装置的故障观察图像P2的检查信息获取部11，用于获取布局信息的布局信息获取部12以及用于分析故障的故障分析部13构成。故障分析器13通过互连信息提取出故障的候选互连，通过分析区域的互连，使用互连信息，以通过相应的互连模式的图案数据组来描述半导体器件中的互连的配置并且为了提取候选互连，它使用模式数据组来执行互连模式的等势线，从而提取候选互连。这实现了半导体故障分析装置，故障分析方法和故障分析程序，其能够安全有效地执行使用故障观察图像的半导体器件的故障的分析。

2. 发明授权

US07805691B2 Semiconductor failure analysis apparatus, failure analysis method, and failure analysis program 有权
标题翻译：半导体故障分析装置，故障分析方法和故障分析程序
公开(公告)号：US07805691B2
公开(公告)日：2010-09-28
申请号：US11586719
申请日：2006-10-26
申请人： Toshiyuki Majima , Akira Shimase , Hirotoshi Terada , Kazuhiro Hotta
发明人： Toshiyuki Majima , Akira Shimase , Hirotoshi Terada , Kazuhiro Hotta
IPC分类号： G06F17/50
CPC分类号： G01R31/311 , G01N21/95607 , G01R31/2894
摘要： A failure analysis apparatus 10 is composed of an inspection information acquirer 11 for acquiring a failure observed image P2 of a semiconductor device, a layout information acquirer 12 for acquiring layout information, and a failure analyzer 13 for analyzing a failure. The failure analyzer 13 extracts candidate nets passing at least one of analysis regions set from the failure observed image, out of a plurality of nets in the semiconductor device, and passage counts of the respective candidate nets through the analysis regions, selects a candidate net with the largest passage count as a first failure net, and selects a second failure net with attention to analysis regions where the first failure net does not pass. This substantializes a semiconductor failure analysis apparatus, failure analysis method, and failure analysis program capable of securely and efficiently performing the analysis of the failure of the semiconductor device using the failure observed image.
摘要翻译：故障分析装置10由用于获取半导体装置的故障观察图像P2的检查信息获取部11，用于获取布局信息的布局信息获取部12以及用于分析故障的故障分析部13构成。故障分析部13从通过半导体装置的多个网络中的故障观察图像，从故障观察图像设定的分析区域中的至少一个以及通过分析区域的各个候选网络的通过计数来提取候补网络，选择候补网络作为第一故障网络的最大通行数，并且选择第二故障网络，注意第一故障网络不通过的分析区域。这实现了半导体故障分析装置，故障分析方法和故障分析程序，其能够安全有效地执行使用故障观察图像的半导体器件的故障的分析。

3. 发明申请

US20070294053A1 Semiconductor failure analysis apparatus, failure analysis method, and failure analysis program 有权
标题翻译：半导体故障分析装置，故障分析方法和故障分析程序
公开(公告)号：US20070294053A1
公开(公告)日：2007-12-20
申请号：US11586719
申请日：2006-10-26
申请人： Toshiyuki Majima , Akira Shimase , Hirotoshi Terada , Kazuhiro Hotta
发明人： Toshiyuki Majima , Akira Shimase , Hirotoshi Terada , Kazuhiro Hotta
IPC分类号： G01R31/00
CPC分类号： G01R31/311 , G01N21/95607 , G01R31/2894
摘要： A failure analysis apparatus 10 is composed of an inspection information acquirer 11 for acquiring a failure observed image P2 of a semiconductor device, a layout information acquirer 12 for acquiring layout information, and a failure analyzer 13 for analyzing a failure. The failure analyzer 13 extracts candidate nets passing at least one of analysis regions set from the failure observed image, out of a plurality of nets in the semiconductor device, and passage counts of the respective candidate nets through the analysis regions, selects a candidate net with the largest passage count as a first failure net, and selects a second failure net with attention to analysis regions where the first failure net does not pass. This substantializes a semiconductor failure analysis apparatus, failure analysis method, and failure analysis program capable of securely and efficiently performing the analysis of the failure of the semiconductor device using the failure observed image.
摘要翻译：失效分析装置10由用于获取半导体器件的故障观察图像P 2的检查信息获取器11，用于获取布局信息的布局信息获取器12以及用于分析故障的故障分析器13组成。故障分析部13从通过半导体装置的多个网络中的故障观察图像，从故障观察图像设定的分析区域中的至少一个以及通过分析区域的各个候选网络的通过计数来提取候补网络，选择候补网络作为第一故障网络的最大通行数，并且选择第二故障网络，注意第一故障网络不通过的分析区域。这实现了半导体故障分析装置，故障分析方法和故障分析程序，其能够安全有效地执行使用故障观察图像的半导体器件的故障的分析。

4. 发明申请

US20070290696A1 Semiconductor failure analysis apparatus, failure analysis method, and failure analysis program 审中-公开
标题翻译：半导体故障分析装置，故障分析方法和故障分析程序
公开(公告)号：US20070290696A1
公开(公告)日：2007-12-20
申请号：US11586720
申请日：2006-10-26
申请人： Toshiyuki Majima , Akira Shimase , Hirotoshi Terada , Kazuhiro Hotta
发明人： Toshiyuki Majima , Akira Shimase , Hirotoshi Terada , Kazuhiro Hotta
IPC分类号： G01R31/302
CPC分类号： G01R31/303
摘要： A failure analysis apparatus 10 is composed of an inspection information acquirer 11 for acquiring a failure observed image P2 of a semiconductor device, a layout information acquirer 12 for acquiring layout information, and a failure analyzer 13 for analyzing a failure of the semiconductor device. The failure analyzer 13 has an analysis region setter for comparing an intensity distribution in the failure observed image with a predetermined intensity threshold to extract a reaction region arising from a failure, and for setting an analysis region used in the failure analysis of the semiconductor device, in correspondence to the reaction region. This substantializes a semiconductor failure analysis apparatus, failure analysis method, and failure analysis program capable of securely and efficiently performing the analysis of the failure of the semiconductor device using the failure observed image.
摘要翻译：故障分析装置10由用于获取半导体器件的故障观察图像P 2的检查信息获取器11，用于获取布局信息的布局信息获取器12以及用于分析半导体器件的故障的故障分析器13构成。故障分析器13具有分析区域设定器，用于将故障观察图像中的强度分布与预定强度阈值进行比较，以提取由故障引起的反应区域，并且用于设定在半导体器件的故障分析中使用的分析区域，对应于反应区域。这实现了半导体故障分析装置，故障分析方法和故障分析程序，其能够安全有效地执行使用故障观察图像的半导体器件的故障的分析。

5. 发明申请

US20070292018A1 Semiconductor failure analysis apparatus, failure analysis method, and failure analysis program 有权
标题翻译：半导体故障分析装置，故障分析方法和故障分析程序
公开(公告)号：US20070292018A1
公开(公告)日：2007-12-20
申请号：US11586721
申请日：2006-10-26
申请人： Toshiyuki Majima , Akira Shimase , Hirotoshi Terada , Kazuhiro Hotta
发明人： Toshiyuki Majima , Akira Shimase , Hirotoshi Terada , Kazuhiro Hotta
IPC分类号： G01R31/303
CPC分类号： G01N21/95607 , G01N2021/95615
摘要： A failure analysis apparatus 10 is composed of an inspection information acquirer 11 for acquiring a failure observed image P2 of a semiconductor device, a layout information acquirer 12 for acquiring layout information, and a failure analyzer 13 for analyzing a failure. The failure analyzer 13 extracts as a candidate interconnection for a failure, an interconnection passing an analysis region, out of a plurality of interconnections, using interconnection information to describe a configuration of interconnections in the semiconductor device by a pattern data group of interconnection patterns in respective layers, and, for extracting the candidate interconnection, it performs an equipotential trace of the interconnection patterns using the pattern data group, thereby extracting the candidate interconnection. This substantializes a semiconductor failure analysis apparatus, failure analysis method, and failure analysis program capable of securely and efficiently performing the analysis of the failure of the semiconductor device using the failure observed image.
摘要翻译：失效分析装置10由用于获取半导体器件的故障观察图像P 2的检查信息获取器11，用于获取布局信息的布局信息获取器12以及用于分析故障的故障分析器13组成。故障分析器13通过互连信息提取出故障的候选互连，通过分析区域的互连，使用互连信息，以通过相应的互连模式的图案数据组来描述半导体器件中的互连的配置并且为了提取候选互连，它使用模式数据组来执行互连模式的等势线，从而提取候选互连。这实现了半导体故障分析装置，故障分析方法和故障分析程序，其能够安全有效地执行使用故障观察图像的半导体器件的故障的分析。

6. 发明申请

US20070020781A1 Semiconductor failure analysis apparatus, failure analysis method, and failure analysis program 审中-公开
标题翻译：半导体故障分析装置，故障分析方法和故障分析程序
公开(公告)号：US20070020781A1
公开(公告)日：2007-01-25
申请号：US11409272
申请日：2006-04-24
申请人： Toshiyuki Majima , Akira Shimase , Hirotoshi Terada , Kazuhiro Hotta , Masahiro Takeda
发明人： Toshiyuki Majima , Akira Shimase , Hirotoshi Terada , Kazuhiro Hotta , Masahiro Takeda
IPC分类号： H01L21/66
CPC分类号： G01N21/956 , G06T7/001 , G06T2207/30148
摘要： A failure analysis apparatus 10 is composed of an inspection information acquirer 11 for acquiring a failure observed image P2 of a semiconductor device, a layout information acquirer 12 for acquiring layout information, a failure analyzer 13 for analyzing a failure of the semiconductor device, and an analysis screen display controller 14 for letting a display device 40 display information about a result of the analysis. The failure analyzer 13 sets an analysis region with reference to the failure observed image P2, and extracts a net passing the analysis region, from a plurality of nets included in a layout of the semiconductor device. This substantializes a semiconductor failure analysis apparatus, analysis method, and analysis program capable of securely and efficiently performing the analysis of the failure of the semiconductor device.
摘要翻译：失效分析装置10由用于获取半导体装置的故障观察图像P 2的检查信息获取部11，用于获取布局信息的布局信息获取部12，用于分析半导体装置的故障的故障分析部13，以及用于使显示装置40显示关于分析结果的信息的分析屏幕显示控制器14。故障分析器13参照故障观察图像P 2设定分析区域，从包含在半导体装置的布局中的多个网络提取通过分析区域的网络。这实现了能够安全有效地执行半导体器件的故障分析的半导体故障分析装置，分析方法和分析程序。

7. 发明授权

US08582202B2 Observing device and method 有权
标题翻译：观察装置和方法
公开(公告)号：US08582202B2
公开(公告)日：2013-11-12
申请号：US12665588
申请日：2008-06-13
申请人： Hirotoshi Terada , Hiroshi Tanabe
发明人： Hirotoshi Terada , Hiroshi Tanabe
IPC分类号： G02B21/00
CPC分类号： G02B21/0016 , G01N21/9501 , G02B7/022 , G02B21/248 , G02B21/33
摘要： When it is detected that a solid immersion lens comes into contact with the semiconductor device, the lens is caused to vibrate by a vibration generator unit. Next, a reflected light image from the lens is input to calculate a reflected light quantity of the reflected light image, and it is judged whether a ratio of the reflected light quantity to an incident light quantity is not greater than a threshold value. When the ratio is greater than the threshold value, it is judged that optical close contact between the lens and the semiconductor device is not achieved, and the lens is again caused to vibrate. When the ratio is not greater than the threshold value, it is judged that optical close contact between the lens and the semiconductor device is achieved, and an observed image of the semiconductor device is acquired.
摘要翻译：当检测到固体浸没透镜与半导体器件接触时，透镜被振动发生器单元振动。接下来，输入来自透镜的反射光图像以计算反射光图像的反射光量，并且判断反射光量与入射光量的比率是否不大于阈值。当比率大于阈值时，判断透镜和半导体器件之间的光学紧密接触没有实现，并且再次使透镜振动。当比率不大于阈值时，判断透镜和半导体器件之间的光学紧密接触是实现的，并且获得了半导体器件的观察图像。

8. 发明申请

US20130120563A1 IMAGE GENERATION DEVICE 审中-公开
标题翻译：图像生成装置
公开(公告)号：US20130120563A1
公开(公告)日：2013-05-16
申请号：US13806486
申请日：2011-06-17
申请人： Hirotoshi Terada , Yoshitake Iwaki , Tomonori Nakamura , Teruo Takahashi
发明人： Hirotoshi Terada , Yoshitake Iwaki , Tomonori Nakamura , Teruo Takahashi
IPC分类号： G01B11/02
CPC分类号： G01B11/022 , G02B5/001 , G02B21/0016 , G02B21/002
摘要： An image generation device 1 comprises a laser light source 3, a laser output control unit 11, a laser scanner 5, a modulation pattern control unit 15 for such control as to irradiate the object with illumination light having a plurality of spatial modulation patterns, an electric signal detector 7 for detecting an electric signal issued from the object A, an electric signal imaging unit 17 for generating a two-dimensional characteristic image including characteristic distribution information associating illumination position information with characteristic information, and an image data operation unit 19 for generating a pattern image of the object A according to a plurality of characteristic images generated so as to correspond to the plurality of spatial modulation patterns.
摘要翻译：图像生成装置1包括激光光源3，激光输出控制部11，激光扫描器5，调制图案控制部15，用于对具有多个空间调制图案的照明光照射物体的控制，用于检测从对象A发出的电信号的电信号检测器7，用于产生包括将照明位置信息与特征信息相关联的特征分布信息的二维特征图像的电信号成像单元17和用于产生根据生成的与多个空间调制图案对应的多个特征图像，对象A的图案图像。

9. 发明申请

US20100202041A1 OBSERVING DEVICE AND METHOD 有权
标题翻译：观察装置和方法
公开(公告)号：US20100202041A1
公开(公告)日：2010-08-12
申请号：US12665588
申请日：2008-06-13
申请人： Hirotoshi Terada , Hiroshi Tanabe
发明人： Hirotoshi Terada , Hiroshi Tanabe
IPC分类号： G02B21/02
CPC分类号： G02B21/0016 , G01N21/9501 , G02B7/022 , G02B21/248 , G02B21/33
摘要： When a semiconductor device 11 is observed, first, when it is detected that a solid immersion lens 6 comes into contact with the semiconductor device 11, the solid immersion lens 6 is caused to vibrate by a vibration generator unit. Next, a reflected light image from the solid immersion lens 6 is input to calculate a reflected light quantity m of the reflected light image, and it is judged whether a ratio (m/n) of the reflected light quantity m to an incident light quantity n is not greater than a threshold value A. When the ratio (m/n) is greater than the threshold value A, it is judged that optical close contact between the solid immersion lens 6 and the semiconductor device 11 is not achieved, and the solid immersion lens 6 is again caused to vibrate. When the ratio (m/n) is not greater than the threshold value A, it is judged that optical close contact between the solid immersion lens 6 and the semiconductor device 11 is achieved, and an observed image of the semiconductor device 11 is acquired. Thereby, achieving an observation apparatus and method capable of improving the close contact between the solid immersion lens and an observation object.
摘要翻译：当观察到半导体器件11时，首先，当检测到固体浸没透镜6与半导体器件11接触时，使固体浸没透镜6由振动发生器单元振动。接下来，输入来自固体浸没透镜6的反射光图像以计算反射光图像的反射光量m，并且判断反射光量m与入射光量的比（m / n） n不大于阈值A.当比率（m / n）大于阈值A时，判断为没有实现固体浸没透镜6与半导体器件11之间的光学紧密接触，并且再次使固体浸没透镜6振动。当比率（m / n）不大于阈值A时，判断固体浸没透镜6与半导体器件11之间的光学紧密接触，并且获得半导体器件11的观察图像。由此，能够实现能够改善固体浸没透镜与观察对象物之间的紧密接触的观察装置和方法。

10. 发明申请

US20070146871A1 Microscope and sample observation method 审中-公开
标题翻译：显微镜和样品观察法
公开(公告)号：US20070146871A1
公开(公告)日：2007-06-28
申请号：US11711638
申请日：2007-02-28
申请人： Hirotoshi Terada , Ikuo Arata
发明人： Hirotoshi Terada , Ikuo Arata
IPC分类号： G02B21/00
CPC分类号： G01N21/1717 , G01N21/8806 , G01N21/9501 , G01N2021/0342 , G02B21/02 , G02B21/365
摘要： For a semiconductor device S as a sample of an observed object, there are provided an image acquisition part 1 for carrying out observation of the semiconductor device S, and an optical system 2 comprising an objective lens 20. A solid immersion lens (SIL) 3 for magnifying an image of the semiconductor device S is arranged movable between an insertion position where the solid immersion lens includes an optical axis from the semiconductor device S to the objective lens 20 and is in close contact with a surface of the semiconductor device S, and a standby position off the optical axis. Then an image containing reflected light from SIL 3 is acquired with the SIL 3 at the insertion position, and the insertion position of SIL 3 is adjusted by SIL driver 30, with reference to the image. This realizes a semiconductor inspection apparatus (microscope) capable of readily performing observation of the sample necessary for an analysis of microstructure of a semiconductor device or the like, and a semiconductor inspection method (sample observation method) therewith.
摘要翻译：对于作为观察对象的样本的半导体器件S，设置有用于执行半导体器件S的观察的图像获取部分1和包括物镜20的光学系统2.固体浸没透镜（SIL）3 用于放大半导体器件S的图像的布置可以在固体浸没透镜包括从半导体器件S到物镜20的光轴并且与半导体器件S的表面紧密接触的插入位置之间移动，以及离开光轴的待机位置。然后，通过SIL 3在插入位置获取包含来自SIL 3的反射光的图像，并且参考图像，通过SIL驱动器30调整SIL 3的插入位置。这实现了能够容易地观察对半导体装置等的微结构进行分析所需的样品的半导体检查装置（显微镜）以及半导体检查方法（样本观察方法）。

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