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1. 发明授权

US09043586B2 Memory training results corresponding to a plurality of memory modules 有权
标题翻译：对应于多个存储器模块的存储器训练结果
公开(公告)号：US09043586B2
公开(公告)日：2015-05-26
申请号：US13332092
申请日：2011-12-20
申请人： William H. Cox, Jr. , Jimmy G. Foster, Sr. , Sumeet Kochar , Ivan R. Zapata
发明人： William H. Cox, Jr. , Jimmy G. Foster, Sr. , Sumeet Kochar , Ivan R. Zapata
IPC分类号： G06F9/00 , G06F13/00 , G06F12/06
CPC分类号： G06F12/0646 , G06F11/3051 , G11C5/04 , G11C7/1066 , G11C7/1093 , G11C29/023 , G11C29/028 , G11C2207/2254
摘要： Methods, apparatuses, and computer program products for improving memory training results corresponding to a plurality of memory modules are provided. Embodiments include detecting a hardware configuration change upon initiating a boot sequence of a system that includes the plurality of memory modules; generating for a plurality of training iterations, reference training values corresponding to aligning of a data strobe (DQS) signal with a data valid window of data (DQ) lines of the plurality of memory modules; identifying for each training iteration, any outer values within the reference training values generated for that training iteration; eliminating the identified outer values from the reference training values; generating a final reference training value based on an average of the remaining reference training values; and using the final reference training value as the DQ-DQS timing value for the boot sequence of the system.
摘要翻译：提供了用于改善对应于多个存储器模块的存储器训练结果的方法，装置和计算机程序产品。实施例包括在启动包括多个存储器模块的系统的引导顺序时检测硬件配置变化; 产生多个训练迭代，对应于数据选通（DQS）信号与所述多个存储器模块的数据有效数据（DQ）行窗口的对准的参考训练值; 识别每个训练迭代，为该训练迭代生成的参考训练值内的任何外部值; 从参考训练值中消除所识别的外部值; 基于剩余参考训练值的平均值生成最终参考训练值; 并使用最终参考训练值作为系统引导顺序的DQ-DQS定时值。

2. 发明申请

US20130159687A1 Memory Training Results Corresponding To A Plurality Of Memory Modules 有权
标题翻译：内存培训结果对应于多个内存模块
公开(公告)号：US20130159687A1
公开(公告)日：2013-06-20
申请号：US13332092
申请日：2011-12-20
申请人： William H. Cox, JR. , Jimmy G. Foster, SR. , Sumeet Kochar , Ivan R. Zapata
发明人： William H. Cox, JR. , Jimmy G. Foster, SR. , Sumeet Kochar , Ivan R. Zapata
IPC分类号： G06F15/177
CPC分类号： G06F12/0646 , G06F11/3051 , G11C5/04 , G11C7/1066 , G11C7/1093 , G11C29/023 , G11C29/028 , G11C2207/2254
摘要： Methods, apparatuses, and computer program products for improving memory training results corresponding to a plurality of memory modules are provided. Embodiments include detecting a hardware configuration change upon initiating a boot sequence of a system that includes the plurality of memory modules; generating for a plurality of training iterations, reference training values corresponding to aligning of a data strobe (DQS) signal with a data valid window of data (DQ) lines of the plurality of memory modules; identifying for each training iteration, any outer values within the reference training values generated for that training iteration; eliminating the identified outer values from the reference training values; generating a final reference training value based on an average of the remaining reference training values; and using the final reference training value as the DQ-DQS timing value for the boot sequence of the system.
摘要翻译：提供了用于改善对应于多个存储器模块的存储器训练结果的方法，装置和计算机程序产品。实施例包括在启动包括多个存储器模块的系统的引导顺序时检测硬件配置变化; 产生多个训练迭代，对应于数据选通（DQS）信号与所述多个存储器模块的数据有效数据（DQ）行窗口的对准的参考训练值; 识别每个训练迭代，为该训练迭代生成的参考训练值内的任何外部值; 从参考训练值中消除所识别的外部值; 基于剩余参考训练值的平均值生成最终参考训练值; 并使用最终参考训练值作为系统引导顺序的DQ-DQS定时值。

3. 发明申请

US20110258477A1 SELECTIVE LIMITS ON PROCESSOR TURBO MODES 失效
标题翻译：处理器涡轮模式的选择性限制
公开(公告)号：US20110258477A1
公开(公告)日：2011-10-20
申请号：US12762419
申请日：2010-04-19
申请人： Brian A. Baker , Justin P. Bandholz , William H. Cox, JR. , Sumeet Kochar , Ivan R. Zapata
发明人： Brian A. Baker , Justin P. Bandholz , William H. Cox, JR. , Sumeet Kochar , Ivan R. Zapata
IPC分类号： G06F1/04
CPC分类号： G06F1/3203 , G06F1/324 , Y02D10/126
摘要： A method, computer program product and system for controlling the maximum turbo mode of a processor in a turbo boost state. The method comprises limiting a maximum turbo mode available to the processor by over-reporting the amount of current drawn by the processor to the current monitoring feedback line to the processor, wherein the processor uses the over-reported current to maintain operation of the processor within performance specifications of the processor. An automatic calibration routine may be used to determine nominal amounts of current over-reporting that may be used to prevent the processor performance from exceeding the maximum turbo mode. In one embodiment, a digital potentiometer is included in the voltage regulator circuit to over-report the current as instructed.
摘要翻译：一种用于在涡轮增压状态下控制处理器的最大涡轮模式的方法，计算机程序产品和系统。该方法包括通过将由处理器提取的电流量过度报告给处理器的当前监视反馈线来限制处理器可用的最大涡轮模式，其中处理器使用过度报告的电流来维持处理器的操作处理器的性能规格。可以使用自动校准程序来确定可用于防止处理器性能超过最大涡轮模式的当前过度报告的标称量。在一个实施例中，数字电位计被包括在电压调节器电路中以按指示过度报告电流。

4. 发明授权

US08429441B2 Operating processor below maximum turbo mode frequency by sending higher than actual current amount signal to monitor 失效
标题翻译：通过发送高于实际电流量信号进行监控，操作处理器低于最大涡轮模式频率
公开(公告)号：US08429441B2
公开(公告)日：2013-04-23
申请号：US12762419
申请日：2010-04-19
申请人： Brian A. Baker , Justin P. Bandholz , William H. Cox, Jr. , Sumeet Kochar , Ivan R. Zapata
发明人： Brian A. Baker , Justin P. Bandholz , William H. Cox, Jr. , Sumeet Kochar , Ivan R. Zapata
IPC分类号： G06F1/04
CPC分类号： G06F1/3203 , G06F1/324 , Y02D10/126
摘要： A method, computer program product and system for controlling the maximum turbo mode of a processor in a turbo boost state. The method comprises limiting a maximum turbo mode available to the processor by over-reporting the amount of current drawn by the processor to the current monitoring feedback line to the processor, wherein the processor uses the over-reported current to maintain operation of the processor within performance specifications of the processor. An automatic calibration routine may be used to determine nominal amounts of current over-reporting that may be used to prevent the processor performance from exceeding the maximum turbo mode. In one embodiment, a digital potentiometer is included in the voltage regulator circuit to over-report the current as instructed.
摘要翻译：一种用于在涡轮增压状态下控制处理器的最大涡轮模式的方法，计算机程序产品和系统。该方法包括通过将由处理器提取的电流量过度报告给处理器的当前监视反馈线来限制处理器可用的最大涡轮模式，其中处理器使用过度报告的电流来维持处理器的操作处理器的性能规格。可以使用自动校准程序来确定可用于防止处理器性能超过最大涡轮模式的当前过度报告的标称量。在一个实施例中，数字电位计被包括在电压调节器电路中以按指示过度报告电流。

5. 发明授权

US08677160B2 Managing power consumption of a computer 失效
标题翻译：管理电脑的功耗
公开(公告)号：US08677160B2
公开(公告)日：2014-03-18
申请号：US13546090
申请日：2012-07-11
申请人： Thomas M. Brey , Wesley M. Felter , Sumeet Kochar , Charles R. Lefurgy , Ryuji Orita , Freeman L. Rawson, III , Malcolm S. Ware
发明人： Thomas M. Brey , Wesley M. Felter , Sumeet Kochar , Charles R. Lefurgy , Ryuji Orita , Freeman L. Rawson, III , Malcolm S. Ware
IPC分类号： G06F1/32
CPC分类号： G06F1/3203
摘要： Methods, computers, and products for managing power consumption of a computer, the computer including a computer processor and managing power consumption of a computer includes: dynamically during operation of the computer, setting, by an in-band power manager in dependence upon performance metrics of the computer processor, a current performance state (‘p-state’) of the computer processor; and providing, by the in-band power manager to an out-of-band power manager, the current p-state of the computer processor.
摘要翻译：用于管理计算机的功耗的方法，计算机和产品，包括计算机处理器的计算机和管理计算机的功耗的方法，计算机和产品包括：在计算机运行期间动态地根据性能度量由带内功率管理器进行设置计算机处理器的当前性能状态（'p状态'）; 以及由所述带内功率管理器向所述带外功率管理器提供所述计算机处理器的当前p状态。

6. 发明授权

US08601250B2 Control over loading of device drivers for an individual instance of a PCI device 有权
标题翻译：控制PCI设备的单个实例的设备驱动程序的加载
公开(公告)号：US08601250B2
公开(公告)日：2013-12-03
申请号：US13108638
申请日：2011-05-16
申请人： Sumeet Kochar , Adam L. Soderlund , Michael R. Turner
发明人： Sumeet Kochar , Adam L. Soderlund , Michael R. Turner
IPC分类号： G06F9/00 , G06F15/177
CPC分类号： G06F13/102 , G06F2213/0024
摘要： A method identifies a plurality of PCI devices in a computer system by an associated PCI device handle, wherein each of the PCI devices is also associated with a default EFI device driver. The method further identifies a target PCI device to be disabled from within the plurality of PCI devices, provides a dummy driver that enables fewer functions for the target PCI device than would the default EFI device driver, and binds the dummy driver to the target PCI device instead of binding the default EFI device driver associated with the target PCI device. The dummy driver may be used to effectively disable the target PCI device so that the POST does not hang up or completes faster without loading the default EFI device driver.
摘要翻译：方法通过相关联的PCI设备句柄来识别计算机系统中的多个PCI设备，其中每个PCI设备也与默认EFI设备驱动程序相关联。该方法进一步识别要从多个PCI设备中禁用的目标PCI设备，提供虚拟驱动器，该虚拟驱动器能够使目标PCI设备的功能比默认EFI设备驱动程序更少，并将虚拟驱动程序绑定到目标PCI设备而不是绑定与目标PCI设备相关联的默认EFI设备驱动程序。虚拟驱动程序可用于有效地禁用目标PCI设备，以便POST不会挂起或更快地完成，而无需加载默认的EFI设备驱动程序。

7. 发明授权

US08032791B2 Diagnosis of and response to failure at reset in a data processing system 有权
标题翻译：在数据处理系统中的复位故障的诊断和响应
公开(公告)号：US08032791B2
公开(公告)日：2011-10-04
申请号：US12499070
申请日：2009-07-07
申请人： Sumeet Kochar , Barry A. Kritt , William B. Schwartz , Jeffrey B. Williams
发明人： Sumeet Kochar , Barry A. Kritt , William B. Schwartz , Jeffrey B. Williams
IPC分类号： G06F11/00
CPC分类号： G06F11/0766 , G06F11/0724 , G06F11/1417 , G06F11/1428 , G06F11/2028 , G06F11/2041 , G06F11/2043
摘要： Detection of a reset failure in a multinode data processing system is provided by a diagnostic circuit in each of a plurality of the server nodes of the system. Each diagnostic circuit is coupled to a code fetch chain of its corresponding node. At reset, prior to a node processor retrieving startup code from the code fetch chain, the diagnostic circuit provides diagnostic signals to the code fetch chain. A problem in the code fetch chain is detected from a response to the diagnostic signals. When a problem is detected, a node failure status for the problem node may be signaled to the other nodes. The multinode system may be configured in response to signaled node failure status, such as by dropping failed nodes and replacing a failed primary node with a secondary node if necessary.
摘要翻译：多系统数据处理系统中的复位故障的检测由系统的多个服务器节点中的每一个中的诊断电路提供。每个诊断电路耦合到其相应节点的代码获取链。在复位时，在节点处理器从代码获取链中检索启动代码之前，诊断电路向代码获取链提供诊断信号。从对诊断信号的响应中检测到代码获取链中的问题。当检测到问题时，问题节点的节点故障状态可以发信号通知给其他节点。多节点系统可以被配置为响应于信号通知的节点故障状态，例如通过丢弃故障节点并且如果需要则用辅助节点替换故障主节点。

8. 发明授权

US07987336B2 Reducing power-on time by simulating operating system memory hot add 失效
标题翻译：通过模拟操作系统内存热添加减少上电时间
公开(公告)号：US07987336B2
公开(公告)日：2011-07-26
申请号：US12120383
申请日：2008-05-14
申请人： Joseph Allen Kirscht , Sumeet Kochar , Barry Alan Kritt , William Bradley Schwartz
发明人： Joseph Allen Kirscht , Sumeet Kochar , Barry Alan Kritt , William Bradley Schwartz
IPC分类号： G06F12/00
CPC分类号： G06F9/4406
摘要： This invention generally provides a method for speeding up system boot time, by initializing a subset of memory during the system firmware test/initialization, and allowing the system to boot an operating system with this subset of installed memory. While the system is completing the operating system boot with the subset of installed memory, a remainder of the installed system memory is being initialized/tested. When the initialization the remainder of system memory is completed (and after the OS has booted), the SMI handler is invoked. The SMI handler then simulates a physical memory “Hot Add” event, and reports the event to the OS. This allows much of the memory initialization/test activity to occur in parallel with the firmware initialization/test and operating system startup processes.
摘要翻译：本发明通常提供一种通过在系统固件测试/初始化期间初始化存储器子集并允许系统使用所安装的存储器的该子集来引导操作系统来加速系统启动时间的方法。当系统正在使用已安装内存的子集完成操作系统引导时，已安装的系统内存的其余部分正在进行初始化/测试。当系统内存的剩余部分完成初始化（OS启动后）时，调用SMI处理程序。然后，SMI处理程序模拟物理内存“Hot Add”事件，并将事件报告给操作系统。这允许大量的内存初始化/测试活动与固件初始化/测试和操作系统启动过程并行发生。

9. 发明申请

US20090287900A1 Reducing Power-On Time by Simulating Operating System Memory Hot Add 失效
标题翻译：通过模拟操作系统内存减少上电时间
公开(公告)号：US20090287900A1
公开(公告)日：2009-11-19
申请号：US12120383
申请日：2008-05-14
申请人： Joseph Allen Kirscht , Sumeet Kochar , Barry Alan Kritt , William Bradley Schwartz
发明人： Joseph Allen Kirscht , Sumeet Kochar , Barry Alan Kritt , William Bradley Schwartz
IPC分类号： G06F12/02
CPC分类号： G06F9/4406
摘要： This invention generally provides a method for speeding up system boot time, by initializing a subset of memory during the system firmware test/initialization, and allowing the system to boot an operating system with this subset of installed memory. While the system is completing the operating system boot with the subset of installed memory, a remainder of the installed system memory is being initialized/tested. When the initialization the remainder of system memory is completed (and after the OS has booted), the SMI handler is invoked. The SMI handler then simulates a physical memory “Hot Add” event, and reports the event to the OS. This allows much of the memory initialization/test activity to occur in parallel with the firmware initialization/test and operating system startup processes.
摘要翻译：本发明通常提供一种通过在系统固件测试/初始化期间初始化存储器子集并允许系统使用所安装的存储器的该子集来引导操作系统来加速系统启动时间的方法。当系统正在使用已安装内存的子集完成操作系统引导时，已安装的系统内存的其余部分正在进行初始化/测试。当系统内存的剩余部分完成初始化（OS启动后）时，调用SMI处理程序。然后，SMI处理程序模拟物理内存“Hot Add”事件，并将事件报告给操作系统。这允许大量的内存初始化/测试活动与固件初始化/测试和操作系统启动过程并行发生。

10. 发明申请

US20090150721A1 Utilizing A Potentially Unreliable Memory Module For Memory Mirroring In A Computing System 审中-公开
标题翻译：在计算系统中利用潜在不可靠的内存模块进行内存镜像
公开(公告)号：US20090150721A1
公开(公告)日：2009-06-11
申请号：US11953309
申请日：2007-12-10
申请人： Sumeet Kochar , Barry A. Kritt , William B. Schwartz
发明人： Sumeet Kochar , Barry A. Kritt , William B. Schwartz
IPC分类号： G06F11/14
CPC分类号： G06F11/1666 , G06F11/1008 , G06F11/2056
摘要： Methods, apparatus, and products are disclosed for utilizing a potentially unreliable memory module for memory mirroring in a computing system, the computing system including at least two memory modules, that includes: retrieving error information from an error log stored in non-volatile memory, the error information describing an occurrence of a correctable memory error on one of the memory modules; determining whether a memory mirroring mode is enabled for the computing system, the memory mirroring mode specifying that memory contents are mirrored on the two memory modules; and utilizing, in dependence upon the error information, the memory module on which the correctable memory error occurred to mirror the memory contents if the memory mirroring mode is enabled.
摘要翻译：公开了用于在计算系统中利用用于存储器镜像的潜在不可靠的存储器模块的方法，装置和产品，该计算系统包括至少两个存储器模块，其包括：从存储在非易失性存储器中的错误日志中检索错误信息，所述错误信息描述在所述存储器模块之一上发生可校正的存储器错误; 确定是否为所述计算系统启用内存镜像模式，所述内存镜像模式指定所述存储器内容被镜像在所述两个存储器模块上; 以及如果所述存储器镜像模式被使能，则根据所述错误信息利用所述存储器模块在其上发生可校正的存储器错误以镜像所述存储器内容。

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