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    • 1. 发明授权
    • Semiconductor device and method of manufacturing the same
    • 半导体装置及其制造方法
    • US09153475B2
    • 2015-10-06
    • US13599775
    • 2012-08-30
    • Woo Duck JungSung Soon KimJu Il Song
    • Woo Duck JungSung Soon KimJu Il Song
    • H01L21/764H01L27/115
    • H01L21/764H01L27/11534
    • A semiconductor device includes a semiconductor substrate having a plurality of isolation regions, a plurality of trenches, where each of the plurality of trenches is formed in a corresponding isolation region, of the plurality of isolation regions, and where the plurality of trenches are arranged, in parallel, along a first direction, a plurality of gate lines formed on the semiconductor substrate in a second direction crossing the plurality of trenches, an insulating layer formed between each of the plurality of gate lines, a first air gap formed in at least one of the plurality of trenches, the first air gap extending in the first direction, and a second air gap formed in at least one of the insulating layers, the second air gap extending in the second direction.
    • 半导体器件包括具有多个隔离区域的多个沟槽的多个沟槽中的多个沟槽中的每一个在相应的隔离区域中的多个隔离区域中的多个沟槽,并且其中布置多个沟槽的半导体衬底, 沿着第一方向并联地形成在与所述多个沟槽交叉的第二方向上的所述半导体衬底上的多个栅极线,在所述多个栅极线中的每一个之间形成的绝缘层,形成在至少一个栅极线中的第一气隙 所述第一气隙沿所述第一方向延伸,所述第一空气间隙形成在所述绝缘层中的至少一个中,所述第二气隙沿所述第二方向延伸。
    • 2. 发明申请
    • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    • 半导体器件及其制造方法
    • US20130277730A1
    • 2013-10-24
    • US13599775
    • 2012-08-30
    • Woo Duck JungSung Soon KimJu Il Song
    • Woo Duck JungSung Soon KimJu Il Song
    • H01L29/788H01L29/06H01L21/762
    • H01L21/764H01L27/11534
    • A semiconductor device includes a semiconductor substrate having a plurality of isolation regions, a plurality of trenches, where each of the plurality of trenches is formed in a corresponding isolation region, of the plurality of isolation regions, and where the plurality of trenches are arranged, in parallel, along a first direction, a plurality of gate lines formed on the semiconductor substrate in a second direction crossing the plurality of trenches, an insulating layer formed between each of the plurality of gate lines, a first air gap formed in at least one of the plurality of trenches, the first air gap extending in the first direction, and a second air gap formed in at least one of the insulating layers, the second air gap extending in the second direction.
    • 半导体器件包括具有多个隔离区域的多个沟槽的多个沟槽中的多个沟槽中的每一个在相应的隔离区域中的多个隔离区域中的多个沟槽,并且其中布置多个沟槽的半导体衬底, 沿着第一方向并联地形成在与所述多个沟槽交叉的第二方向上的所述半导体衬底上的多个栅极线,在所述多个栅极线中的每一个之间形成的绝缘层,形成在至少一个栅极线中的第一气隙 所述第一气隙沿所述第一方向延伸,所述第一空气间隙形成在所述绝缘层中的至少一个中,所述第二气隙沿所述第二方向延伸。
    • 5. 发明申请
    • Method of Manufacturing Semiconductor Memory Device
    • 制造半导体存储器件的方法
    • US20100184284A1
    • 2010-07-22
    • US12648842
    • 2009-12-29
    • Sung Soon Kim
    • Sung Soon Kim
    • H01L21/28
    • H01L21/28052H01L27/11529H01L29/40114
    • A method of manufacturing a semiconductor memory device comprises providing a semiconductor substrate, forming gate lines over the semiconductor substrate, wherein each of the gate lines has a stack structure comprising an upper layer having a blocking layer formed on a polysilicon layer, forming a dielectric interlayer between the gate lines such that sides of the polysilicon layers of the gate lines are exposed, forming a metal layer on an entire surface of the dielectric interlayers, the blocking layers, and the polysilicon layers, causing the polysilicon layers in contact with the metal layer to react with the metal layer and undergo a phase change and become silicide layers, and removing the unreacted metal layer.
    • 一种制造半导体存储器件的方法包括提供半导体衬底,在半导体衬底上形成栅极线,其中每个栅极线具有堆叠结构,其包括在多晶硅层上形成有阻挡层的上层,形成介电中间层 在栅极线之间,使得栅极线的多晶硅层的侧面露出,在电介质中间层,阻挡层和多晶硅层的整个表面上形成金属层,使多晶硅层与金属层接触 与金属层反应并发生相变并变成硅化物层,并除去未反应的金属层。