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1. 发明授权

US08053856B1 Backside illuminated sensor processing 有权
标题翻译：背面照明传感器处理
公开(公告)号：US08053856B1
公开(公告)日：2011-11-08
申请号：US12830719
申请日：2010-07-06
申请人： Yeur-Luen Tu , Chia-Shiung Tsai , Ching-Chun Wang , Ren-Jie Lin , Shou-Gwo Wuu
发明人： Yeur-Luen Tu , Chia-Shiung Tsai , Ching-Chun Wang , Ren-Jie Lin , Shou-Gwo Wuu
IPC分类号： H01L31/0232
CPC分类号： H01L27/14609 , H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/1464 , H01L27/14643
摘要： The present disclosure provides methods and apparatus for reducing dark current in a backside illuminated semiconductor device. In one embodiment, a method of fabricating a semiconductor device includes providing a substrate having a frontside surface and a backside surface, and forming a plurality of sensor elements in the substrate, each of the plurality of sensor elements configured to receive light directed towards the backside surface. The method further includes forming a dielectric layer on the backside surface of the substrate, wherein the dielectric layer has a compressive stress to induce a tensile stress in the substrate. A backside illuminated semiconductor device fabricated by such a method is also disclosed.
摘要翻译：本公开提供了用于减少背面照明半导体器件中的暗电流的方法和装置。在一个实施例中，制造半导体器件的方法包括提供具有前表面和背面的衬底，以及在衬底中形成多个传感器元件，所述多个传感器元件中的每一个被配置为接收朝向背面的光表面。该方法还包括在衬底的背面形成电介质层，其中电介质层具有在衬底中引起拉伸应力的压缩应力。还公开了通过这种方法制造的背面照明半导体器件。

2. 发明申请

US20120034730A1 Backside Illuminated Sensor Processing 有权
标题翻译：背面照明传感器处理
公开(公告)号：US20120034730A1
公开(公告)日：2012-02-09
申请号：US13275935
申请日：2011-10-18
申请人： Yeur-Luen Tu , Chia-Shiung Tsai , Ching-Chun Wang , Ren-Jie Lin , Shou-Gwo Wuu
发明人： Yeur-Luen Tu , Chia-Shiung Tsai , Ching-Chun Wang , Ren-Jie Lin , Shou-Gwo Wuu
IPC分类号： H01L31/0232
CPC分类号： H01L27/14609 , H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/1464 , H01L27/14643
摘要： The present disclosure provides methods and apparatus for reducing dark current in a backside illuminated semiconductor device. In one embodiment, a method of fabricating a semiconductor device includes providing a substrate having a frontside surface and a backside surface, and forming a plurality of sensor elements in the substrate, each of the plurality of sensor elements configured to receive light directed towards the backside surface. The method further includes forming a dielectric layer on the backside surface of the substrate, wherein the dielectric layer is formed to have a compressive stress to induce a tensile stress in the substrate. A backside illuminated semiconductor device fabricated by such a method is also disclosed.
摘要翻译：本公开提供了用于减少背面照明半导体器件中的暗电流的方法和装置。在一个实施例中，制造半导体器件的方法包括提供具有前表面和背面的衬底，以及在衬底中形成多个传感器元件，所述多个传感器元件中的每一个被配置为接收朝向背面的光表面。该方法还包括在衬底的背面形成电介质层，其中介电层形成为具有压应力以在衬底中引起拉伸应力。还公开了通过这种方法制造的背面照明半导体器件。

3. 发明授权

US08354295B2 Backside illuminated sensor processing 有权
标题翻译：背面照明传感器处理
公开(公告)号：US08354295B2
公开(公告)日：2013-01-15
申请号：US13275935
申请日：2011-10-18
申请人： Yuer-Luen Tu , Chia-Shiung Tsai , Ching-Chun Wang , Ren-Jie Lin , Shou-Gwo Wuu
发明人： Yuer-Luen Tu , Chia-Shiung Tsai , Ching-Chun Wang , Ren-Jie Lin , Shou-Gwo Wuu
IPC分类号： H01L21/00
CPC分类号： H01L27/14609 , H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/1464 , H01L27/14643
摘要： The present disclosure provides methods and apparatus for reducing dark current in a backside illuminated semiconductor device. In one embodiment, a method of fabricating a semiconductor device includes providing a substrate having a frontside surface and a backside surface, and forming a plurality of sensor elements in the substrate, each of the plurality of sensor elements configured to receive light directed towards the backside surface. The method further includes forming a dielectric layer on the backside surface of the substrate, wherein the dielectric layer is formed to have a compressive stress to induce a tensile stress in the substrate. A backside illuminated semiconductor device fabricated by such a method is also disclosed.
摘要翻译：本公开提供了用于减少背面照明半导体器件中的暗电流的方法和装置。在一个实施例中，制造半导体器件的方法包括提供具有前表面和背面的衬底，以及在衬底中形成多个传感器元件，所述多个传感器元件中的每一个被配置为接收朝向背面的光表面。该方法还包括在衬底的背面形成电介质层，其中介电层形成为具有压应力以在衬底中引起拉伸应力。还公开了通过这种方法制造的背面照明半导体器件。

4. 发明授权

US09059057B2 Image sensor having compressive layers 有权
标题翻译：具有压缩层的图像传感器
公开(公告)号：US09059057B2
公开(公告)日：2015-06-16
申请号：US13492258
申请日：2012-06-08
申请人： Chun-Han Tsao , Chih-Yu Lai , Chih-Hui Huang , Cheng-Ta Wu , Yeur-Luen Tu , Ching-Chun Wang , Shyh-Fann Ting , Chia-Shiung Tsai
发明人： Chun-Han Tsao , Chih-Yu Lai , Chih-Hui Huang , Cheng-Ta Wu , Yeur-Luen Tu , Ching-Chun Wang , Shyh-Fann Ting , Chia-Shiung Tsai
IPC分类号： H01L31/102 , H01L21/00 , H01L27/146 , H01L27/148
CPC分类号： H01L31/02164 , H01L27/14623 , H01L27/14632 , H01L27/1464 , H01L27/14643 , H01L27/14687 , H01L27/148 , H01L51/4273
摘要： An image sensor device including a semiconductor substrate that includes an array region and a black level correction region. The array region contains a plurality of radiation-sensitive pixels. The black level correction region contains one or more reference pixels. The substrate has a front side and a back side. The image sensor device includes a first compressively-stressed layer formed on the back side of the substrate. The first compressively-stressed layer contains silicon oxide, and is negatively charged. The second compressively-stressed layer contains silicon nitride, and is negatively charged. A metal shield is formed over at least a portion of the black level correction region. The image sensor device includes a third compressively-stressed layer formed on the metal shield and the second compressively-stressed layer. The third compressively-stressed layer contains silicon oxide. A sidewall of the metal shield is protected by the third compressively-stressed layer.
摘要翻译：一种包括具有阵列区域和黑色电平校正区域的半导体衬底的图像传感器装置。阵列区域包含多个辐射敏感像素。黑色电平校正区域包含一个或多个参考像素。基板具有前侧和后侧。图像传感器装置包括形成在基板的背面上的第一压缩应力层。第一压应力层含有氧化硅，带负电荷。第二压应力层含有氮化硅，带负电荷。在黑色电平校正区域的至少一部分上形成金属屏蔽。图像传感器装置包括形成在金属屏蔽和第二压缩应力层上的第三压缩应力层。第三压缩应力层含有氧化硅。金属屏蔽层的侧壁由第三压应力层保护。

5. 发明授权

US08802457B2 Backside surface treatment of semiconductor chips 有权
标题翻译：半导体芯片的背面表面处理
公开(公告)号：US08802457B2
公开(公告)日：2014-08-12
申请号：US13205179
申请日：2011-08-08
申请人： Chih-Yu Lai , Cheng-Ta Wu , Kai-Chun Hsu , Yeur-Luen Tu , Ching-Chun Wang , Chia-Shiung Tsai
发明人： Chih-Yu Lai , Cheng-Ta Wu , Kai-Chun Hsu , Yeur-Luen Tu , Ching-Chun Wang , Chia-Shiung Tsai
IPC分类号： H01L21/00 , H01L21/46 , H01L21/322
CPC分类号： H01L27/14687 , H01L27/1464
摘要： A method includes performing a grinding to a backside of a semiconductor substrate, wherein a remaining portion of the semiconductor substrate has a back surface. A treatment is then performed on the back surface using a method selected from the group consisting essentially of a dry treatment and a plasma treatment. Process gases that are used in the treatment include oxygen (O2). The plasma treatment is performed without vertical bias in a direction perpendicular to the back surface.
摘要翻译：一种方法包括对半导体衬底的背面进行研磨，其中半导体衬底的剩余部分具有背面。然后使用基本上由干法处理和等离子体处理组成的组中的方法在背面进行处理。用于处理的工艺气体包括氧（O 2）。在垂直于后表面的方向上进行等离子体处理而没有垂直偏压。

6. 发明申请

US20130040446A1 Backside Surface Treatment of Semiconductor Chips 有权
标题翻译：半导体芯片的背面表面处理
公开(公告)号：US20130040446A1
公开(公告)日：2013-02-14
申请号：US13205179
申请日：2011-08-08
申请人： Chih-Yu Lai , Cheng-Ta Wu , Kai-Chun Hsu , Yeur-Luen Tu , Ching-Chun Wang , Chia-Shiung Tsai
发明人： Chih-Yu Lai , Cheng-Ta Wu , Kai-Chun Hsu , Yeur-Luen Tu , Ching-Chun Wang , Chia-Shiung Tsai
IPC分类号： H01L21/265
CPC分类号： H01L27/14687 , H01L27/1464
摘要： A method includes performing a grinding to a backside of a semiconductor substrate, wherein a remaining portion of the semiconductor substrate has a back surface. A treatment is then performed on the back surface using a method selected from the group consisting essentially of a dry treatment and a plasma treatment. Process gases that are used in the treatment include oxygen (O2). The plasma treatment is performed without vertical bias in a direction perpendicular to the back surface.
摘要翻译：一种方法包括对半导体衬底的背面进行研磨，其中半导体衬底的剩余部分具有背面。然后使用基本上由干法处理和等离子体处理组成的组中的方法在背面进行处理。用于处理的工艺气体包括氧（O 2）。在垂直于后表面的方向上进行等离子体处理而没有垂直偏压。

7. 发明申请

US20140061842A1 Multiple Metal Film Stack in BSI Chips 有权
标题翻译： BSI芯片中的多金属薄膜叠层
公开(公告)号：US20140061842A1
公开(公告)日：2014-03-06
申请号：US13604380
申请日：2012-09-05
申请人： Shyh-Fann Ting , Jiech-Fun Lu , Ming-I Wang , Yeur-Luen Tu , Ching-Chun Wang
发明人： Shyh-Fann Ting , Jiech-Fun Lu , Ming-I Wang , Yeur-Luen Tu , Ching-Chun Wang
IPC分类号： H01L27/146 , H01L31/18
CPC分类号： H01L27/1464 , H01L21/76838 , H01L27/14623 , H01L27/14687
摘要： A method includes forming an opening extending from a back surface of a semiconductor substrate to a metal pad on a front side of the semiconductor substrate, and forming a first conductive layer including a first portion overlapping active image sensors in the semiconductor substrate, a second portion overlapping black reference image sensors in the semiconductor substrate, and a third portion in the opening to contact the metal pad. A second conductive layer is formed over and contacting the first conductive layer. A first patterning step is performed to remove the first and the second portions of the second conductive layer, wherein the first conductive layer is used as an etch stop layer. A second patterning step is performed to remove a portion of the first portion of the first conductive layer. The second and the third portions of the first conductive layer remain after the second patterning step.
摘要翻译：一种方法包括形成从半导体衬底的背表面延伸到半导体衬底的前侧上的金属焊盘的开口，以及在半导体衬底中形成包括与有源图像传感器重叠的第一部分的第一导电层，第二部分半导体衬底中重叠的黑色参考图像传感器，以及开口中的与金属垫接触的第三部分。在第一导电层上形成第二导电层并与第一导电层接触。执行第一图案化步骤以去除第二导电层的第一和第二部分，其中第一导电层用作蚀刻停止层。执行第二图案化步骤以去除第一导电层的第一部分的一部分。在第二图案化步骤之后，第一导电层的第二和第三部分保留。

8. 发明授权

US08796805B2 Multiple metal film stack in BSI chips 有权
标题翻译： BSI芯片中的多个金属膜堆叠
公开(公告)号：US08796805B2
公开(公告)日：2014-08-05
申请号：US13604380
申请日：2012-09-05
申请人： Shyh-Fann Ting , Jiech-Fun Lu , Ming-I Wang , Yeur-Luen Tu , Ching-Chun Wang
发明人： Shyh-Fann Ting , Jiech-Fun Lu , Ming-I Wang , Yeur-Luen Tu , Ching-Chun Wang
IPC分类号： H01L31/00 , H01L21/00 , H01L27/146 , H01L21/768
CPC分类号： H01L27/1464 , H01L21/76838 , H01L27/14623 , H01L27/14687
摘要： A method includes forming an opening extending from a back surface of a semiconductor substrate to a metal pad on a front side of the semiconductor substrate, and forming a first conductive layer including a first portion overlapping active image sensors in the semiconductor substrate, a second portion overlapping black reference image sensors in the semiconductor substrate, and a third portion in the opening to contact the metal pad. A second conductive layer is formed over and contacting the first conductive layer. A first patterning step is performed to remove the first and the second portions of the second conductive layer, wherein the first conductive layer is used as an etch stop layer. A second patterning step is performed to remove a portion of the first portion of the first conductive layer. The second and the third portions of the first conductive layer remain after the second patterning step.
摘要翻译：一种方法包括形成从半导体衬底的背表面延伸到半导体衬底的前侧上的金属焊盘的开口，以及在半导体衬底中形成包括与有源图像传感器重叠的第一部分的第一导电层，第二部分半导体衬底中重叠的黑色参考图像传感器，以及开口中的与金属垫接触的第三部分。在第一导电层上形成第二导电层并与第一导电层接触。执行第一图案化步骤以去除第二导电层的第一和第二部分，其中第一导电层用作蚀刻停止层。执行第二图案化步骤以去除第一导电层的第一部分的一部分。在第二图案化步骤之后，第一导电层的第二和第三部分保留。

9. 发明授权

US08304354B2 Methods to avoid laser anneal boundary effect within BSI CMOS image sensor array 有权
标题翻译： BSI CMOS图像传感器阵列中避免激光退火边界效应的方法
公开(公告)号：US08304354B2
公开(公告)日：2012-11-06
申请号：US12765496
申请日：2010-04-22
申请人： Kai-Chun Hsu , Yeur-Luen Tu , Chung Chien Wang , Tzu-Hsuan Hsu , Ching-Chun Wang
发明人： Kai-Chun Hsu , Yeur-Luen Tu , Chung Chien Wang , Tzu-Hsuan Hsu , Ching-Chun Wang
IPC分类号： H01L21/31
CPC分类号： H01L27/14698 , H01L21/268 , H01L27/1464 , H01L27/14643
摘要： Methods are disclosed herein for determining the laser beam size and the scan pattern of laser annealing when fabricating backside illumination (BSI) CMOS image sensors to keep dark-mode stripe patterns corresponding to laser scan boundary effects from occurring within the sensor array regions of the image sensors. Each CMOS image sensor has a sensor array region and a periphery circuit. The methods determines a size of the laser beam from a length of the sensor array region and a length of the periphery circuit so that the laser beam covers an integer number of the sensor array region for at least one alignment of the laser beam on the array of BSI image sensors. The methods further determines a scan pattern so that the boundary of the laser beam does not overlap the sensor array regions during the laser annealing, but only overlaps the periphery circuits.
摘要翻译：本文公开了用于确定当制造背面照明（BSI）CMOS图像传感器以保持对应于激光扫描边界效应的暗模式条纹图案在图像的传感器阵列区域内发生的激光退火的激光束尺寸和扫描图案的方法传感器。每个CMOS图像传感器具有传感器阵列区域和外围电路。该方法确定来自传感器阵列区域的长度和外围电路的长度的激光束的尺寸，使得激光束覆盖整数个传感器阵列区域，用于激光束在阵列上的至少一个对准的BSI图像传感器。该方法进一步确定扫描图案，使得激光束的边界在激光退火期间不与传感器阵列区域重叠，而仅与外围电路重叠。

10. 发明授权

US06323054B1 Lateral P-I-N photodiode element with high quantum efficiency for a CMOS image sensor 有权
标题翻译：用于CMOS图像传感器的具有高量子效率的横向P-I-N光电二极管元件
公开(公告)号：US06323054B1
公开(公告)日：2001-11-27
申请号：US09583398
申请日：2000-05-31
申请人： Dun-Nian Yaung , Shou-Gwo Wuu , Chien-Hsien Tseng , Ching-Chun Wang
发明人： Dun-Nian Yaung , Shou-Gwo Wuu , Chien-Hsien Tseng , Ching-Chun Wang
IPC分类号： H01L2100
CPC分类号： H01L27/14609
摘要： A process for fabricating a lateral photodiode element, for an image sensor cell, with an increased depletion region, has been developed. The process features protecting a portion of the semiconductor substrate from ion implantation procedures used to create the P well, and the N well components of the lateral photodiode element. The protected region, or the space between the P well and N well regions, allows a larger depletion region to be realized, when compared to lateral photodiode elements in which the N well and P well regions butt. The space between the P well and N well regions, between about 0.2 to 0.4 um, result in the desired P well—intrinsic or P type semiconductor substrate—N well, (P-I-N), lateral photodiode element.
摘要翻译：已经开发了用于图像传感器单元的具有增加的耗尽区域的横向光电二极管元件的制造方法。该工艺特征是保护半导体衬底的一部分免受用于产生P阱的离子注入工艺和横向光电二极管元件的N阱部件。与N阱和P阱区对接的横向光电二极管元件相比，受保护区域或P阱和N阱区域之间的空间允许实现更大的耗尽区域。在P阱和N阱区之间的间隔在约0.2至0.4μm之间，导致所需的P本征或P型半导体衬底N阱（P-I-N），横向光电二极管元件。

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