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1. 发明授权

US08053856B1 Backside illuminated sensor processing 有权
标题翻译：背面照明传感器处理
公开(公告)号：US08053856B1
公开(公告)日：2011-11-08
申请号：US12830719
申请日：2010-07-06
申请人： Yeur-Luen Tu , Chia-Shiung Tsai , Ching-Chun Wang , Ren-Jie Lin , Shou-Gwo Wuu
发明人： Yeur-Luen Tu , Chia-Shiung Tsai , Ching-Chun Wang , Ren-Jie Lin , Shou-Gwo Wuu
IPC分类号： H01L31/0232
CPC分类号： H01L27/14609 , H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/1464 , H01L27/14643
摘要： The present disclosure provides methods and apparatus for reducing dark current in a backside illuminated semiconductor device. In one embodiment, a method of fabricating a semiconductor device includes providing a substrate having a frontside surface and a backside surface, and forming a plurality of sensor elements in the substrate, each of the plurality of sensor elements configured to receive light directed towards the backside surface. The method further includes forming a dielectric layer on the backside surface of the substrate, wherein the dielectric layer has a compressive stress to induce a tensile stress in the substrate. A backside illuminated semiconductor device fabricated by such a method is also disclosed.
摘要翻译：本公开提供了用于减少背面照明半导体器件中的暗电流的方法和装置。在一个实施例中，制造半导体器件的方法包括提供具有前表面和背面的衬底，以及在衬底中形成多个传感器元件，所述多个传感器元件中的每一个被配置为接收朝向背面的光表面。该方法还包括在衬底的背面形成电介质层，其中电介质层具有在衬底中引起拉伸应力的压缩应力。还公开了通过这种方法制造的背面照明半导体器件。

2. 发明申请

US20120034730A1 Backside Illuminated Sensor Processing 有权
标题翻译：背面照明传感器处理
公开(公告)号：US20120034730A1
公开(公告)日：2012-02-09
申请号：US13275935
申请日：2011-10-18
申请人： Yeur-Luen Tu , Chia-Shiung Tsai , Ching-Chun Wang , Ren-Jie Lin , Shou-Gwo Wuu
发明人： Yeur-Luen Tu , Chia-Shiung Tsai , Ching-Chun Wang , Ren-Jie Lin , Shou-Gwo Wuu
IPC分类号： H01L31/0232
CPC分类号： H01L27/14609 , H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/1464 , H01L27/14643
摘要： The present disclosure provides methods and apparatus for reducing dark current in a backside illuminated semiconductor device. In one embodiment, a method of fabricating a semiconductor device includes providing a substrate having a frontside surface and a backside surface, and forming a plurality of sensor elements in the substrate, each of the plurality of sensor elements configured to receive light directed towards the backside surface. The method further includes forming a dielectric layer on the backside surface of the substrate, wherein the dielectric layer is formed to have a compressive stress to induce a tensile stress in the substrate. A backside illuminated semiconductor device fabricated by such a method is also disclosed.
摘要翻译：本公开提供了用于减少背面照明半导体器件中的暗电流的方法和装置。在一个实施例中，制造半导体器件的方法包括提供具有前表面和背面的衬底，以及在衬底中形成多个传感器元件，所述多个传感器元件中的每一个被配置为接收朝向背面的光表面。该方法还包括在衬底的背面形成电介质层，其中介电层形成为具有压应力以在衬底中引起拉伸应力。还公开了通过这种方法制造的背面照明半导体器件。

3. 发明授权

US08354295B2 Backside illuminated sensor processing 有权
标题翻译：背面照明传感器处理
公开(公告)号：US08354295B2
公开(公告)日：2013-01-15
申请号：US13275935
申请日：2011-10-18
申请人： Yuer-Luen Tu , Chia-Shiung Tsai , Ching-Chun Wang , Ren-Jie Lin , Shou-Gwo Wuu
发明人： Yuer-Luen Tu , Chia-Shiung Tsai , Ching-Chun Wang , Ren-Jie Lin , Shou-Gwo Wuu
IPC分类号： H01L21/00
CPC分类号： H01L27/14609 , H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/1464 , H01L27/14643
摘要： The present disclosure provides methods and apparatus for reducing dark current in a backside illuminated semiconductor device. In one embodiment, a method of fabricating a semiconductor device includes providing a substrate having a frontside surface and a backside surface, and forming a plurality of sensor elements in the substrate, each of the plurality of sensor elements configured to receive light directed towards the backside surface. The method further includes forming a dielectric layer on the backside surface of the substrate, wherein the dielectric layer is formed to have a compressive stress to induce a tensile stress in the substrate. A backside illuminated semiconductor device fabricated by such a method is also disclosed.
摘要翻译：本公开提供了用于减少背面照明半导体器件中的暗电流的方法和装置。在一个实施例中，制造半导体器件的方法包括提供具有前表面和背面的衬底，以及在衬底中形成多个传感器元件，所述多个传感器元件中的每一个被配置为接收朝向背面的光表面。该方法还包括在衬底的背面形成电介质层，其中介电层形成为具有压应力以在衬底中引起拉伸应力。还公开了通过这种方法制造的背面照明半导体器件。

4. 发明授权

US06323054B1 Lateral P-I-N photodiode element with high quantum efficiency for a CMOS image sensor 有权
标题翻译：用于CMOS图像传感器的具有高量子效率的横向P-I-N光电二极管元件
公开(公告)号：US06323054B1
公开(公告)日：2001-11-27
申请号：US09583398
申请日：2000-05-31
申请人： Dun-Nian Yaung , Shou-Gwo Wuu , Chien-Hsien Tseng , Ching-Chun Wang
发明人： Dun-Nian Yaung , Shou-Gwo Wuu , Chien-Hsien Tseng , Ching-Chun Wang
IPC分类号： H01L2100
CPC分类号： H01L27/14609
摘要： A process for fabricating a lateral photodiode element, for an image sensor cell, with an increased depletion region, has been developed. The process features protecting a portion of the semiconductor substrate from ion implantation procedures used to create the P well, and the N well components of the lateral photodiode element. The protected region, or the space between the P well and N well regions, allows a larger depletion region to be realized, when compared to lateral photodiode elements in which the N well and P well regions butt. The space between the P well and N well regions, between about 0.2 to 0.4 um, result in the desired P well—intrinsic or P type semiconductor substrate—N well, (P-I-N), lateral photodiode element.
摘要翻译：已经开发了用于图像传感器单元的具有增加的耗尽区域的横向光电二极管元件的制造方法。该工艺特征是保护半导体衬底的一部分免受用于产生P阱的离子注入工艺和横向光电二极管元件的N阱部件。与N阱和P阱区对接的横向光电二极管元件相比，受保护区域或P阱和N阱区域之间的空间允许实现更大的耗尽区域。在P阱和N阱区之间的间隔在约0.2至0.4μm之间，导致所需的P本征或P型半导体衬底N阱（P-I-N），横向光电二极管元件。

5. 发明授权

US08054371B2 Color filter for image sensor 有权
标题翻译：图像传感器滤色片
公开(公告)号：US08054371B2
公开(公告)日：2011-11-08
申请号：US11676388
申请日：2007-02-19
申请人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
发明人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
IPC分类号： H04N5/225 , H04N5/335 , G02B5/30 , H04L31/062
CPC分类号： G02B5/201 , G02B5/223
摘要： An image sensor device includes a semiconductor substrate having a front surface and a back surface, pixels formed on the front surface of the semiconductor substrate, and grid arrays aligned with one of the pixels. One of the grid arrays is configured to allow a wavelength of light to pass through to the corresponding one of the pixels. The grid arrays are disposed overlying the front or back surface of the semiconductor substrate.
摘要翻译：图像传感器装置包括具有前表面和后表面的半导体衬底，形成在半导体衬底的前表面上的像素和与像素之一对准的栅格阵列。网格阵列中的一个被配置为允许光的波长通过到相应的一个像素。栅格阵列设置在半导体衬底的前表面或后表面上。

6. 发明申请

US20080198454A1 Color Filter For Image Sensor 有权
标题翻译：图像传感器滤色片
公开(公告)号：US20080198454A1
公开(公告)日：2008-08-21
申请号：US11676388
申请日：2007-02-19
申请人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
发明人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
IPC分类号： G02B5/30
CPC分类号： G02B5/201 , G02B5/223
摘要： An image sensor device includes a semiconductor substrate having a front surface and a back surface, pixels formed on the front surface of the semiconductor substrate, and grid arrays aligned with one of the pixels. One of the grid arrays is configured to allow a wavelength of light to pass through to the corresponding one of the pixels. The grid arrays are disposed overlying the front or back surface of the semiconductor substrate.
摘要翻译：图像传感器装置包括具有前表面和后表面的半导体衬底，形成在半导体衬底的前表面上的像素和与像素之一对准的栅格阵列。网格阵列中的一个被配置为允许光的波长通过到相应的一个像素。栅格阵列设置在半导体衬底的前表面或后表面上。

7. 发明授权

US06707080B2 Method for making spectrally efficient photodiode structures for CMOS color imagers 有权
标题翻译： CMOS彩色成像器制作光谱效率高的光电二极管结构的方法
公开(公告)号：US06707080B2
公开(公告)日：2004-03-16
申请号：US10320296
申请日：2002-12-16
申请人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
发明人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
IPC分类号： H01L31062
CPC分类号： H01L27/14645
摘要： A method for making an array of photodiodes with more uniform optical spectral response for the red, green, and blue pixel cells on a CMOS color imager is achieved. After forming a field oxide on a substrate to electrically isolate device areas for CMOS circuits, an array of deep N doped wells is formed for photodiodes for the long wavelength red pixel cells. An array of P doped well regions is formed adjacent to and interlaced with the N doped wells. Shallow diffused N+ regions are formed within the P doped wells for the shorter wavelength green and blue color pixels cells. The shallow diffused photodiodes improve the quantum efficiency (QE), and provide a color imager with improved color fidelity. An insulating layer and appropriate dye materials are deposited and patterned over the photodiodes to provide the array of color pixel cells. The N and P doped wells are also used for the supporting FET CMOS circuits to provide a cost-effective manufacturing process.
摘要翻译：实现了对CMOS彩色成像器上的红色，绿色和蓝色像素单元制造具有更均匀的光谱响应的光电二极管阵列的方法。在衬底上形成场氧化物以电隔离CMOS电路的器件区域后，形成用于长波长红色像素单元的光电二极管的深N掺杂阱的阵列。与N个掺杂的阱相邻并且与其交错形成P掺杂阱区的阵列。在较短波长的绿色和蓝色像素单元的P掺杂阱内形成浅扩散的N +区。浅扩散光电二极管提高了量子效率（QE），并提供了具有改进的色彩保真度的彩色成像仪。在光电二极管上沉积并图案化绝缘层和适当的染料材料以提供彩色像素单元阵列。 N和P掺杂阱也用于支持FET CMOS电路以提供成本有效的制造工艺。

8. 发明授权

US06518085B1 Method for making spectrally efficient photodiode structures for CMOS color imagers 有权
标题翻译： CMOS彩色成像器制作光谱效率高的光电二极管结构的方法
公开(公告)号：US06518085B1
公开(公告)日：2003-02-11
申请号：US09635584
申请日：2000-08-09
申请人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
发明人： Ching-Chun Wang , Dun-Nian Yaung , Chien-Hsien Tseng , Shou-Gwo Wuu
IPC分类号： H01L2100
CPC分类号： H01L27/14645
摘要： A method for making an array of photodiodes with more uniform optical spectral response for the red, green, and blue pixel cells on a CMOS color imager is achieved. After forming a field oxide on a substrate to electrically isolate device areas for CMOS circuits, an array of deep N doped wells is formed for photodiodes for the long wavelength red pixel cells. An array of P doped well regions is formed adjacent to and interlaced with the N doped wells. Shallow diffused N+ regions are formed within the P doped wells for the shorter wavelength green and blue color pixels cells. The shallow diffused photodiodes improve the quantum efficiency (QE), and provide a color imager with improved color fidelity. An insulating layer and appropriate dye materials are deposited and patterned over the photodiodes to provide the array of color pixel cells. The N and P doped wells are also used for the supporting FET CMOS circuits to provide a cost-effective manufacturing process.
摘要翻译：实现了对CMOS彩色成像器上的红色，绿色和蓝色像素单元制造具有更均匀的光谱响应的光电二极管阵列的方法。在衬底上形成场氧化物以电隔离CMOS电路的器件区域后，形成用于长波长红色像素单元的光电二极管的深N掺杂阱的阵列。与N个掺杂的阱相邻并且与其交错形成P掺杂阱区的阵列。在较短波长的绿色和蓝色像素单元的P掺杂阱内形成浅扩散的N +区。浅扩散光电二极管提高了量子效率（QE），并提供了具有改进的色彩保真度的彩色成像仪。在光电二极管上沉积并图案化绝缘层和适当的染料材料以提供彩色像素单元阵列。 N和P掺杂阱也用于支持FET CMOS电路以提供成本有效的制造工艺。

9. 发明授权

US09012967B2 1T MIM memory for embedded RAM application in soc 有权
标题翻译： 1T MIM存储器，用于soc中的嵌入式RAM应用
公开(公告)号：US09012967B2
公开(公告)日：2015-04-21
申请号：US13369894
申请日：2012-02-09
申请人： Yi-Ching Lin , Chun-Yao Chen , Chen-Jong Wang , Shou-Gwo Wuu , Chung S. Wang , Chien-Hua Huang , Kun-Lung Chen , Ping Yang
发明人： Yi-Ching Lin , Chun-Yao Chen , Chen-Jong Wang , Shou-Gwo Wuu , Chung S. Wang , Chien-Hua Huang , Kun-Lung Chen , Ping Yang
IPC分类号： H01L27/108 , H01L29/94 , H01L27/02
CPC分类号： H01L27/10897 , H01L27/0207 , H01L27/10852 , H01L27/10894
摘要： Embedded memories. The devices include a substrate, a first dielectric layer, a second dielectric layer, a third dielectric layer, and a plurality of capacitors. The substrate comprises transistors. The first dielectric layer, embedding first and second conductive plugs electrically connecting the transistors therein, overlies the substrate. The second dielectric layer, comprising a plurality of capacitor openings exposing the first conductive plugs, overlies the first dielectric layer. The capacitors comprise a plurality of bottom plates, respectively disposed in the capacitor openings, electrically connecting the first conductive plugs, a plurality of capacitor dielectric layers respectively overlying the bottom plates, and a top plate, comprising a top plate opening, overlying the capacitor dielectric layers. The top plate opening exposes the second dielectric layer, and the top plate is shared by the capacitors.
摘要翻译：嵌入式记忆这些器件包括衬底，第一介电层，第二电介质层，第三电介质层和多个电容器。衬底包括晶体管。第一介电层，嵌入电连接其中的晶体管的第一和第二导电插塞覆盖在基板上。包括暴露第一导电插塞的多个电容器开口的第二电介质层覆盖在第一电介质层上。电容器包括分别设置在电容器开口中的多个底板，电连接第一导电插塞，分别覆盖在底板上的多个电容器电介质层，以及顶板，包括覆盖电容器电介质的顶板开口层。顶板开口暴露第二电介质层，并且顶板由电容器共享。

10. 发明申请

US20130321073A1 Power Supply Circuit with Positive and Negative Feedback Loops 有权
标题翻译：具有正反馈回路的电源电路
公开(公告)号：US20130321073A1
公开(公告)日：2013-12-05
申请号：US13618290
申请日：2012-09-14
申请人： Jhy-Jyi Sze , Biay-Cheng Hseih , Shou-Gwo Wuu
发明人： Jhy-Jyi Sze , Biay-Cheng Hseih , Shou-Gwo Wuu
IPC分类号： G05F1/10 , H01L25/00
CPC分类号： G05F1/46 , G05F1/10 , G05F3/24 , H01L2924/0002 , H01L2924/00
摘要： A circuit includes a gate node, and a bias circuit coupled to the gate node. The bias circuit is configured to, in response to a change in a gate voltage on the gate node, provide a positive feedback to the gate voltage. A power circuit is coupled to the gate node, wherein the power circuit includes a power Metal-Oxide-Semiconductor (MOS) transistor. The power circuit is configured to, in response to a change in the gate voltage, provide a negative feedback to the gate voltage. An output node is coupled to the power circuit.
摘要翻译：电路包括栅极节点和耦合到栅极节点的偏置电路。偏置电路被配置为响应于栅极节点上的栅极电压的变化，向栅极电压提供正反馈。电源电路耦合到栅极节点，其中电源电路包括功率金属氧化物半导体（MOS）晶体管。电源电路被配置为响应于栅极电压的变化，向栅极电压提供负反馈。输出节点耦合到电源电路。

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