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1. 发明申请

US20170125094A1 NONVOLATILE MEMORY APPARATUS 审中-公开
公开(公告)号：US20170125094A1
公开(公告)日：2017-05-04
申请号：US15402984
申请日：2017-01-10
申请人： SK hynix Inc.
发明人： Chulhyun PARK
IPC分类号： G11C13/00 , G11C11/56
CPC分类号： G11C13/004 , G11C11/56 , G11C13/0002 , G11C13/0026 , G11C13/0028 , G11C13/0038 , G11C2211/5645
摘要： A nonvolatile memory apparatus includes a sensing voltage generation unit, a memory cell, a current copy unit and a data sensing unit. The sensing voltage generation unit provides a sensing voltage with a constant level, to a sensing node. The memory cell receives the sensing voltage from the sensing node. The current copy unit generates copied current with substantially the same magnitude as sensing current which flows through the memory cell. The data sensing unit senses the copied current and generates a multi-bit data to output signal.

2. 发明申请

US20150381199A1 COMPARATORS FOR DELTA-SIGMA MODULATORS 有权
标题翻译： DELTA-SIGMA调制器的比较器
公开(公告)号：US20150381199A1
公开(公告)日：2015-12-31
申请号：US14849280
申请日：2015-09-09
申请人： Micron Technology, Inc.
发明人： Russel J. Baker
IPC分类号： H03M3/00 , G11C13/00 , G11C16/28 , G11C7/06 , G11C7/16
CPC分类号： H03M3/456 , G11C7/02 , G11C7/04 , G11C7/06 , G11C7/065 , G11C7/16 , G11C8/08 , G11C8/10 , G11C11/5642 , G11C11/5678 , G11C13/0004 , G11C13/0028 , G11C13/004 , G11C16/28 , G11C27/005 , G11C2013/0054 , G11C2211/5645 , H03M3/39 , H03M3/43 , H04N5/378
摘要： Methods, systems and devices are disclosed, such as an electronic device that includes a plurality of data locations and a delta-sigma modulator. In some embodiments, the delta-sigma modulator includes a preamplifier coupled to the data locations and a latch coupled to the preamplifier.
摘要翻译：公开了诸如包括多个数据位置的电子设备和Δ-Σ调制器的方法，系统和设备。在一些实施例中，Δ-Σ调制器包括耦合到数据位置的前置放大器和耦合到前置放大器的锁存器。

3. 发明授权

US08861255B2 Apparatuses including current compliance circuits and methods 有权
标题翻译：装置包括电流兼容性电路和方法
公开(公告)号：US08861255B2
公开(公告)日：2014-10-14
申请号：US13471568
申请日：2012-05-15
申请人： Marco-Domenico Tiburzi , Giulio-Giuseppe Marotta
发明人： Marco-Domenico Tiburzi , Giulio-Giuseppe Marotta
IPC分类号： G11C11/00
CPC分类号： G11C13/003 , G11C5/147 , G11C7/20 , G11C13/0002 , G11C13/0004 , G11C13/0028 , G11C13/0069 , G11C13/0097 , G11C2013/0071 , G11C2013/0078 , G11C2013/0083 , G11C2211/5645 , G11C2213/79
摘要： Apparatus, devices, systems, and methods are described that include variable state material data storage. Example devices include current compliance circuits that are configured to dynamically adjust a current passing through a variable resistance material during a memory operation. Some configurations utilize components within an array of memory cells to form a current compliance circuit. Additional apparatus, systems, and methods are described.
摘要翻译：描述了包括可变状态材料数据存储的装置，装置，系统和方法。示例设备包括电流兼容性电路，其被配置为在存储器操作期间动态地调节通过可变电阻材料的电流。一些配置利用存储器单元阵列内的组件来形成电流兼容电路。描述了附加装置，系统和方法。

4. 发明授权

US08570785B2 Reading a memory element within a crossbar array 有权
标题翻译：读取交叉开关列阵列中的内存元素
公开(公告)号：US08570785B2
公开(公告)日：2013-10-29
申请号：US12788161
申请日：2010-05-26
申请人： Frederick Perner
发明人： Frederick Perner
IPC分类号： G11C11/00
CPC分类号： G11C13/004 , G11C5/063 , G11C13/0002 , G11C2013/0045 , G11C2211/5645
摘要： A method for reading a memory element within a crossbar array includes switching a column line connected to a target memory element of the crossbar array to connected to an input of a current mirror; applying an error voltage to unselected rows of the crossbar array; applying a sense voltage to a row line connected to the target memory element; and measuring an output current of the current mirror.
摘要翻译：用于读取交叉开关阵列中的存储器元件的方法包括切换连接到交叉开关阵列的目标存储器元件的列线以连接到电流镜的输入; 将误差电压施加到交叉开关阵列的未选择的行; 对连接到目标存储元件的行线施加感测电压; 并测量电流镜的输出电流。

5. 发明授权

US08271855B2 Memory scrubbing in third dimension memory 有权
标题翻译：第三维存储器中的内存擦除
公开(公告)号：US08271855B2
公开(公告)日：2012-09-18
申请号：US12653896
申请日：2009-12-18
申请人： Robert Norman
发明人： Robert Norman
IPC分类号： G11C29/00
CPC分类号： G11C13/0064 , G11C11/56 , G11C13/004 , G11C13/0069 , G11C29/00 , G11C2013/0054 , G11C2211/5634 , G11C2211/5645 , G11C2213/71
摘要： A method for memory scrubbing is provided. In this method, a first resistance of a reference memory element is read. A second resistance of a memory element also is read. A difference between the first resistance and the second resistance is sensed and a programming error associated with the second resistance is detected based on the difference. Each memory element is non-volatile and re-writeable, and can be positioned in a two-terminal memory cell that is one of a plurality of memory cells positioned in a two-terminal cross-point memory array. Active circuitry for performing the memory scrubbing can be fabricated FEOL in a logic layer and one or more layers of the two-terminal cross-point memory arrays can be fabricated BEOL over the logic layer. Each memory cell can optionally include non-ohmic device (NOD) electrically in series with the memory element and the two terminals of the memory cell.
摘要翻译：提供了一种用于记忆擦洗的方法。在该方法中，读取参考存储元件的第一电阻。还读取存储元件的第二电阻。感测到第一电阻和第二电阻之间的差异，并且基于该差异检测与第二电阻相关联的编程误差。每个存储器元件是非易失性的和可重写的，并且可以被定位在位于两端交叉点存储器阵列中的多个存储单元之一的两端存储单元中。可以在逻辑层中制造用于执行存储器擦除的有源电路，并且可以在逻辑层上制造两端的交叉点存储器阵列的一层或多层BEOL。每个存储器单元可以可选地包括与存储器单元和存储单元的两个端子串联的非欧姆器件（NOD）。

6. 发明申请

US20110292713A1 Reading a Memory Element Within a Crossbar Array 有权
标题翻译：读取交叉开关阵列中的内存元素
公开(公告)号：US20110292713A1
公开(公告)日：2011-12-01
申请号：US12788161
申请日：2010-05-26
申请人： Frederick Perner
发明人： Frederick Perner
IPC分类号： G11C11/00 , G11C7/00
CPC分类号： G11C13/004 , G11C5/063 , G11C13/0002 , G11C2013/0045 , G11C2211/5645
摘要： A method for reading a memory element within a crossbar array includes switching a column line connected to a target memory element of the crossbar array to connected to an input of a current mirror; applying an error voltage to unselected rows of the crossbar array; applying a sense voltage to a row line connected to the target memory element; and measuring an output current of the current mirror.
摘要翻译：用于读取交叉开关阵列中的存储器元件的方法包括切换连接到交叉开关阵列的目标存储器元件的列线以连接到电流镜的输入; 将误差电压施加到交叉开关阵列的未选择的行; 对连接到目标存储元件的行线施加感测电压; 并测量电流镜的输出电流。

7. 发明申请

US20110096587A1 DYNAMIC SENSE CURRENT SUPPLY CIRCUIT AND ASSOCIATED METHOD FOR READING AND CHARACTERIZING A RESISTIVE MEMORY ARRAY 有权
标题翻译：动态感应电流电路及相关方法，用于读取和表征电阻记忆阵列
公开(公告)号：US20110096587A1
公开(公告)日：2011-04-28
申请号：US12604915
申请日：2009-10-23
申请人： Young W. KIM , Glen ROSENDALE
发明人： Young W. KIM , Glen ROSENDALE
IPC分类号： G11C11/00 , G11C7/02 , G11C5/14
CPC分类号： G11C7/1045 , G11C7/14 , G11C11/56 , G11C11/5678 , G11C11/5685 , G11C13/0002 , G11C13/0004 , G11C13/0007 , G11C13/004 , G11C29/02 , G11C29/026 , G11C29/50 , G11C2013/0045 , G11C2013/0054 , G11C2029/5006 , G11C2211/5645
摘要： A dynamic sense current supply circuit and an associated method for rapidly characterizing a resistive memory array is disclosed. In one embodiment, the disclosed circuit comprises a first and second dynamically programmable current mirror sub-circuit. Responsive to a bank of control signals, each dynamically programmable current mirror sub-circuit provides a dynamically adjustable current scaling factor. These scaling factors are used to scale a supplied reference current to generate a plurality of sense currents which can be used within a plurality of read operations on a resistive memory array. A digital circuit is also provided to sense and store the result of each read operation.
摘要翻译：公开了用于快速表征电阻式存储器阵列的动态感测电流供应电路和相关方法。在一个实施例中，所公开的电路包括第一和第二动态可编程电流镜子电路。响应于一组控制信号，每个动态可编程电流镜子电路提供动态可调的电流缩放因子。这些缩放因子用于缩放所提供的参考电流以产生可在电阻式存储器阵列上的多个读取操作中使用的多个感测电流。还提供数字电路来感测和存储每个读取操作的结果。

8. 发明授权

US07751251B2 Current sensing scheme for non-volatile memory 有权
标题翻译：非易失性存储器的电流检测方案
公开(公告)号：US07751251B2
公开(公告)日：2010-07-06
申请号：US12183972
申请日：2008-07-31
申请人： Mark Bauer
发明人： Mark Bauer
IPC分类号： G11C11/34
CPC分类号： G11C16/28 , G11C11/5642 , G11C2207/063 , G11C2211/5634 , G11C2211/5645
摘要： A current sensing scheme for non-volatile memory is disclosed comprising an apparatus for determining one or more memory cell states in a non-volatile memory device. The apparatus having a first memory cell coupled to a first bitline and a first sensing element coupled to the first bitline, the first sensing element operable to sense a voltage corresponding to a state of the memory cell wherein the sensed voltage is independent of a bitline voltage discharge over time of the first memory cell.
摘要翻译：公开了一种用于非易失性存储器的电流感测方案，其包括用于确定非易失性存储器件中的一个或多个存储器单元状态的装置。所述装置具有耦合到第一位线的第一存储器单元和耦合到第一位线的第一感测元件，第一感测元件可操作以感测对应于存储器单元的状态的电压，其中所感测的电压独立于位线电压在第一存储单元的时间内放电。

9. 发明授权

US07542363B2 Semiconductor memory device enhancing reliability in data reading 有权
标题翻译：半导体存储器件提高了数据读取的可靠性
公开(公告)号：US07542363B2
公开(公告)日：2009-06-02
申请号：US11082926
申请日：2005-03-18
申请人： Takashi Kubo , Takashi Itoh , Yasuhiro Kashiwazaki , Taku Ogura , Kiyohiro Furutani
发明人： Takashi Kubo , Takashi Itoh , Yasuhiro Kashiwazaki , Taku Ogura , Kiyohiro Furutani
IPC分类号： G11C7/02
CPC分类号： G11C11/5642 , G11C5/145 , G11C7/06 , G11C7/12 , G11C16/24 , G11C16/26 , G11C16/30 , G11C2207/065 , G11C2207/2227 , G11C2211/5634 , G11C2211/5645
摘要： An internal voltage generating circuit generates and supplies a boosted voltage higher than an internal power supply voltage, as an operating power supply voltage, to a sense amplifier in a read circuit for reading data of a memory cell. A bit line precharge current supplied via an internal data line is produced from the internal power supply voltage. It is possible to provide a nonvolatile semiconductor memory device, which can perform a precise sense operation and an accurate reading of data even under a low power supply voltage condition.
摘要翻译：内部电压产生电路产生并提供高于作为工作电源电压的内部电源电压的升压电压到用于读取存储器单元的数据的读取电路中的读出放大器。从内部电源电压产生经由内部数据线提供的位线预充电电流。可以提供一种非易失性半导体存储器件，即使在低电源电压条件下也能进行精确的读出操作和数据的精确读取。

10. 发明申请

US20060250839A1 READ, WRITE AND ERASE CIRCUIT FOR PROGRAMMABLE MEMORY DEVICES 有权
标题翻译：用于可编程存储器件的读，写和擦除电路
公开(公告)号：US20060250839A1
公开(公告)日：2006-11-09
申请号：US11276758
申请日：2006-03-13
申请人： Nad Gilbert
发明人： Nad Gilbert
IPC分类号： G11C11/00
CPC分类号： G11C16/28 , G11C11/5614 , G11C13/0011 , G11C13/004 , G11C13/0069 , G11C2013/0054 , G11C2013/0078 , G11C2211/5645
摘要： A circuit for writing, reading, and erasing a programmable device is disclosed. The programmable device includes an ion conductor and a plurality of electrodes. Electrical properties of the device are altered by applying a sufficient bias across the electrode to form a conductive region within the ion conductor. The circuit can be used to program and read multiple bits within a single programmable device.
摘要翻译：公开了用于写入，读取和擦除可编程器件的电路。可编程器件包括离子导体和多个电极。通过在电极上施加足够的偏压以在离子导体内形成导电区域来改变器件的电学性质。该电路可用于在单个可编程器件中编程和读取多个位。

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