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1. 发明授权

US09411776B2 Separation of data and control in a switching device 有权
公开(公告)号：US09411776B2
公开(公告)日：2016-08-09
申请号：US14192135
申请日：2014-02-27
申请人： Juniper Networks, Inc.
发明人： Pradeep S. Sindhu , Kireeti Kompella , Dennis C. Ferguson , Bjorn O. Liencres , Nalini Agarwal , Hann-Hwan Ju , Raymond Marcelino Manese Lim , Rasoul Mirzazadeh Oskouy , Sreeram Veeragandham
IPC分类号： H04L12/28 , G06F15/167 , H04L12/54 , H04L29/06 , H04L12/701 , H04L12/743 , H04L12/863 , H04L12/931 , H04L12/947 , H04L12/935 , H04L12/861 , H04L12/879 , H04Q11/04 , H04L12/721 , H04L12/933 , H04L12/70
CPC分类号： G06F15/167 , H04L12/5601 , H04L29/06 , H04L45/00 , H04L45/72 , H04L45/7457 , H04L47/6225 , H04L49/103 , H04L49/108 , H04L49/1538 , H04L49/203 , H04L49/25 , H04L49/252 , H04L49/3072 , H04L49/3081 , H04L49/608 , H04L49/90 , H04L49/901 , H04L49/9042 , H04L49/9047 , H04L49/9057 , H04L69/22 , H04L2012/5652 , H04L2012/5679 , H04L2012/5681 , H04Q11/0478
摘要： A method and apparatus for switching a data packet between a source and destination in a network. The data packet includes a header portion and a data portion. The header portion includes routing information for the data packet. The method includes defining a data path in the router comprising a path through the router along which the data portion of the data packet travels and defining a control path comprising a path through the router along which routing information from the header portion travels. The method includes separating the data path and control path in the router such that the routing information can be separated from the data portion allowing for the separate processing of each in the router. The data portion can be stored in a global memory while routing decisions are made on the routing information in the control path.

2. 发明授权

US08477784B2 Memory organization in a switching device 有权
公开(公告)号：US08477784B2
公开(公告)日：2013-07-02
申请号：US12986745
申请日：2011-01-07
申请人： Pradeep S. Sindhu , Dennis C. Ferguson , Bjorn O. Liencres , Nalini Agarwal , Hann-Hwan Ju , Raymond Marcelino Manese Lim , Rasoul Mirzazadeh Oskouy , Sreeram Veeragandham
发明人： Pradeep S. Sindhu , Dennis C. Ferguson , Bjorn O. Liencres , Nalini Agarwal , Hann-Hwan Ju , Raymond Marcelino Manese Lim , Rasoul Mirzazadeh Oskouy , Sreeram Veeragandham
IPC分类号： H04L12/56
CPC分类号： G06F15/167 , H04L12/5601 , H04L29/06 , H04L45/00 , H04L45/72 , H04L45/7457 , H04L47/6225 , H04L49/103 , H04L49/108 , H04L49/1538 , H04L49/203 , H04L49/25 , H04L49/252 , H04L49/3072 , H04L49/3081 , H04L49/608 , H04L49/90 , H04L49/901 , H04L49/9042 , H04L49/9047 , H04L49/9057 , H04L69/22 , H04L2012/5652 , H04L2012/5679 , H04L2012/5681 , H04Q11/0478
摘要： A router for switching data packets from a source to a destination in a network in which the router includes a distributed memory. The distributed memory includes two or more memory banks. Each memory bank is used for storing uniform portions of a data packet received from a source and linking information for each data packet to allow for the extraction of the uniform portions of a data packet from distributed locations in memory in proper order after a routing determination has been made by the router.

3. 发明申请

US20120219001A1 SEPARATION OF DATA AND CONTROL IN A SWITCHING DEVICE 失效
标题翻译：切换设备中数据和控制的分离
公开(公告)号：US20120219001A1
公开(公告)日：2012-08-30
申请号：US13465566
申请日：2012-05-07
申请人： Pradeep S. SINDHU , Kireeti Kompella , Dennis C. Ferguson , Bjorn O. Liencres , Nalini Agarwal , Hann-Hwan Ju , Raymond Marcelino Manese Lim , Rasoul Mirzazadeh Oskouy , Sreeram Veeragandham
发明人： Pradeep S. SINDHU , Kireeti Kompella , Dennis C. Ferguson , Bjorn O. Liencres , Nalini Agarwal , Hann-Hwan Ju , Raymond Marcelino Manese Lim , Rasoul Mirzazadeh Oskouy , Sreeram Veeragandham
IPC分类号： H04L12/56
CPC分类号： G06F15/167 , H04L12/5601 , H04L29/06 , H04L45/00 , H04L45/72 , H04L45/7457 , H04L47/6225 , H04L49/103 , H04L49/108 , H04L49/1538 , H04L49/203 , H04L49/25 , H04L49/252 , H04L49/3072 , H04L49/3081 , H04L49/608 , H04L49/90 , H04L49/901 , H04L49/9042 , H04L49/9047 , H04L49/9057 , H04L69/22 , H04L2012/5652 , H04L2012/5679 , H04L2012/5681 , H04Q11/0478
摘要： A method and apparatus for switching a data packet between a source and destination in a network. The data packet includes a header portion and a data portion. The header portion includes routing information for the data packet. The method includes defining a data path in the router comprising a path through the router along which the data portion of the data packet travels and defining a control path comprising a path through the router along which routing information from the header portion travels. The method includes separating the data path and control path in the router such that the routing information can be separated from the data portion allowing for the separate processing of each in the router. The data portion can be stored in a global memory while routing decisions are made on the routing information in the control path.
摘要翻译：一种用于在网络中的源和目的地之间切换数据分组的方法和装置。数据分组包括报头部分和数据部分。报头部分包括用于数据分组的路由信息。该方法包括在路由器中定义数据路径，其包括通过路由器的路径，数据分组的数据部分沿着路径行进，并且定义包括通过路由器的路径的控制路径，路由器沿着路径信息从该路径行进。该方法包括分离路由器中的数据路径和控制路径，使得路由信息可以与数据部分分离，允许路由器中的每一个的单独处理。数据部分可以存储在全局存储器中，同时对控制路径中的路由信息作出路由决定。

4. 发明申请

US20120159062A1 METHODS AND APPARATUS RELATED TO A SHARED MEMORY BUFFER FOR VARIABLE-SIZED CELLS 有权
标题翻译：与可变尺寸细胞的共享存储缓冲器相关的方法和装置
公开(公告)号：US20120159062A1
公开(公告)日：2012-06-21
申请号：US13406219
申请日：2012-02-27
申请人： Gunes Aybay
发明人： Gunes Aybay
IPC分类号： G06F12/08
CPC分类号： H04L49/608 , H04L45/00 , H04L47/10 , H04L49/101 , H04L49/103 , H04L49/108 , H04L49/1515 , H04L49/251 , H04L49/252 , H04L49/3072 , H04L49/90 , H04L49/9042 , H04Q11/0478
摘要： In one embodiment, an apparatus includes a shared memory buffer including a lead memory bank and a write multiplexing module configured to send a leading segment from a set of segments to the lead memory bank. The set of segments includes bit values from a set of variable-sized cells. The write multiplexing module further configured to send each segment from the set of segments identified as a trailing segment to a portion of the shared memory mutually exclusive from the lead memory bank.
摘要翻译：在一个实施例中，一种装置包括共享存储器缓冲器，该共享存储器缓冲器包括引导存储器组和写入多路复用模块，其被配置为将引导段从一组段发送到引导存储体。该组段包括来自一组可变大小区的位值。写复用模块还被配置为将标识为尾段的片段集合中的每个片段与从引线存储器组互斥的共享存储器的一部分发送。

5. 发明申请

US20110085553A1 OUTPUT QUEUED SWITCH WITH A PARALLEL SHARED MEMORY, AND METHOD OF OPERATING SAME 失效
标题翻译：具有并行共享存储器的输出QUEUED开关及其操作方法
公开(公告)号：US20110085553A1
公开(公告)日：2011-04-14
申请号：US12946780
申请日：2010-11-15
申请人： Kai-Yeung (Sunny) SIU , Brian Hang Wai YANG , Mizanur M. RAHMAN
发明人： Kai-Yeung (Sunny) SIU , Brian Hang Wai YANG , Mizanur M. RAHMAN
IPC分类号： H04L12/56
CPC分类号： H04Q3/68 , H04L12/5601 , H04L49/108 , H04L49/153 , H04L49/60 , H04L49/606 , H04L2012/5627 , H04L2012/5651 , H04L2012/5681
摘要： A network switch includes an input layer to receive a data stream with a set of cells. Each cell includes data and a header to designate a destination device. The input layer includes a set of input layer circuits. A selected input layer circuit of the set of input layer circuits receives the data stream. The selected input layer circuit includes a set of queues corresponding to a set of destination devices. The selected input layer circuit is configured to assign a selected cell from the data stream to a selected queue of the set of queues. The selected queue corresponds to a selected destination device specified by the header of the selected cell. An intermediate layer includes a set of intermediate layer circuits, each intermediate layer circuit has a set of buffers corresponding to the set of destination devices. A selected intermediate layer circuit of the set of intermediate layer circuits receives the selected cell and assigns the selected cell to a selected buffer corresponding to the selected destination device. An output layer includes a set of output layer circuits corresponding to the set of destination devices. A selected output layer circuit of the set of output layer circuits stores the selected cell prior to routing the selected cell to a selected output layer circuit output node.
摘要翻译：网络交换机包括用于接收具有一组单元的数据流的输入层。每个小区包括指定目的地设备的数据和报头。输入层包括一组输入层电路。该组输入层电路的选定输入层电路接收数据流。所选择的输入层电路包括与一组目的地设备相对应的一组队列。所选择的输入层电路被配置为将所选择的单元从数据流分配给该组队列的选定队列。所选择的队列对应于由所选小区的头部指定的所选目的地设备。中间层包括一组中间层电路，每个中间层电路具有与该组目标设备相对应的一组缓冲器。所述一组中间层电路的所选择的中间层电路接收所选择的单元并将所选择的单元分配给与所选择的目的地设备相对应的选定缓冲器。输出层包括与目标设备组对应的一组输出层电路。所述一组输出层电路的所选输出层电路在将所选择的单元路由选定的输出层电路输出节点之前存储所选择的单元。

6. 发明授权

US07804833B2 In-line packet processing 有权
标题翻译：在线包处理
公开(公告)号：US07804833B2
公开(公告)日：2010-09-28
申请号：US11682111
申请日：2007-03-05
申请人： Rasoul Mirzazadeh Oskouy , Dennis C. Ferguson , Hann-Hwan Ju , Raymond Marcelino Manese Lim , Pradeep S. Sindhu , Sreeram Veeragandham , Jeff Zimmer , Michael M. Y. Hui
发明人： Rasoul Mirzazadeh Oskouy , Dennis C. Ferguson , Hann-Hwan Ju , Raymond Marcelino Manese Lim , Pradeep S. Sindhu , Sreeram Veeragandham , Jeff Zimmer , Michael M. Y. Hui
IPC分类号： H04L12/56 , H04J1/16
CPC分类号： H04L45/74 , G06F11/08 , H04L1/0041 , H04L12/56 , H04L12/5601 , H04L29/06 , H04L45/00 , H04L45/20 , H04L45/60 , H04L47/6225 , H04L49/103 , H04L49/108 , H04L49/203 , H04L49/25 , H04L49/254 , H04L49/30 , H04L49/3009 , H04L49/3063 , H04L49/3081 , H04L49/555 , H04L49/602 , H04L49/608 , H04L49/90 , H04L49/901 , H04L49/9047 , H04L69/16 , H04L69/161 , H04L69/22 , H04L69/324 , H04L2012/5652 , H04L2012/5679 , H04Q11/0478
摘要： A method and apparatus for in-line processing a data packet while routing the packet through a router in a system transmitting data packets between a source and a destination over a network including the router. The method includes receiving the data packet and pre-processing layer header data for the data packet as the data packet is received and prior to transferring any portion of the data packet to packet memory. The data packet is thereafter stored in the packet memory. A routing through the router is determined including a next hop index describing the next connection in the network. The data packet is retrieved from the packet memory and a new layer header for the data packet is constructed from the next hop index while the data packet is being retrieved from memory. The new layer header is coupled to the data packet prior to transfer from the router.
摘要翻译：一种用于在通过包括路由器的网络在源和目的地之间发送数据分组的系统中的路由器路由数据包的同时处理数据分组的方法和装置。该方法包括在接收到数据分组并且将数据分组的任何部分传送到分组存储器之前接收数据分组和数据分组的预处理层报头数据。数据分组此后被存储在分组存储器中。确定通过路由器的路由，其包括描述网络中的下一个连接的下一跳索引。从分组存储器检索数据分组，并且在从存储器检索数据分组的同时，从下一跳索引构建数据分组的新层头。在从路由器传送之前，将新层标头耦合到数据包。

7. 发明授权

US07545808B2 Memory organization in a switching device 有权
标题翻译：交换设备中的内存组织
公开(公告)号：US07545808B2
公开(公告)日：2009-06-09
申请号：US11226335
申请日：2005-09-15
申请人： Pradeep S. Sindhu , Dennis C. Ferguson , Bjorn O. Liencres , Nalini Agarwal , Hann-Hwan Ju , Raymond Marcelino Manese Lim , Rasoul Mirzazadeh Oskouy , Sreeram Veeragandham
发明人： Pradeep S. Sindhu , Dennis C. Ferguson , Bjorn O. Liencres , Nalini Agarwal , Hann-Hwan Ju , Raymond Marcelino Manese Lim , Rasoul Mirzazadeh Oskouy , Sreeram Veeragandham
IPC分类号： H04L12/28
CPC分类号： G06F15/167 , H04L12/5601 , H04L29/06 , H04L45/00 , H04L45/72 , H04L45/7457 , H04L47/6225 , H04L49/103 , H04L49/108 , H04L49/1538 , H04L49/203 , H04L49/25 , H04L49/252 , H04L49/3072 , H04L49/3081 , H04L49/608 , H04L49/90 , H04L49/901 , H04L49/9042 , H04L49/9047 , H04L49/9057 , H04L69/22 , H04L2012/5652 , H04L2012/5679 , H04L2012/5681 , H04Q11/0478
摘要： A network device switches variable length data units from a source to a destination in a network. An input port receives the variable length data unit and a divider divides the variable length data unit into uniform length data units for temporary storage in the network device. A distributed memory includes a plurality of physically separated memory banks addressable using a single virtual address space and an input switch streams the uniform length data units across the memory banks based on the virtual address space. The network device further includes an output switch for extracting the uniform length data units from the distributed memory by using addresses of the uniform length data units within the virtual address space. The output switch reassembles the uniform length data units to reconstruct the variable length data unit. An output port receives the variable length data unit and transfers the variable length data unit to the destination.
摘要翻译：网络设备将可变长度数据单元从网络中的源切换到目的地。输入端口接收可变长度数据单元，并且除法器将可变长度数据单元划分成用于在网络设备中临时存储的统一长度数据单元。分布式存储器包括可以使用单个虚拟地址空间寻址的多个物理上分离的存储器组，并且输入开关基于虚拟地址空间跨越存储体流量化均匀长度数据单元。网络设备还包括输出开关，用于通过使用虚拟地址空间内的均匀长度数据单元的地址从分布式存储器提取均匀长度的数据单元。输出开关重新组合均匀的长度数据单元以重构可变长度数据单元。输出端口接收可变长度数据单元并将可变长度数据单元传送到目的地。

8. 发明授权

US07525917B2 Flow control in a distributed scalable, shared memory switching fabric system 有权
标题翻译：分布式可扩展共享内存交换结构体系中的流控制
公开(公告)号：US07525917B2
公开(公告)日：2009-04-28
申请号：US10453975
申请日：2003-06-04
申请人： Philip Ferolito , Eric Anderson , Gregory S. Mathews
发明人： Philip Ferolito , Eric Anderson , Gregory S. Mathews
IPC分类号： G01R31/08 , H04L12/28
CPC分类号： H04L47/10 , H04L47/30 , H04L49/108 , H04L2012/562
摘要： A traffic control system and method with flow control aggregation. The system includes a switching fabric and an ingress module. The switching fabric includes read counters that are associated with a plurality of queues. The read counters represent an aggregated number of cells dequeued from respective queues since a previous flow control message (FCM) was sent to the ingress module. The read counters are reset when a FCM is created. The ingress module includes write counters that are associated with the queues. The write counters are incremented each time a cell is sent to the respective queues. The write counters are decremented in accordance with the FCM when the FCM is received. Also, read counters for one or more queues are aggregated into a single FCM.
摘要翻译：一种具有流量控制聚合的交通控制系统和方法。该系统包括交换结构和入口模块。交换结构包括与多个队列相关联的读取计数器。读取计数器表示从先前流控制消息（FCM）发送到入口模块的从相应队列出队的单元的聚合数。读取计数器在创建FCM时被重置。入口模块包括与队列相关联的写入计数器。每当将单元发送到相应的队列时，写计数器递增。当接收到FCM时，写计数器根据FCM递减。此外，一个或多个队列的读取计数器会聚合到一个FCM中。

9. 发明授权

US07423969B2 Process for storing transmission units and a network communications device 有权
标题翻译：用于存储传输单元和网络通信设备的过程
公开(公告)号：US07423969B2
公开(公告)日：2008-09-09
申请号：US10967081
申请日：2004-10-14
申请人： Raimar Thudt
发明人： Raimar Thudt
IPC分类号： H04L12/50
CPC分类号： H04L12/5601 , H04L49/108 , H04L49/90 , H04L49/9042 , H04L2012/5665
摘要： The present invention relates to a process for storing transmission units in interworking between networks of differing protocol structure, in particular between ATM networks and Ethernet networks, and a corresponding network communications device. In accordance with the invention a storage in a segmented memory (10) is proposed in which the segmentation is chosen in such a way that the length of a segment of the segmented memory (10) corresponds to the length of the payload of an ATM cell. The storage of transmission units in the segmented memory (10) is preferably effected in the form of lists (40) which comprise descriptor segments (100) and data segments (200). The invention facilitates efficient storage and processing of transmission units with differing data structure and length.
摘要翻译：本发明涉及用于将传输单元存储在不同协议结构的网络之间，特别是在ATM网络和以太网之间的互通中的过程，以及相应的网络通信设备。根据本发明，提出了分段存储器（10）中的存储器，其中以这样的方式选择分段，使得分段存储器（10）的段的长度对应于ATM信元的有效载荷的长度。传输单元在分段存储器（10）中的存储优选地以包括描述符段（100）和数据段（200）的列表（40）的形式进行。本发明有助于有效地存储和处理具有不同数据结构和长度的传输单元。

10. 发明授权

US07417986B1 Shared buffer switch interface 有权
标题翻译：共享缓冲区交换机接口
公开(公告)号：US07417986B1
公开(公告)日：2008-08-26
申请号：US09947184
申请日：2001-09-04
申请人： John Sandoval , Matt Noel , Eugene Wang
发明人： John Sandoval , Matt Noel , Eugene Wang
IPC分类号： H04L12/28
CPC分类号： H04L12/5601 , H04L49/108 , H04L2012/5642 , H04L2012/5681 , H04L2012/5682
摘要： A system and method for using a single shared buffer to service multiple destinations for a telecommunications switch is disclosed. Upon receiving a cell of data to be sent to a destination, an interface stores the cell in a shared buffer. The address of the cell in the buffer is stored in a queue array. The address of the buffer address in the queue array is stored in a head array and a tail array. A threshold register tracks the global threshold for the total number of cells in the shared buffer and a destination threshold for each destination. The buffer can broadcast a data cell to a single location or send the same cell to multiple locations.
摘要翻译：公开了一种用于使用单个共享缓冲器来为电信交换机服务多个目的地的系统和方法。在接收到要发送到目的地的数据单元时，接口将该单元存储在共享缓冲器中。缓冲区中单元格的地址存储在队列数组中。队列数组中缓冲区地址的地址存储在头数组和尾数组中。阈值寄存器跟踪共享缓冲区中的单元总数的全局阈值和每个目的地的目标阈值。缓冲器可以将数据单元广播到单个位置或将相同的单元发送到多个位置。

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