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1. 发明申请

US20160239440A1 METHODS AND SYSTEMS FOR ROUTING IN A STATE MACHINE 有权
公开(公告)号：US20160239440A1
公开(公告)日：2016-08-18
申请号：US15045550
申请日：2016-02-17
申请人： Micron Technology, Inc.
发明人： David R. Brown , Harold B Noyes , Irene Junjuan Xu , Paul Glendenning
IPC分类号： G06F13/16 , G06F13/12 , G06F13/40 , H04L12/883 , G06F13/42
CPC分类号： G06F13/1673 , G06F9/4498 , G06F13/124 , G06F13/4022 , G06F13/4282 , G06F17/30516 , G06K9/00496 , G06K9/00973 , G06K9/00979 , H04L49/9021
摘要： A device includes a routing buffer. The routing buffer includes a first port configured to receive a signal relating to an analysis of at least a portion of a data stream. The routing buffer also includes a second port configured to selectively provide the signal to a first routing line of a block of a state machine at a first time. The routing buffer further includes a third port configured to selectively provide the signal to a second routing line of the block of the state machine at the first time.

2. 发明授权

US09276835B2 Packet segmentation with different segment sizes for a switch fabric 有权
标题翻译：交换结构具有不同段大小的数据包分段
公开(公告)号：US09276835B2
公开(公告)日：2016-03-01
申请号：US14842473
申请日：2015-09-01
申请人： Force10 Networks, Inc.
发明人： Glenn Poole , Brad Danofsky , David Haddad , Ann Gui , Heeloo Chung , Joanna Lin
IPC分类号： H04L12/28 , H04L12/755 , H04L12/861 , H04L12/805 , H04L12/883
CPC分类号： H04L45/021 , H04L47/365 , H04L49/90 , H04L49/9021 , H04L49/9057
摘要： An epoch-based network processor internally segments packets for processing and aggregation in epoch payloads. FIFO buffers interact with a memory management unit to efficiently manage the segmentation and aggregation process.
摘要翻译：一个基于时代的网络处理器在内部对数据包进行分段，用于在时代有效载荷中进行处理和聚合。 FIFO缓冲区与存储器管理单元交互以有效地管理分段和聚合过程。

3. 发明授权

US09160677B2 Segmentation of network packets for a switch fabric 有权
标题翻译：交换结构的网络分组分段
公开(公告)号：US09160677B2
公开(公告)日：2015-10-13
申请号：US14325872
申请日：2014-07-08
申请人： Force10 Networks, Inc.
发明人： Glenn Poole , Brad Danofsky , David Haddad , Ann Gui , Heeloo Chung , Joanna Lin
IPC分类号： H04L12/28 , H04L12/805 , H04L12/861 , H04L12/883
CPC分类号： H04L45/021 , H04L47/365 , H04L49/90 , H04L49/9021 , H04L49/9057
摘要： A network packet is segmented for transfer through a switch fabric. The last segment of the packet is allowed to exceed the maximum size of previous segments so as to increase the switch fabric utilization. Other features are also provided.
摘要翻译：网络分组被分段以通过交换结构进行传输。允许数据包的最后一个段超过先前段的最大大小，以增加交换结构的利用率。还提供其他功能。

4. 发明授权

US08867537B1 Method and system for processing network packets 有权
标题翻译：处理网络数据包的方法和系统
公开(公告)号：US08867537B1
公开(公告)日：2014-10-21
申请号：US13610095
申请日：2012-09-11
申请人： Charles Micalizzi, Jr.
发明人： Charles Micalizzi, Jr.
IPC分类号： H04L12/28 , H04L12/701 , H04L12/861 , H04L12/883 , H04L12/747
CPC分类号： H04L45/00 , G06F11/1004 , H04L1/1671 , H04L1/1835 , H04L45/742 , H04L49/9021 , H04L49/9063 , H04L67/1097 , H04L69/22
摘要： A method for writing information to a first memory location controlled by a first computing system from a second memory location controlled by a second computing system that interfaces with the first computing system via a network connection is provided.
摘要翻译：提供了一种将信息写入由第一计算系统控制的第一存储位置的方法，该第一存储器位置是由经由网络连接与第一计算系统接口的第二计算系统控制的第二存储位置。

5. 发明授权

US08724657B2 System and method for offloading packet protocol encapsulation from software 失效
标题翻译：从软件卸载数据包协议封装的系统和方法
公开(公告)号：US08724657B2
公开(公告)日：2014-05-13
申请号：US13205420
申请日：2011-08-08
申请人： Kaushik Kuila , David T. Hass , Ahmed Shahid
发明人： Kaushik Kuila , David T. Hass , Ahmed Shahid
IPC分类号： H04J3/24 , H04L12/56
CPC分类号： H04L49/901 , H04L49/9021 , H04L49/9042 , H04L69/02 , H04L69/22 , H04L69/26
摘要： A method and system of packet assembly is provided. The method includes providing a first packet descriptor. The first packet descriptor is a pointer-to-pointer (P2P) descriptor that includes pointer information. The method further includes retrieving a first pointer referenced by the pointer information of the first packet descriptor; providing the first pointer to a DMA engine; and using the DMA engine to retrieve packet data referenced by the first pointer.
摘要翻译：提供了一种分组组装的方法和系统。该方法包括提供第一分组描述符。第一个分组描述符是包括指针信息的指针指针（P2P）描述符。该方法还包括：检索由第一分组描述符的指针信息引用的第一指针; 提供第一个指向DMA引擎的指针; 并使用DMA引擎来检索由第一个指针引用的数据包数据。

6. 发明申请

US20140025935A1 Programmable Queuing 有权
标题翻译：可编程排队
公开(公告)号：US20140025935A1
公开(公告)日：2014-01-23
申请号：US13723380
申请日：2012-12-21
申请人： Andrew Li , Michael Lau , Asad Khamisy
发明人： Andrew Li , Michael Lau , Asad Khamisy
IPC分类号： G06F9/30
CPC分类号： H04L49/9057 , G06F9/3004 , H04L47/52 , H04L49/90 , H04L49/901 , H04L49/9021 , H04L49/9047
摘要： A traffic manager includes an execution unit that is responsive to instructions related to queuing of data in memory. The instructions may be provided by a network processor that is programmed to generate such instructions, depending on the data. Examples of such instructions include (1) writing of data units (of fixed size or variable size) without linking to a queue, (2) re-sequencing of the data units relative to one another without moving the data units in memory, and (3) linking the previously-written data units to a queue. The network processor and traffic manager may be implemented in a single chip.
摘要翻译：交通管理器包括执行单元，其响应于与存储器中的数据排队相关的指令。指令可以由网络处理器提供，该网络处理器被编程为根据数据生成这样的指令。这种指令的示例包括（1）不链接到队列的数据单元（固定大小或可变大小）的写入，（2）数据单元相对于彼此的重新排序而不移动存储器中的数据单元，以及（ 3）将先前写入的数据单元链接到队列。网络处理器和流量管理器可以在单个芯片中实现。

7. 发明申请

US20130326083A1 METHOD AND APPARATUS FOR PROCESSING RECEIVED NETWORK PACKETS ON A NETWORK INTERFACE FOR A COMPUTER 有权
公开(公告)号：US20130326083A1
公开(公告)日：2013-12-05
申请号：US13899299
申请日：2013-05-21
申请人： Alacritech, Inc.
发明人： Laurence B. Boucher , Stephen E.J. Blightman , Peter K. Craft , David A. Higgen , Clive M. Philbrick , Daryl D. Starr
IPC分类号： H04L29/06
CPC分类号： H04L47/193 , G06F13/28 , G06F13/4022 , G06F13/4221 , H04L29/06 , H04L29/0653 , H04L29/12009 , H04L29/12018 , H04L45/66 , H04L45/745 , H04L47/10 , H04L47/36 , H04L47/50 , H04L47/6225 , H04L49/90 , H04L49/901 , H04L49/9021 , H04L49/9042 , H04L49/9052 , H04L49/9063 , H04L49/9068 , H04L49/9073 , H04L49/9094 , H04L61/10 , H04L67/10 , H04L67/325 , H04L67/327 , H04L67/34 , H04L69/08 , H04L69/12 , H04L69/16 , H04L69/161 , H04L69/162 , H04L69/163 , H04L69/166 , H04L69/22 , H04L69/32
摘要： An intelligent network interface card (INIC) or communication processing device (CPD) works with a host computer for data communication. The device provides a fast-path that avoids protocol processing for most messages, greatly accelerating data transfer and offloading time-intensive processing tasks from the host CPU. The host retains a fallback processing capability for messages that do not fit fast-path criteria, with the device providing assistance such as validation even for slow-path messages, and messages being selected for either fast-path or slow-path processing. A context for a connection is defined that allows the device to move data, free of headers, directly to or from a destination or source in the host. The context can be passed back to the host for message processing by the host. The device contains specialized hardware circuits that are much faster at their specific tasks than a general purpose CPU. A preferred embodiment includes a trio of pipelined processors devoted to transmit, receive and utility processing, providing full duplex communication for four Fast Ethernet nodes.

8. 发明申请

US20130028181A1 SYSTEM AND METHOD FOR MANAGING PARALLEL PROCESSING OF NETWORK PACKETS IN A WIRELESS ACCESS DEVICE 有权
标题翻译：用于管理无线接入设备中网络分组的并行处理的系统和方法
公开(公告)号：US20130028181A1
公开(公告)日：2013-01-31
申请号：US13331367
申请日：2011-12-20
申请人： David B. Rosen
发明人： David B. Rosen
IPC分类号： H04W4/00
CPC分类号： H04L47/70 , H04L47/824 , H04L49/9021
摘要： A system for managing parallel processing of network packets is also provided. A wireless access device that includes multiple transceivers and multiple processing units receives network packets. A media access controller determines which transceiver a received network packet is associated with. A tagging module determines whether the transceiver associated with the received network packet is bound to one of the processing units. In response to a determination that the transceiver is bound, a scheduler assigns the received packet to the processing unit the transceiver is bound to. In response to a determination that the transceiver is not bound, the tagging module binds the transceiver to a processing unit such that the processing unit processes network packets associated with the transceiver while the transceiver is bound to the processing unit, and the scheduler assigns the received network packet to the processing unit the transceiver is bound to.
摘要翻译：还提供了一种用于管理网络分组的并行处理的系统。包括多个收发器和多个处理单元的无线接入设备接收网络分组。媒体接入控制器确定接收到的网络分组与哪个收发器相关联。标签模块确定与接收到的网络分组相关联的收发机是否绑定到处理单元之一。响应于收发器被绑定的确定，调度器将收到的分组分配给收发器所绑定的处理单元。响应于收发器未被约束的确定，标签模块将收发器绑定到处理单元，使得处理单元在收发器被绑定到处理单元的同时处理与收发器相关联的网络分组，并且调度器分配所接收的收发器绑定到处理单元的网络包。

9. 发明授权

US08296386B1 Method and system for processing network packets 有权
标题翻译：处理网络数据包的方法和系统
公开(公告)号：US08296386B1
公开(公告)日：2012-10-23
申请号：US12489241
申请日：2009-06-22
申请人： Charles Micalizzi, Jr.
发明人： Charles Micalizzi, Jr.
IPC分类号： G06F15/167
CPC分类号： H04L45/00 , G06F11/1004 , H04L1/1671 , H04L1/1835 , H04L45/742 , H04L49/9021 , H04L49/9063 , H04L67/1097 , H04L69/22
摘要： A method for writing information to a first memory location controlled by a first computing system from a second memory location controlled by a second computing system that interfaces with the first computing system via a network connection is provided.
摘要翻译：提供了一种将信息写入由第一计算系统控制的第一存储位置的方法，该第一存储器位置是由经由网络连接与第一计算系统接口的第二计算系统控制的第二存储器位置。

10. 发明申请

US20120134369A1 Programmable Queuing Instruction Set 有权
标题翻译：可编程排队指令集
公开(公告)号：US20120134369A1
公开(公告)日：2012-05-31
申请号：US13365433
申请日：2012-02-03
申请人： Andrew Li , Michael Lau , Asad Khamisy
发明人： Andrew Li , Michael Lau , Asad Khamisy
IPC分类号： G06F12/00 , G06F12/02 , H04L12/56
CPC分类号： H04L49/9057 , G06F9/3004 , H04L47/52 , H04L49/90 , H04L49/901 , H04L49/9021 , H04L49/9047
摘要： A traffic manager includes an execution unit that is responsive to instructions related to queuing of data in memory. The instructions may be provided by a network processor that is programmed to generate such instructions, depending on the data. Examples of such instructions include (1) writing of data units (of fixed size or variable size) without linking to a queue, (2) re-sequencing of the data units relative to one another without moving the data units in memory, and (3) linking the previously-written data units to a queue. The network processor and traffic manager may be implemented in a single chip.
摘要翻译：交通管理器包括执行单元，其响应于与存储器中的数据排队相关的指令。指令可以由网络处理器提供，该网络处理器被编程为根据数据生成这样的指令。这种指令的示例包括（1）不链接到队列的数据单元（固定大小或可变大小）的写入，（2）数据单元相对于彼此的重排序而不移动存储器中的数据单元，以及（ 3）将先前写入的数据单元链接到队列。网络处理器和流量管理器可以在单个芯片中实现。

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