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    • 8. 发明授权
    • Method for manufacturing laminated circuit board
    • 叠层电路板的制造方法
    • US09079382B2
    • 2015-07-14
    • US12922253
    • 2009-03-25
    • Tom Marttila
    • Tom Marttila
    • H05K3/02B32B38/10G08B13/24H05K3/04B32B37/12H05K1/03H05K3/38H05K3/40
    • H05K1/115B32B37/1292B32B38/10B32B2310/0843B32B2457/08G08B13/244H05K1/0366H05K1/0386H05K3/027H05K3/046H05K3/386H05K3/4046H05K3/4084H05K2201/0284H05K2201/0355H05K2201/0382H05K2201/0394H05K2201/09563H05K2203/0522H05K2203/1388H05K2203/1394H05K2203/1545Y10T29/49156
    • A method for manufacturing a circuit board featuring conductive patterns, said method comprising the following steps of: i) affixing a conductive layer, such as a metal foil (3), to a substrate material (1) selectively, such that a part of the conductive layer, such as the metal foil (3), comprising desired areas (3a) for the final product and narrow areas (3c) between the final product's conducting areas, is affixed to the substrate material (1) by means of a bond (2), and removal-intended more extensive areas (3b) of the conductive layer, for example the metal foil (3), are left substantially unattached to the substrate material in such a way that the removable area (3b) is in attachment with the substrate material (1) by not more than its edge portion to be patterned in a subsequent step ii) and possibly by sites which preclude a release of the removable areas prior to a step iii); ii) patterning, by a removal of material, the conductive layer, such as the metal foil (3), from narrow gaps between the desired conducting areas (3a), and from an outer periphery of the area (3b) removable in a solid state, for establishing conductor patterns; iii) removing the removable areas (3b), not affixed to the substrate material (1), from the conductive layer, such as the metal foil (3), in a solid state after the conductive layer's edge area, which was removed from the removable area's outer periphery during the course of step ii), no longer holds the removable areas (3b) attached by their edges to the substrate material.
    • 一种制造具有导电图案的电路板的方法,所述方法包括以下步骤:i)选择性地将诸如金属箔(3)的导电层固定到基底材料(1)上,使得部分 导电层,例如金属箔(3),其包含用于最终产品的所需区域(3a)和最终产品的导电区域之间的狭窄区域(3c),通过粘合剂(1)固定到基底材料(1) 导电层,例如金属箔(3)的移除目的更广泛的区域(3b)基本上不附着于基底材料,使得可移除区域(3b)与 基底材料(1)不超过其后续步骤ii)中待图案化的边缘部分,并且可能通过在步骤iii)之前排除可释放区域的释放的部位; ii)通过从所需导电区域(3a)之间的狭窄间隙和从固体可移除的区域(3b)的外周边去除导电层(例如金属箔(3))的图案, 状态,用于建立导体图案; iii)在导电层的边缘区域从固体状态除去导电层的边缘区域之后,从导电层(例如金属箔(3))上去除不附着于基底材料(1)的可移除区域(3b) 在步骤ii)的过程中,可移除区域的外围不再将其边缘附着的可移除区域(3b)保持在衬底材料上。